SED1526FAA

PF776-03 SED1526/28 Series SED1526/28 Series Dot Matrix LCD Controller Driver SSC5000Series q Ultra Low Power Consumption q Built-in Power Supply Circuit for LCD q 97 Driver Outputs s DESCRIPTION The SED1526 series is a single-chip LCD driver for dot-matrix liquid crystal displays (LCD’s). It accepts serial or 8-bit parallel display data directly from a microprocessor and stores data in an on-chip display RAM. It can generate an LCD drive signal independent from microprocessor clock. As the SED1526 series features the very low power dissipation and wide operating voltage range, it can easily realize a powerful but compact display unit having a small battery. A single chip of SED1526 series can drive a 17×80-pixel or 33×64-pixel LCD panel. (Note: The SED1526 series are not designed to have EMI resistance.) s FEATURES q q q q q q Direct data display using the display RAM. When RAM data bit is 0, it is not displayed; when 1, it is displayed. Large 80×33-bit RAM capacity On-chip LCD driver circuit (97 segment and common drivers) High-speed, 8-bit microprocessor interface allowing direct connection to both the 8080 and 6800 Supported serial interface Rich command functions (upward compatible to SED1520 Series); they are Read/Write Display Data, Display On/Off Switching, Set Page Address, Set Initial Display Line, Set Column Address, Read Status, Static Drive On/Off Switching, Select Duty, Duty+1, Read-Modify-Write, Select Segment Driver Direction, Power Save, Reset, Set Power Control, Set Electronic Controls, Clock Stop. On-chip CR oscillation circuit (OSC) On-chip LCD power circuit (The internal and external LCD power supplies are software selectable.) Very low power consumption Flexible power voltages; 2.4 to 6.0 V (for logic) and -13.0 to -4.0V(VDD-V5) –40 to +85°C wide operating temperature range CMOS process Package: QFP5-128pin (plastic), Die form (Al pad, Au bump) q q q q q q q s LINE UP (Series specifications: ex. 128-pin flat package) Model SED1526F0A SED1526FAA SED1526FEA SED1528F0A Type 1 Operating clock (Internal OSC) 20 KHz 20 KHz 20 KHz 20 KHz Duty 1/8, 1/9, 1/16, 1/17 1/8, 1/9, 1/16, 1/17 1/8, 1/9, 1/16, 1/17 1/32, 1/33 Segment driver 80 80 80 64 Common driver 17 17 17 33 VREG type Tpye 1 Tpye 1 Tpye 2 Type 1 CMOS pin positions Type A Type B Type A Type A VREG (Built-in power supply regulating voltage) Temperature gradient: 0.17%/°C Type 2 VREG (Built-in power supply regulating voltage) Temperature gradient: 0.00%/°C Refer to No. P3 (Package pin layout), No. P4 (PAD layout) and No. P5 (PAD coordinates). An SED1526 series package has one of following subcodes according to its package type (an example of SED1526): SED1526F0A: QFP5-128pin flat package SED1526D0 : Bear chip SED1526D0A having aluminium pad SED1526D0B having gold bump SED1526T : TCP * ** 1 SED1526/28 Series s BLOCK DIAGRAM (SED1526 0 ) ** SEG0 ····························· SEG79 COM0···· COM15 COMS ··············································· ····················· VSS VDD V1 V2 V3 V4 V5 Voltage select circuit Segment driver Common driver Shift register CAP1+ CAP1– CAP2+ CAP2– VOUT I/O buffer circuit Initial display line register VR Line address decoder Power circuit Display data latch 80x33-dot display data RAM Column address decoder Page address register 7-bit column address counter Display timing generator circuit 7-bit column address register FR CL M/S Bus holder Command decoder Status register Line counter I/O buffer D3 D4 D5 Oscillator Microprocessor interface SR2 SR1 WR RD CS2 CS1 A0 D0 D1 D2 COMS D6 D7 2 SED1526/28 Series s PIN ASSIGNMENT q Package Pin Assignment SEG53 SEG52 SEG51 SEG50 SEG49 SEG48 SEG47 SEG46 SEG45 SEG44 SEG43 SEG42 SEG41 SEG40 SEG39 SEG38 SEG37 SEG36 SEG35 SEG34 SEG33 SEG32 SEG31 SEG30 SEG29 SEG28 SEG27 SEG26 SEG25 SEG24 SEG23 SEG22 SEG21 SEG20 SEG19 SEG18 SEG17 SEG16 102 90 80 70 65 SEG54 SEG55 SEG56 SEG57 SEG58 SEG59 SEG60 SEG61 SEG62 SEG63 SEG64 SEG65 SEG66 SEG67 SEG68 SEG69 SEG70 SEG71 SEG72 SEG73 SEG74 SEG75 SEG76 SEG77 SEG78 SEG79 103 64 110 (COM15) (COM14) (COM13) (COM12) (COM11) (COM10) (COM 9) (COM 8) (COM 7) (COM 6) (COM 5) (COM 4) (COM 3) (COM 2) (COM 1) (COM 0) 50 Index 120 10 20 30 [COMS ] [COM 0] [COM 1] [COM 2] [COM 3] [COM 4] [COM 5] V1 V2 V3 V4 V5 VR VDD VOUT CAP2CAP2+ CAP1CAP1+ VSS W/S SR2 SR1 WR RD CS2 CS1 A0 FR CL D0 D1 D2 D3 D4 D5 D6 D7 COM0 COM1 COM2 COM3 COM4 COM5 COM6 (COM16) (COM17) (COM18) (COM19) (COM20) (COM21) (COM22) 38 128 1 39 SEG15 SEG14 SEG13 SEG12 SEG11 SEG10 SEG9 SEG8 SEG7 SEG6 SEG5 SEG4 SEG3 SEG2 SEG1 SEG0 COMS COM15 COM14 COM13 COM12 COM11 COM10 COM9 COM8 COM7 [COM15] (COM31) [COM14] (COM30) [COM13] (COM29) [COM12] (COM28) [COM11] (COM27) [COM10] (COM26) [COM 9] (COM25) [COM 8] (COM24) [COM 7] (COM23) [COM 6] 3 SED1526/28 Series s PAD LAYOUT 102 SEG54 SEG55 SEG56 SEG57 SEG58 SEG59 SEG60 SEG61 SEG62 SEG63 SEG64 (COM15) SEG65 (COM14) SEG66 (COM13) SEG67 (COM12) SEG68 (COM11) SEG69 (COM10) SEG70 (COM9) SEG71 (COM8) SEG72 (COM7) SEG73 (COM6) SEG74 (COM5) SEG75 (COM4) SEG76 (COM3) SEG77 (COM2) SEG78 (COM1) SEG79 (COM0) 103 SEG53 SEG52 SEG51 SEG50 SEG49 SEG48 SEG47 SEG46 SEG45 SEG44 SEG43 SEG42 SEG41 SEG40 SEG39 SEG38 SEG37 SEG36 SEG35 SEG34 SEG33 SEG32 SEG31 SEG30 SEG29 SEG28 SEG27 SEG26 SEG25 SEG24 SEG23 SEG22 SEG21 SEG20 SEG19 SEG18 SEG17 SEG16 90 80 70 65 64 SEG15 SEG14 SEG13 SEG12 SEG11 SEG10 SEG9 SEG8 SEG7 SEG6 SEG5 SEG4 SEG3 SEG2 SEG1 SEG0 COMS COM15 (COM31) COM14 (COM30) COM13 (COM29) COM12 (COM28) COM11 (COM27) COM10 (COM26) COM9 (COM25) COM8 (COM24) COM7 (COM23) COM6 (COM22) Y 110 X 120 50 128 1 10 20 30 37 38 [COM15] [COM14] [COM13] [COM12] [COM11] [COM10] [COM 9] [COM 8] [COM 7] [COM 6] [COM 5] * Pin names in ( * Pin names in [ ) apply to SED1528. ] apply to SED1526DA (CMOS pin = Type B). * Aluminum pad chip • Chip size: • Chip thickness: • Pad opening: • Pad pitch: 5.92 mm × 4.68 mm 0.4 mm 90.2 µm × 90.2 µm 130 µm (Min) Gold bump chip (reference) • Chip size: 5.92 mm × 4.68 mm • Chip thickness: 0.4 mm • Bump size: 81.7 µm × 81.7 µm • Bump height: 22.5 µm 4 [COMS ] [COM 0] [COM 1] [COM 2] [COM 3] [COM 4] VSS M/S SR2 SR1 WR RD CS2 CS1 A0 FR CL D0 D1 D2 D3 D4 D5 D6 D7 COM0 (COM16) COM1 (COM17) COM2 (COM18) COM3 (COM19) COM4 (COM20) COM5 (COM21) V1 V2 V3 V4 V5 VR VDD VOUT CAP2CAP2+ CAP1CAP1+ SED1526/28 Series s PAD COORDINATES PAD No. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 V1 V2 V3 V4 V5 VR VDD VOUT CAP2– CAP2+ CAP1– CAP1+ VSS M/S SR2 SR1 WR RD CS2 CS1 A0 FR CL D0 D1 D2 D3 D4 D5 D6 D7 COM0 COM1 COM2 COM3 COM4 COM5 COM6 COM7 COM8 COM9 COM10 COM11 COM12 COM13 COM14 COM15 COMS SEG0 SEG1 SEG2 SEG3 SEG4 SEG5 SEG6 SEG7 SEG8 SEG9 SEG10 SEG11 SEG12 SEG13 SEG14 SEG15 PIN Name X –2767 –2637 –2507 –2377 –2246 –2116 –1985 –1857 –1727 –1522 –1318 –1113 –553 –356 –226 –95 35 165 295 425 555 719 849 979 1109 1239 1369 1500 1630 1760 1890 2069 2199 2329 2459 2589 2719 2802 Y –2106 PAD No. 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 SEG16 SEG17 SEG18 SEG19 SEG20 SEG21 SEG22 SEG23 SEG24 SEG25 SEG26 SEG27 SEG28 SEG29 SEG30 SEG31 SEG32 SEG33 SEG34 SEG35 SEG36 SEG37 SEG38 SEG39 SEG40 SEG41 SEG42 SEG43 SEG44 SEG45 SEG46 SEG47 SEG48 SEG49 SEG50 SEG51 SEG52 SEG53 SEG54 SEG55 SEG56 SEG57 SEG58 SEG59 SEG60 SEG61 SEG62 SEG63 SEG64 SEG65 SEG66 SEG67 SEG68 SEG69 SEG70 SEG71 SEG72 SEG73 SEG74 SEG75 SEG76 SEG77 SEG78 SEG79 PIN Name X 2516 2367 2218 2088 1957 1827 1697 1567 1437 1307 1177 1046 916 786 656 526 396 266 135 5 –125 –255 –385 –515 –646 –776 –906 –1036 –1166 –1296 –1426 –1557 –1687 –1817 –1947 –2077 –2226 –2375 –2802 Unit: µm Y 2185 –2149 –2176 –2166 –2185 (COM16) (COM17) (COM18) (COM19) (COM20) (COM21) (COM22) (COM23) (COM24) (COM25) (COM26) (COM27) (COM28) (COM29) (COM30) (COM31) [CMOS ] [COM0 ] [COM1 ] [COM2 ] [COM3 ] [COM4 ] [COM5 ] [COM6 ] [COM7 ] [COM8 ] [COM9 ] [COM10] [COM11] [COM12] [COM13] [COM14] [COM15] –1654 –1524 –1393 –1263 –1133 –1003 –873 –743 –612 –482 –352 –193 –63 67 197 327 457 588 718 848 978 1108 1238 1368 1499 1629 1759 (COM15) (COM14) (COM13) (COM12) (COM11) (COM10) (COM9) (COM8) (COM7) (COM6) (COM5) (COM4) (COM3) (COM2) (COM1) (COM0) 1932 1802 1672 1541 1411 1281 1151 1021 891 760 599 469 339 209 78 –52 –182 –312 –442 –572 –703 –833 –963 –1093 –1223 –1353 * Pin names in ( * Pin names in [ ) apply to SED1528. ] apply to SED1526DA* (CMOS pin = Type B). 5 SED1526/28 Series s ABSOLUTE MAXIMUM RATINGS Rating Supply voltage range Symbol VDD Triple voltage conversion VDD V5 V1, V2, V3, V4 VIN V0 PD TOPR TSTG Bear chip Soldering temperature and time TSOLDER –55 to +125 260/10 (at leads) Value –0.3 to +7.0 V –0.3 to +6.0 –18.0 to +0.3 V5 to +0.3 –0.3 to VDD+0.3 –0.3 to VDD+0.3 250 –40 to +85 –65 to +150 V V V V mW °C °C °C/sec Unit Driver supply voltage range (1) Driver supply voltage range (2) Input voltage range Output voltage range Allowable loss Operating temperature range QFP • TCP Storage temperature range VCC GND VSS VDD V1-V5, VOUT,VREG (Microprocessor side) (SED1526 series side) Notes: 1. V1 to V5, VOUT, and VREG voltages are based on VDD=0 V. 2. Voltages VDD ≥ V1 ≥ V2 ≥ V3 ≥ V4 ≥ V5 must always be satisfied. 3. If an LSI exceeds its absolute maximum rating, it may be damaged permanently. It is desirable to use it under electrical characteristics conditions during general operation. Otherwise, an LSI malfunction or reduced LSI reliability may result. 4. The moisture resistance of the flat package may drop during soldering. Take care not to excessively heat the package resin during chip mounting. 6 SED1526/28 Series s ELECTRICAL CHARACTERISTICS q DC Characteristics (VDD = 5 V ± 10%, VSS = 0 V, Ta = –40 to +85°C unless otherwise noted.) Item Power voltage (1) Operating voltage (2) Operational Operational Operational Operational High-level input voltage Symbol VDD V5 V 1 , V2 V 3 , V4 VIHC VDD = 2.7 V Low-level input voltage CMOS VILC VDD = 2.7 V High-level output voltage VOHC IOH = –1 mA Condition Min. 2.4 –13.0 0.6 × V5 V5 0.7 × VDD 0.8 × VDD VSS VSS 0.8 × VDD Typ. Max. 6.0 –4.0 VDD 0.4 × V5 VDD VDD 0.3 × VDD 0.2 × VDD VDD VDD 0.2 × VDD 0.2 × VDD 0.8 × VDD 0.8 × VDD 0.6 × VDD 0.6 × VDD 1.0 3.0 15.0 30.0 µA µA KΩ *6 *7 SEG0 to 79 COS0 to 15 COMS *9 VDD Input pins *8 (Ta = 25°C) Max. 18 24 15 19 Unit µA Remarks *12 V *5 V *5 V *4 V *4 V *3 Unit V V V V V Pin used VDD *1 V5 V1, V2 V3, V4 *3 *2 VDD = 2.7 V, IOH = –0.5 mA 0.8 × VDD Low-level output voltage VOLC IOH = 1 mA VDD = 2.7 V, IOL = 0.5 mA High-level input voltage Schmitt VIHS VDD = 2.7 V Low-level input voltage VILS VDD = 2.7 V Input leakage current Output leakage current LCD driver ON resistance ILI ILO RON Ta = 25°C V5 = –0.5 V VSS VSS 0.4 × VDD 0.4 × VDD 0.2 × VDD 0.2 × VDD –1.0 –3.0 Static current consumption Input pin capacity CL output frequency IDDQ CIN CS = CL = VDD Ta = 25°C, f = 1 MHz Ta = 25°C, VDD = 2.7 to 5 V 2.4 0.05 5.0 2.9 3.0 8.0 3.7 µA pF kHz fCL q Dynamic current consumption (1) when the built-in power supply is OFF Item SED1526 Symbol IDD (1) Conditions VDD = 5.0V, V5–VDD = –6.0V VDD = 3.0V, V5–VDD = –6.0V SED1528 VDD = 5.0V, V5–VDD = –8.0V VDD = 3.0V, V5–VDD = –8.0V Min. – – – – Typ. 9.1 12.0 7.5 9.5 7 SED1526/28 Series q Dynamic current consumption (2) when the built-in power supply is ON Item SED1526 Symbol IDD (2) Conditions VDD = 5.0V, V5–VDD = –6.0V, dual boosting VDD = 3.0V, V5–VDD = –6.0V, triple boosting SED1528 VDD = 5.0V, V5–VDD = –8.0V, dual boosting VDD = 3.0V, V5–VDD = –8.0V, triple boosting Min. – – – – Typ. 28 52 29 48 Max. 56 104 58 96 Ta = 25°C Max. 6 Unit µA Remarks — Unit µA Ta = 25°C Remarks *13 q Current consumption during Power Save mode VSS = 0 V, VDD = 2.7 to 5.5 V Item Power save mode Symbol IDDS1 Conditions SED1526, SED1528 Min. — Typ. 3 q Typical current consumption characteristics (reference data) • Dynamic current consumption (1) when LCD external power mode lamp is ON 20 (µA) 15 IDD(1) 10 SED1526 5 SED1527, SED1528 Remarks: Conditions: The built-in power supply is OFF and an external power supply is used. SED1526 V5 -VDD = –6.0V SED1528 V5 -VDD = –8.0V *12 0 1 2 3 VDD 4 5 6 7 (V) • Dynamic current consumption (2) when the LCD built-in power supply lamp is ON 80 (µA) 60 IDD(2) 40 SED1526 SED1528 Conditions: The built-in power supply is ON. SED1526 V5 -VDD = –6.0V dual boosting SED1528 V5 -VDD = –8.0V triple boosting *13 Remarks: 20 0 1 2 3 VDD 4 5 6 7 (V) 8 SED1526/28 Series • Current consumption IDD during access (2) during MPU access cycle 10 (mA) 1 IDD(2) 0.1 0.01 SED1528 It shows the current consumption when a checker pattern is always written in f SYNC timing. When not accessed, only the current consumption of I DD (2) occurs. Conditions: SED1526 V5 -VDD = –6.0V, dual boosting SED1528 V5 -VDD = –8.0V, triple boosting Ta = 25°C SED1526 0 0.01 0.1 1 f CYC (MHz) 10 Item Built-in power circuit *1 *2 *3 *4 *5 *6 *7 *8 *9 *10 *11 *12 *13 Input voltage Booster output voltage Voltage regulator circuit operating voltage Voltage follower operating voltage Reference voltage Symbol VDD VOUT VOUT V5 VREG VDD reference VDD reference Conditions — Min. 2.4 Typ. — — — — –3.1 Max. 6.0 — –4.0 –4.0 –2.7 Unit V V V V V Pins used *10 VOUT VOUT *11 VR VDD reference (during triple boosting) –16.5 –16.5 –13.0 –3.5 VDD reference Ta = 25°C * See notes below. Although the wide range of operating voltage is guaranteed, a spike voltage change during access to the MPU is not guaranteed. The operating voltage range of the VDD and V5 systems (See Figure 9.) The operating voltage range is applied if an external power supply is used. Pins D0 to D5, A0, CS1, CS2, RD (E), WR (R/W), M/S, CL, and FR Pins D0 to D7, FR, and CL Pins SI (D7), SCL (D6), SR1, and SR2 Pins A0, RD (E), WR (R/W), CS1, CS2, M/S, SR1, and SR2 Applied if pins D0 to D7, FR, and CL are high impedance. For the relationship between CL output frequency and frames, see Figure 7. For the relationship between CL output frequency and power voltage, see Figure 8. For the relationship between CL output frequency and temperature, see Figure 11. The resistance when the 0.1-volt voltage is applied between the SEG and COM output terminals and each power terminal (V1, V2, V3 or V4). It must be within operating voltage (2). RON = 0.1 V/∆I where, ∆I is the current that flows between power supply and SEG or COM terminal when the 0.1-volt voltage is applied. If the triple voltage by the built-in power circuit are used the VDD primary power must be used within the input voltage range. The V5 voltage can be adjusted within the voltage follower operating range by use of voltage regulator. Applied if the built-in oscillation circuit is used and if not accessed by the MPU. Applied if the built-in oscillation circuit and the built-in power circuit are used, and if not accessed by the MPU. The current flowing through the voltage regulator resistors (R1, R2 and R3) is not included. When the built-in voltage booster is used, the current consumption for the VDD power supply is shown. 9 SED1526/28 Series • Relationship between CL output frequency and frames (SED 1526 series) The relationship between CL output frequency (fCL) and frame frequency (fF) can be determined as follows: Duty SED1526 SED1528 1/9 1/17 1/33 • Relationship between CL output frequency and power voltage 5 4 [KHz] 3 f CL 2 1 0 2 4 VDD [V] 6 8 Ta = 25°C fF 8 • fCL/288 8 • fCL/272 8• f CL=2.90 fCL/264 Figure 7 ("fF" indicates the LCD current alternating cycle, but not the cycle of f F signals.) Figure 7 q LCD Panel and Wiring Examples • Single-chip configuration SED1526 : 80 × 17dot SED1528 : 64 × 33dot SEG 80 SEG 64 SED1526 COM 17 COM 17 SED1528 COM 16 10 q TPC shape SED1526T0A (Reference drawing) (Marking area) (Mold area) This dimensional outline drawing is subject to change for improvements without prior notice. (Marking area) IC center Output terminal pattern shape (Mold area) SED1526/28 Series Specifications • Base: U-rexS, 75µm • Copper foil: Electrolytic copper foil, 35µm • Sn plating • Product pitch: 91P (42.75mm) • Solder resist positional tolerance: ±0.3 11 SED1526/28 Series s PACKAGE DIMENSIONS Plastic QFP5–128pin 102 103 23.6±0.4 20±0.1 65 64 INDEX 128 39 0.15±0.05 1 38 0.5 0.2±0.1 0.15±0.05 0° 10° 0.8±0.2 1.8 0.1 2.7±0.1 3max 17.6±0.4 14±0.1 Unit : mm The package dimensions are subject to change without notice. NOTICE: No part of this material may be reproduced or duplicated in any form or by any means without the written permission of Seiko Epson. Seiko Epson reserves the right to make changes to this material without notice. Seiko Epson does not assume any liability of any kind arising out of any inaccuracies contained in this material or due to its application or use in any product or circuit and, further, there is no representation that this material is applicable to products requiring high level reliability, such as, medical products. Morever, no license to any intellectual property rights is granted by implication or otherwise, and there is no representation or warranty that anything made in accordance with this material will be free from any patent or copyright infringement of a third party. This material or portions thereof may contain technology or the subject relating to strategic products under the control of the Foreign Exchange and Foreign Trade Control Law of Japan and may require an export license from the Ministry of International Trade and Industry or other approval from another government agency. IBM is registered trademark of International Business Machines Corporation, U.S.A. © Seiko Epson Corporation 1996 All right reserved. ELECTRONIC DEVICE MARKETING DEPARTMENT IC Marketing & Engineering Group 421-8 Hino, Hino-shi, Tokyo 191, JAPAN Phone: 0425-87-5816 FAX: 0425-87-5624 International Marketing Department I (Europe, U.S.A.) 421-8 Hino, Hino-shi, Tokyo 191, JAPAN Phone: 0425-87-5812 FAX: 0425-87-5564 International Marketing Department II (Asia) 421-8 Hino, Hino-shi, Tokyo 191, JAPAN Phone: 0425-87-5814 FAX: 0425-87-5110 First issue Dec., 1996 Printed Nov. 1996 in Japan H 12