S1C17M01
Flow meter controller with AFE
■ DESCRIPTIONS
The S1C17M01 is an ultra low-power MCU equipped with an MR (magneto resistive) sensor controller that allows an MR
sensor array optimized for flow measurement (recommended sensor: KG1205-61 manufactured by KOHDEN Co., Ltd.) to be
connected directly. This IC includes an LCD driver to display the flow count and the readouts on the indicator, and the
synchronous serial interface, UART, and I2C interface for wireless communication with a remote meter reading system. This
IC allows measurement of various environmental conditions such as a temperature and humidity measurement using the R/F
converter, and a supply voltage measurement using the supply voltage detection circuit.
FEATURES
Model
CPU
CPU core
Other
Embedded Flash memory
Capacity
Erase/program count
Other
Embedded RAM
Capacity
Embedded display RAM
Capacity
Clock generator (CLG)
System clock source
System clock frequency
(Operating frequency)
IOSC oscillator circuit
(boot clock source)
OSC1 oscillator circuit
EXOSC clock input
Other
I/O port (PPORT)
Number of general-purpose I/O ports
Number of input interrupt ports
Timers
Watchdog timer (WDT)
Real-time clock (RTCA)
16-bit timer (T16)
Supply voltage detection circuit (SVD)
Detection level
Other
Serial interfaces
UART (UART)
Synchronous Serial Interface (SPIA)
2
I C (I2C)
LCD driver (LCD8A)
LCD output
LCD contrast
S1C17M01
Seiko Epson original 16-bit RISC CPU core S1C17
On-chip debugger
32K bytes (for both instructions and data)
50 times (min.) *Programming by the debugging tool ICDmini
Security function to protect from reading/programming by ICDmini
On-board programming function using ICDmini
4K bytes
32 bytes
3 sources (IOSC/OSC1/EXOSC)
16.3 MHz (max.)
7.37 MHz (typ.) embedded oscillator
5 us (max.) starting time (time from cancelation of SLEEP state to vector table read by the
CPU)
32.768 kHz(typ.) crystal oscillator
Oscillation stop detection circuit included
16.3 MHz (max.) square or sine wave input
Configurable system clock division ratio
Configurable system clock used at wake up from SLEEP state
Operating clock frequency for the CPU and all peripheral circuits is selectable.
19 bits (max.) (Pins are shared with the peripheral I/O.)
8 bits
Generates NMI or watchdog timer reset.
128 – 1 Hz counter, second/minute/hour/day/day of the week/month/year counters
Theoretical regulation function for 1-second correction
Alarm and stopwatch functions
5 channels
2 channels can generate the SPIA master clock.
20 levels (1.8 to 3.7 V)
Intermittent operation mode
Generates an interrupt or hardware reset according to the detection level evaluation.
1 channel
Baud-rate generator included, IrDA1.0 supported
2 channels
The 16-bit timer (T16) can be used for the baud-rate generator in master mode.
1 channel
Baud-rate generator included
32 SEG x 1 to 4 COM (max.), 28 SEG x 5 to 8 COM (max.)
16 levels (2.55 to 3.44 V)
S1C17M01
Other
R/F converter (RFC)
Conversion method
Number of conversion channels
Supported sensors
MR sensor controller (AMRC)
MR sensor interface
Measurement functions
External interface
Reset
#RESET pin
Watchdog timer reset
Supply voltage detection circuit reset
Interrupt
Non-maskable interrupt
Programmable interrupt
Power supply voltage
VDD operating voltage
VDD operating voltage when AMRC is active
VDD operating voltage for Flash
programming
Operating temperature
Operating temperature range
Current consumption
SLEEP mode
HALT mode
RUN mode
Shipping form
1
2
1/3 bias power supply included, external voltage can be applied.
CR oscillation type with 24-bit counters
1 channel (Up to two sensors can be connected.)
DC-bias resistive sensors and AC-bias resistive sensors
MR sensor is directly connectable.
Evaluates normal rotation, reverse rotation, stop, and phase dropout by inputting
analog rotation phase signals from an MR sensor.
Pulse output function
External hysteresis resistor control function
Reset when the reset pin is set to low.
Reset when the watchdog timer overflows (can be enabled/disabled using a register).
Reset when SVD detects the set voltage level (can be enabled/disabled using a register).
4 systems (Reset, address misaligned interrupt, debug, NMI)
External interrupt: 1 system (8 levels)
Internal interrupt: 15 systems (8 levels)
1.8 to 5.5 V
2.0 to 5.5 V
1.8 to 5.5 V (VPP = 7.5 V external power supply is required.)
-40 to 85 ℃
0.35 uA
IOSC = OFF, OSC1 = OFF, VDD = 3.6 V
0.8 uA
IOSC = OFF, OSC1 = 32 kHz, RTC = ON, VDD = 3.6 V
1.3 uA
IOSC = OFF, OSC1 = 32 kHz, RTC = ON, CPU = OSC1, LCD = ON (no panel load, VC2
reference)
12.5 uA
IOSC = OFF, OSC1 = 32 kHz, RTC = ON, CPU = OSC1, LCD = ON (no panel load, VC2
reference)
2.5 mA @ 1/1 divided clock
IOSC = ON, OSC1 = 32 kHz, RTC = ON, CPU = IOSC, LCD = OFF (no panel load)
500 uA @ 1/4 divided clock
IOSC = ON, OSC1 = 32 kHz, RTC = ON, CPU = IOSC, LCD = OFF (no panel load)
TQFP13-64pin (Lead pitch: 0.5 mm)
Die form (Pad pitch:100 um)
Seiko Epson Corporation
2
S1C17M01
BLOCK DIAGRAM
DCLK
DSIO
DST2
32-bit RAM bus
Internal RAM
4K bytes
Instruction bus
Flash memory
32K bytes
CPU core & debugger
(S1C17)
System clock
VPP
Interrupt request
16 bit internal bus
Interrupt signal
Clock generator
(CLG)
FOUT
OSC1
OSC2
EXOSC
IOSC
oscillator
OSC1
oscillator
EXOSC
Input circuit
Interrupt
Controller
(ITC)
I/O port
(PPORT)
VDD
VSS
VD1
System reset controller
(SRC)
Power generator
(PWG)
P00-07,
P14-17,
P20-21,
P56-57,
PD0-D2
I 2C
(I2C)
Watchdog timer
(WDT)
Real-time clock
(RTCA)
#RESET
Synchronous
serial interface
(SPIA)
2 Ch.
Supply voltage
detector
(SVD)
SDI0-1
SDO0-1
SPICLK0-1
#SPISS0-1
SDA0
SCL0
R/F converter
(RFC)
RFIN0
REF0
SENA0
SENB0
RFCLKO0
LCD driver
(LCD8A)
VC1-3
CP1-2
COM0-7
SEG0-31
LFRO
RTC1S
EXSVD
16-bit timer
(T16)
5 Ch.
EXCL0-1
UART
(UART)
USIN0
USOUT0
8 bit
Display RAM
32 bytes
MR sensor
controller
(AMRC)
CMPIN0-1P
CMPIN0-1N
EVPLS
SENSEN
EXHYS0-1
NOTICE:
No part of this material may be reproduced or duplicated in any form or by any means without the written permission of Seiko Epson.
Seiko Epson reserves the right to make changes to this material without notice. Seiko Epson does not assume any liability of any kind
arising out of any inaccuracies contained in this material or due to its application or use in any product or circuit and, further, there is no
representation that this material is applicable to products requiring high level reliability, such as, medical products. Moreover, no license
to any intellectual property rights is granted by implication or otherwise, and there is no representation or warranty that anything made in
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contain technology or the subject relating to strategic products under the control of the Foreign Exchange and Foreign Trade Law of Japan
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©Seiko Epson Corporation 2012, All rights reserved
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3
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Document code: 412366700
First issue June, 2012 in Japan
