GRAPHICS
S1D13719
S1D13719 Mobile Graphics Engine
February 2012
The S1D13719 is a Mobile Graphics Engine solution designed with support for the digital video revolution in
mobile products. The S1D13719 contains an integrated dual port camera interface, hardware JPEG
encoder/decoder and can be interfaced to an external MPEG codec. Seamlessly connecting to both direct and
indirect CPU interfaces, it provides support for up to two LCD panels. The Mobile Graphics Engine supports all
standard TFT panel types and many extended TFT types, eliminating the need for an external timing control IC.
The S1D13719, with it’s 512K bytes of embedded SRAM and rich feature set, provides a low cost, low power,
single chip solution to meet the demands of embedded markets requiring Digital Video, such as Mobile Communications devices and Palm-size PDAs.
Additionally, products requiring a rotated display can take advantage of the SwivelView™ feature which provides
hardware rotation of the display memory transparent to the software application. The S1D13719 also provides
support for “Picture-in-Picture Plus” (a variable size window with overlay functions). Higher performance is
provided by the Hardware Acceleration Engine which provides 2D BitBLT functions.
The S1D13719 provides impressive support for cellular and other mobile solutions requiring Digital Video support.
However, its impartiality to CPU type or operating system makes it an ideal display solution for a wide variety of
applications.
■ FEATURES
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• Fractional View and Capture hardware resizer,
Embedded 512K byte SRAM Display Buffer
Low Operating Voltage
Direct and Indirect CPU interfaces
Programmable resolutions and color depths
Support for 2 panels (LCD2 must be RAM integrated)
Support for RGB, Serial and Parallel I/F Panels
Extended TFT interfaces including HR-TFT
Internal PLL or digital clock input
SD Memory Card interface
Dual port Camera interface
reduction from 1x to ½x size in 128 steps
• Fractional Zoom for YUV 4:2:2, expand from 1x to
2x size in 128 steps
• Hardware JPEG encoder/decoder
• YUV to RGB converter
• SwivelViewTM (90°, 180°, 270° hardware
rotation of displayed image)
• (Patent # 5,734,875 - Patent # 5,956,049 - Patent #6,262,751)
• “Picture-in-Picture Plus”
• 2D Hardware Acceleration Engine
• Software Initiated Power Save Mode
■ SYSTEM BLOCK DIAGRAM
Main Display
RGB or Parallel
Secondary Display
Serial or Parallel
(Ram Integrated)
13719
Camera Interface
(dual port)
Data and
Control Signals
SD Card
Interface
X59A-C-001-01
CPU
S1D13719 Includes:
• 512K Bytes SRAM
• JPEG Encoder/Decoder
• Fractional View/Capture Resizer
• Fractional Zoom
• 2D Hardware Acceleration
• Multiple panel support
Revision 1.2
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GRAPHICS
S1D13719
■ DESCRIPTION
Integrated Display Buffer
• 512K bytes of embedded SRAM
• Addressable as a single linear address space
• Overlay Functions
• Pixel Doubling: doubles the effective resolution
• Video Invert: inverts display data
Panel Support
Digital Video
• Supports up to 2 LCD panels
• LCD1: 9/12/18/24-bit RGB panel
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• 8/16/32 bit-per-pixel (bpp) support
• Picture-in-Picture Plus: displays a variable size window
overlaid over the background image
CPU Interface
• 16-bit Generic Asynchronous CPU interface
• Direct and Indirect addressing
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Display Features
LCD2: 8/9-bit Serial Ram Integrated panel
LCD1: 8/16/18/24-bit Parallel Ram Integrated panel
LCD2: 8/9-bit Serial Ram Integrated panel
LCD1: 8/16/18/24-bit Parallel Ram Integrated panel
LCD2: 8/16/18/24-bit Parallel Ram Integrated panel
LCD1: 9/12/18/24-bit RGB panel
LCD2: 8-bit Parallel Ram Integrated panel
TFT, HR-TFT, Casio TFT, α-TFT, ND-TFD, and
Extended TFT
Typical resolution of:
up to 320x480 at 16 bpp
up to 320x240 at 32 bpp
• Dual port Camera Interface (YUV 4:2:2)
• Hardware JPEG Encoder (YUV 4:2:2, 4:1:1, 4:2:0)
• Hardware JPEG Decoder (YUV 4:4:4, 4:2:2, 4:1:1,
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4:2:0)
YUV Display/Capture (YUV 4:2:2, 4:2:0)
Memory Image JPEG Encode (YUV 4:2:2, 4:1:1, 4:2:0)
View and Capture hardware resizer, reduction from 1x
to ½x size in 128 steps with trimming functions
Fractional Zoom for YUV 4:2:2, expand from 1x to 2x
size in 128 steps
YUV to RGB and RGB to YUV converters
Support for external MPEG codec interface
Miscellaneous
Acceleration
• 2D BitBLT Engine
• SwivelView: 90°, 180°, 270° hardware rotation of
displayed image
• Mirror Display: hardware “mirror” image of display
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Internal PLL or digital clock input
Software initiated power save mode
COREVDD 1.8 volts and IOVDD 3.0 volts
PFBGA 180-pin package
CONTACT YOUR SALES REPRESENTATIVE FOR THESE COMPREHENSIVE DESIGN TOOLS
• S1D13719 Technical
Documentation
• S1D13719 Evaluation
Boards
• CPU Independent
Software Utilities
• Royalty Free source level
driver code
Japan
Seiko Epson Corporation
IC International Sales Group
421-8, Hino, Hino-shi
Tokyo 191-8501, Japan
Tel: 042-587-5812
Fax: 042-587-5564
http://www.epson.co.jp/
North America
Epson Electronics America, Inc.
214 Devcon Drive
San Jose, CA 95112, USA
Tel: (800) 228-3964
Fax: (408) 922-0238
http://www.eea.epson.com/
Taiwan
Epson Taiwan Technology & Trading Ltd.
14F, No. 7
Song Ren Road
Taipei 110
Tel: 02-8786-6688
Fax: 02-8786-6677
http://www.epson.com.tw/
Hong Kong
Epson Hong Kong Ltd.
20/F., Harbour Centre
25 Harbour Road
Wanchai, Hong Kong
Tel: 2585-4600
Fax: 2827-4346
http://www.epson.com.hk/
Europe
Epson Europe Electronics GmbH
Riesstrasse 15
80992 Munich, Germany
Tel: 089-14005-0
Fax: 089-14005-110
http://www.epson-electronics.de/
Singapore
Epson Singapore Pte Ltd
1 HarbourFront Place #03-02
HarbourFront Tower One
Singapore, 098633
Tel: (65) 6586-5500
Fax: (65) 6271-3182
http://www.epson.com.sg/
© SEIKO EPSON CORPORATION 2004-2012. All rights reserved.
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Revision 1.2
X59A-C-001-01