PBL385701SOT

September 1997 PBL 385 70 Universal Speech Circuit Description. PBL 38570 is a monolithic integrated speech transmission circuit for use in electronic telephones. It is designed to accomodate either a low impedance dynamic or an electret microphone. A separate input for DTMF dialling tones that is controlled by a mute signal, and a signal summing point at the transmitter input, are available. An internally preset line length compensation can be adjusted with external resistors to fit into different current feed systems as for ex. 48 V, 2 x 200 ohms, 48 V, 2 x 400 ohms and 48 V, 2 x 800 ohms. The line length compensation can be shut off in either high or low gain mode. Application dependent parameters such as line balance, side tone level, transmitter and receiver gains and frequency responces are set independently by external components which means an easy adaption to various market needs. The setting of the parameters if carried out in certain order will counteract the interaction between the settings. A number of different DC - supplies are provided to feed microphones and diallers. Key features. • Minimum number of external components, 7 capacitors and 11 resistors. Easy adaption to various market needs. Mute control input for operation with DTMF - generator. A separate input for DTMF tones controlled by mute. Transmitter and receiver gain regulation for automatic loop loss compensation. Extended current and voltage range 5 - 130 mA, down to 2 V. Differential microphone input for good balance to ground. Balanced receiver output stage. Stabilized DC - supplies for low current CMOS diallers and electret microphones. 18 - pin DIP and 20 - pin SO packages. Short start up time. Excellent RFI performance. • • • • • • • • • • • 1 12 Mic. 13 DC-supply AM Telephone line 8 Mute (active low) 9 7 Sense input 6 5 11 3 2 15 16 14 +4 P 18 B L 1 AT AR 5 DC-output for external devices Gain regulation 4 2 3 1. Line impedance and radio interference suppression. 2. Transmit gain and frequency response network. 3. Receive gain and frequency response network. 4. Side tone balance network. 5. DC-supply components. 20-pin plastic SO 18-pin plastic DIP Figure 1. Functional diagram. DIP package. 1 P B L + + 38 57 0 38 DTMF input 10 AD 17 57 PBL 385 70 0 PBL 385 70 Maximum Ratings Parameter Symbol Min Max Unit Line voltage, tp = 2 s Line current, continuous DIP Line current, continuous SO package Operating temperature range Storage temperature range No input should be set on higher level than pin 4 (+C). VL IL IL TAmb TStg 0 0 0 -40 -55 18 130 100 +70 +125 V mA mA °C °C MUTE R = 0-4kΩ L 0 ohm when artificial line is used 5H+5H R feed = 400Ω+400Ω VM IM IL + C ARTIFICIAL LINE + LINE I DC2 MIC Z Mic = 350Ω V3 + E = 48.5V V2 600Ω V L VDC2 IDC1 VDC1 PBL 385 70 with external components See fig. 4 REC V1 C = 1µF when artificial line is used 470µF when no artificial line V4 Z Rec= 350Ω - LINE Figure 2. Test set up without rectifier bridge. MUTE VM RL = 0 - 4kΩ IM Uz= 15-16V 5H+5H R IL V + LINE MIC feed = 400Ω+400Ω 1µF V2 + Z Mic = 350Ω V3 L I DC2 600Ω + E = 50.0V VDC2 IDC1 PBL 385 70 with external components See fig. 4 REC V1 VDC1 V4 Z Rec = 350Ω - LINE Figure 3. Test set up with rectifier bridge. +Line 1 C9 220n DTMF input 10 PBL 385 70 AD AT AR 17 R14 310Ω R16 Mic. 350Ω 2.7k 12 13 DC-supply AM 18 Rec. 350Ω 8 Mute (active low) 9 7 Sense input 6 5 11 3 2 R7 910Ω R8 560Ω R10 6.2k 15 C6 47n 16 14 R11 62k +4 R4 18k C3 100n * R1 DC-output for external devices C7 Gain regulation + 47µF * R2 R5 22k R6 75Ω R12 11k R9 11k C5 100n R13 10Ω R3 910Ω C2 15n + C1 47µF -Line Figure 4. Circuit with external components for test set up. * Not used in test set up. 18 pin DIP package. 2 PBL 385 70 Electrical Characteristics At TAmb = + 25° C. No cable and line rectifier unless otherwise specified. Parameter Ref. fig. Conditions Min Typ Max Unit Line voltage, VL Transmitting gain, note 1 2 2 2 2 2 2 2 2 2 2 2 2 Transmitting range of regulation Transmitting frequency response Transmitter input impedance pin 3 Transmitter dynamic output Transmitter max output Transmitter output noise Microphone input impedance pin 12 (14),13 (15) Receiving gain, note 1 IL = 15 mA IL = 100 mA 20 •10 log (V2 / V3); 1 kHz RL = 0 RL = 400 Ω RL = 900 Ω - 2.2 kΩ 1 kHz, RL = 0 to 900 Ω 200 Hz to 3.4 kHz 1 kHz 200 Hz - 3.4 kHz ≤ 2% distortion, IL = 20 - 100 mA 200 Hz - 3.4 kHz IL = 0 - 100 mA, V3 = 0 - 1 V Psoph-weighting, Rel 1 Vrms, RL = 0 1 kHz 20 • 10 log (V4 / V1); 1 kHz RL = 0 Ω RL = 400 Ω RL = 900 Ω - 2.2 kΩ 1 kHz, RL = 0 to 900 Ω 200 Hz to 3.4 kHz 1kHz 1 kHz, 200 Hz - 3.4 kHz ≤ 2% distortion, IL = 20 - 100 mA Measured with line rectifier 200 Hz - 3.4 kHz, IL = 0 - 100 mA, V1= 0 - 50 V A-weighting, Rel 1Vrms, with cable 0 - 5 km, Ø = 0.5 mm, 0 - 3 km, Ø = 0.4 mm 3.3 11 41 43.5 46 3 -1 13.5 3.7 13 43 45.5 48 5 4.1 15 45 47.5 50 7 1 V V dB dB dB dB dB kΩ Vp Vp dB Psoph kΩ 17 1.5 3 -75 1.7(//2.7) note 3 20.5 Receiving range of regulation Receiving frequency response Receiver input impedance Receiver output impedance Receiver dynamic output note 2 Receiver max output 2 2 2 2 2 2 2 2 3 -18.5 -16 -13.5 3 -1 30.4 -14.5 -12 -9.5 7 1 38 45.6 3(+310), note 3 0.5 0.9 -16.5 -14 -11.5 5 dB dB dB dB dB kΩ Ω Vp Vp Receiver output noise 2 -85 dB A Mute input voltage at mute (active low) DC-supply voltage 2 2 IL = 20 - 100 mA IDC = 0 mA IDC = 2 mA VDC = 2.35 V VM = 0.3 V, 1 kHz 1 kHz 24.5 20 0.3 V DC-supply current, pin 8. DC-output pin 8 input leakage current (no supply) DTMF transmitting gain DTMF input impedance 2 4 2 2 2.1 1.95 2 2.35 2.2 0.1 26.5 25 2.6 2.6 V V mA µA dB kΩ 28.5 30 Notes 1. Adjustable to both higher and lower values with external components. 2. The dynamic output can be doubled, see applications information. 3. External resistor in the test set up. 3 PBL 385 70 +L 1 TO 2 TI 3 +C 4 Mute 5 GR 6 DCS 7 DCO 8 DCC 9 18 RE 2 17 RE 1 16 DR 15 RI 14 -L 13 MI 2 12 MI 1 11 MO 10 DI +L TO TI +C Mute GR DCS DCO DCC NC 1 2 3 4 5 6 7 8 9 10 20 19 18 17 16 15 14 13 12 11 RE 2 RE 1 DR RI -L MI 2 MI 1 MO DI NC 18-pin DIP 20-pin SO Figure 5. Pin configuration. Pin Descriptions Refer to figure 5. DIP SO Name 1 2 1 2 +L TO Function Output of the DC-regulator and transmit amplifier, connected to the line through a polarity guard diode bridge. Output of the transmit amplifier, connected through a resistor of 47 to 100 ohm to -L, sets the DC-characteristics of the circuit. The output has a low AC output impedance and the signal is used to drive a side tone balancing network. Input of transmit amplifier. Input impedance 17 kohm ± 20 %. Positive power supply terminal for most of the circuitry inside the PBL 385 70 (about 1 mA current consumption). The +C pin must be connected to a decoupling capacitor of 47 µF to 150 µF. When low, speech circuit is muted and the DTMF input is enabled. Maximum voltage (at mute) is 0.3 V, current sink requirement of external driver is min. 50 µA. Control input for the gain regulation circuitry. Sense input to the DC-supply. Output from the DC-supply. Control of the DC-supply. Input for the DTMF-signal. Input impedance is 25 kohm ± 20 %. Output of the microphone amplifier or DTMF-amplifier. 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 3 4 5 6 7 8 9 12 13 14 15 16 17 18 19 20 10 11 TI +C Mute GR DCS DC1 DC2 DI MO MI 1 MI 2 -L RI DR RE 1 RE 2 } } Inputs to the microphone amplifier. Input impedance 1.7 kohm ± 20 %. The negative power terminal, connected to the line through a polarity guard diode bridge. Input of receiver amplifier. Input impedance is 38 kohm ± 20 %. Control input for the receiver amplifier driving capacity. Receiver amplifier outputs. Output impedance is approximately 3 ohm. NC NC 4 PBL 385 70 Functional description Design procedure; ref. to fig.4. The design is made easier through that all settable parameters are returned to ground (-line) this feature differs it from bridge type solutions. To set the parameters in the following order will result in that the interaction between the same is minimized. 1. Set the circuit impedance to the line, either 600Ω or complex. (R3 and C1). C1 should be big enough to give low impedance compared with R3 in the telephone speech frequency band. Too large C1 will make the start-up slow. See fig. 6. Set the DC-characteristic that is required in the PTT specification or in case of a system telephone in the PBX specification (R6). There are also internal circuit dependent requirements like supply voltages etc. Set the attac point where the line length regulation is supposed to cut in (R1 and R2). Note that in some countries the line length regulation is not allowed. In most cases the endresult is better and more readily achieved by using the line length regulation (line loss compensation) than without. See fig. 12. Set the transmitter gain and frequency response. Set the receiver gain and frequency response. See text how to limit the max. swing to the earphone. Adjust the side tone balancing network. Set the RFI suppression components in case necessary. In two piece telephones the often ”helically” wound cord acts as an aerial. The microphone input with its high gain is especially sensitive. Circuit protection. Apart from any other protection devices used in the design a good practice is to connect a 15V 1W zener diode across the circuit , from pin 1 to -Line. 2. 3. 4. 5. 6. 7. 8. Impedance to the line The AC- impedance to the line is set by R3, C1 and C2. Fig.4. The circuits relatively high parallel impedance will not influence it to any noticeable extent. At low frequencies the influence of C1 can not be neglected. Series resistance of C1 that is dependent on temperature and quality will cause some of the line signal to enter pin 4. This generates a closed loop in the transmitter amplifier that will create an active impedance thus lowering the impedance to the line. The impedance at high frequencies is set by C2 that also acts as a RFI suppressor. In many specifications the impedance towards the line is specified as a complex network. See fig. 6. In case a). the error signal entering pin 4 is set by the ratio ≈Rs/ R19 (909Ω), where in case b). the ratio at high frequencies will be Rs/220Ω because the 820 Ω r esistor is bypassed by a capacitor. To help up this situation the complex network capacitor is connected directly to ground (-line), case c). making the ratio Rs/220Ω+820Ω and thus lessening the error signal. Conclusion: Connect like in case c) when complex impedance is specified. +Line 1 4 a) R3 b) c) PBL 385 70 3 2 Rs ≈1Ω + C1 Example: How to connect a complex network. -Line C2 R6 Figure 6. AC-impedence 5 PBL 385 70 DC - characteristic The DC - characteristic that a telephone set has to fulfill is mainly given by the network administrator.Following parameters are useful to know when the DC behaviour of the telephone is to be set: The voltage of the feeding system. The line feeding resistance 2x... ohms. The maximum current from the line at zero line length. The min. current at which the telephone has to work (basic function). The lowest and highest voltage permissible across the telephone set. The highest voltage that the telephone may have at different line currents is normally set by the network owners specification. The lowest voltage for the telephone is normally set by the voltages that are needed for the different parts of the telephone to function. For ex. for transmitter output amplifier, receiver output amplifier, dialler, speech switching and loudspeaker amplifier in a handsfree telephone etc. R6 will set the slope of the DC-char. and the rest of the level is set by some constants in the circuit as shown in the equation below. The slope of the DC-char. will also influence the line length regulation (when used ) and thus the gain of both transmitter and receiver. See the table under gain regulation. V 16 14 12 10 8 6 4 2 V telephone line V line V pin 4 V pin 2 V pin 8 o. 9 (DC supply) I L 20 40 60 80 100 120 mA Figure 7. DC-characteristics. (R6 = 75Ω) (a) 11 12 PBL 385 70 (b) 11 12 4 PBL 385 70 V Line ≈ 2 + 1.5 ⋅ R 6 ⋅ I line V telephoneline ≈ 1.5 V + V line M 13 Microphone amplifier The microphone amplifier in PBL38570 is divided into two stages. The first stage is a true differential amplifier providing high CMRR (-55 to -65 dB typical) with voltage gain of 19 dB. This stage is followed by a gain regulated amplifier with a regulation range of 5 ± 2 dB. The input of the microphone amplifier can be used for dynamic or electret transducers. See fig. 8. An electret microphone with a built in FET amplifier is to be seen from outside as a high impedance constant current generator and is normally specified with a load resistance of ≈ 2k. This is to be considered as max. value and by using it will render the max. gain from the microphone. This level of input signal that is unnecessary high will result in clipping in the microphone amplifier and could in mute condition permeate through the input to the circuits reference 6 + Dynamic microphone 13 + M Unbalanced electret mic. with balanced signal, DC-supply from pin 4. R DC Pin 8 or 9. (c) 11 12 4 PBL 385 70 (d) 11 12 PBL 385 70 M C+ 13 + 13 M + Balanced electret microphone Balanced electret microphone. An additional RC filterlink is recommended if pin 4 is used as a supply. Figure 8. Microphone options. PBL 385 70 and this way to all functions, resulting among other things in a bad mute. Hence it is better regarding noise perfomance and mute to rather use the gain of the microphone amplifier than the gain of the microphone itself (in case of electret) flat out. A more suitable level of gain from the microphone is achieved by using a load resistance of 330 - 820Ω. A low microphone impedance will also improve RFI suppression. Gain setting to the line is done at the input of the transmitter. The microphone amplifier has its own temperature stable reference to prevent overhearing to other parts and functions on the chip. It is possible to use the microphone amplifier as a limiter ( added to the limiter in the transmitter output stage ) of the transmitted signal. See fig. 9. The positive output swing is then limited by the peak output current of the microphone amplifier. The negative swing is limited by the saturation voltage of the output amplifier. The output of the amplifier is DC-vice at internal reference level (1.2V). The lowest negative level for the signal is reference minus one diode and sat. transistor drop. (1.2-0.6-0.1 = 0.5V) The correct clipping level is found by determining the composite AC- and DC-load that gives a maximum symmetrical unclipped signal at the output. This signal is then fed into the transmitter amplifier at a level that renders a symmetrical signal clipping on the line. (adjust with ratio R4,R5) The total transmitter gain when an electret microphone is used can then be adjusted with the load resistor of the electret microphones buffer amplifier. 11 (a) RA 3 11 (b) CA RA CA 3 RA 11 (c) CA 3 a (a),(c), (d) f (a and b) attn. = RTI//(RTI+RA) no attn. = RA = 0 CB RB attenuation a (b),(e) f 11 CC RA (d) 3 11 (e) RA CA 3 CC RA 11 (f) 3 CA RB CA CB RB CB a big CA RB attn.without dc. small CA (f) f attenuation attn.without dc. Figure 10. Network and frequency plots between microphone amplifier and transmitter. Transmitter amplifier The transmitter amplifier in PBL38570 consists of three stages. The first stage is an amplitude limiter for the input signal at TI, in order to prevent the transmitted signal to exceed a certain set level and cause distortion. The second stage amplifies further the signal from the first and adds it to a DC level from an internal DC-regulation loop in order to give the required DC characteristic to the telephone set. The output of this stage is TO. The third stage is a current generator that presents a high impedance towards the line and has its gain from TO to +L. The gain of this amplifier is ZL/R6 where ZL is the impedance across the telephone line. Hence, the absolute maximum signal How to calculate the gains in the transmitter channel. See fig. 2 and 4. Microphone amplifiers first stage 19 dB. Microphone amplifiers regulated second stage 10.5 dB - 15.5 dB Regulation interval 10.5 - 15.5 dB low gain 19.0 + 10.5 dB = 29.5 dB high gain 19.0 + 15.5 dB = 34.5 dB V2 RM R5 R load = ⋅ GM ⋅ ⋅ G TX ⋅ V 3 Z mic + R M R4 +R5 R6 RM = Microphone amplifier input resistance Rload = Rline // Rtelephone PBL 385 70 DC ( ref. ≈ 1.2V) constant current generator ex. calculate the gain of the transmitter stage GTX at 0 - line length: ref. minus a diode ≈ 0.5V 43 = 20log( 11 DCload ACload (1.7 / /2.7)k (17 / /22)k ) + 29.5 + 20log( ) 350 Ω + (1.7 / /2.7)k 18k + (17 / /22)k 600 Ω / /910 Ω ) + GTX + 20log( 75 Ω DC-load = R4+R5 AC-load = R4+R5//ZTI 43 = −2.51 + 29.5 − 9.17 + GTX + 13.66 GTX = 11.52 dB Figure 9. Micophone amplifier output clipping. 7 PBL 385 70 amplitude that can be transmitted to the line undistorted is dependent of R6. (amplitude limiting). The transmitter gain and frequency response are set by the RC-network between the pins 11 and 3. See fig.10. The capacitor for cutting the high end of frequency band is best to be placed directly at the microphone where it also will act as a RFI suppressor. The input signal source impedance to the transmitter amplifier input TI should be reasonably low in order to keep the gain spread down, saying that R4//R5 (see fig. 4) must be at least a factor 5 lower than the ZTin. Observe that the capacitor C1 should have a reasonably good temperature behaviour in order to keep the impedance rather constant. The V+C´s influence on the transmitter DCcharacteristic is shown in the fig.7 (DCcharacteristic), therefore the transmitter gain would change if the transmitted signal gives reason to an ac-voltage leak signal across C1 since this is a feedback point. If the transmitter has an unacceptable low sving to the line at low line currents 5k The capacitor C is optional Figure 11. Receiver arrangements. parallel across its output to limit the signal to the earphone and thus preventing an acoustical shock. A resistor in series with the output can very well be used to increase the protection level. Note, that the noise in the receiver is allways transmitter noise that has been more or less well balanced out by the side tone network. The RC - network (optional) at the output is to stabilize against the inductive load that an earphone represents. a). Adjustable with the divider R4,R5 for the transmitter and with R12 for the receiver. b). The attack point of the regulator is adjusted with the divider R1,R2 to either direction , up or down ,on the line current axis. c). The angle of elevation of the curve is mainly set by the value of R6. If the DCcharacteristics is set according to the line parameters and a correct value for R6 is chosen the angle is mostly correct but it can be adjusted with R6. The adjustement will affect the DC-characteristics aswell as most of the other parameters. This is why the DC-characteristic is set early in the design phase. Gain regulation. Both the receiver and transmitter are gain regulated (line loss compensated). There is a fixed default compensation on the chip that can be adjusted or or set to constant high or low gain mode. The input impedance at the gain regulation pin 6 is 5.5k ± 20%. The default regulation pattern is valid when the input is left open. Fig. 12 shows a typical transmitter or receiver gain pattern versus line length. The following will show, what to alter, to change the look of the curve. Receiver amplifier The receiver amplifier consists of three stages, the first stage being an input buffer that renders the input a high impedance. The second stage is a gain regulated differential amplifier and the third stage a balanced power amplifier. The power amplifier has a differential output with low DC- offset voltage, therefore a series capacitor with the load is normally not necessary. The receiver amplifier uses at max. swing 4-6 mA peak. This current is drawn from the +Line. The gain and frequency response is set at the input RI with a RC-network. The receiver gain can be regulated. The range of regulation from the input to the output is 5 ± 2 dB (19 to 24dB). The driving capacity of the power stage can be optimized by a resistor on pin16, an other method is to connect a resistor series in with the earphone itself. The balanced earphone amplifier can not be loaded to full (both current and signal level ) single ended.The signal would be distorded when returned to ground. A methode is shown in fig.11d. how to connect a light load (5k ac. or DC wise) to the output. It is preferred that both outputs are loaded the same. The receiver has, as a principal protection, two series diodes anti 8 dB c. b. a. High limit Low limit I L Figure 12. Gain regulation principle. Battery feed Regulation: R1 R2 R6 48 V,2 ⋅ 200 Ω 48 V,2 ⋅ 400 Ω 48 V,2 ⋅ 800 Ω No regulation: Set for low gain All feedings Set for high gain Set for high gain ∞ ∞ ∞ ∞ ∞ 180k 47 Ω 75 Ω 100 Ω ∞ 18k 22k 22k ∞ ∞ 47 - 100Ω 47Ω 75 - 100Ω PBL 385 70 What is balancing the side tone ? • To understand that side tone balancing is to counteract the signal, that is transmitted via the microphone and transmitter to the line, returning to the earphone via the receiver. That presence of a strong side tone signal is disturbing in a way that one quite instictively lowers ones own voice level thus lowering the signal level for the other party. But again, if the balance is too good (seldom the case) the earphone will feel ”dead”. In practical terms what is expected is the same amplitude of ones own voice in the ear as when not talking in a telephone. The need to lower the side tone level where no balancing has been done is in the order of 6 - 12 dB. To understand that the side tone is influenced by other factors like, the impedance of the line and the signal that enters the ear acoustically directly from the mouth and from the mouth through the material in the handset. The signal that enters the microphone from the earphone acoustically will also influence the return loss factor to the telephone line. To understand that the side tone network can be trimmed to form a veritable ”distortion analyser”, so that the distortion that is present from the microphone, will be the only signal entering the earphone and this signal even being small will sound very bad. It is better to induce some of the fundamental frequency back by making the balance less perfect at that frequency. This is valid for a network that is trimmed to only one frequency. It is to strive to trim the network such that it will attenuate the fundamental and the harmonic frequencies alike throughout the different line combinations. To understand that if one of the two signals entering the balancing system from either direction, direct from microphone or via the line is clipped, will result in a very distorted signal entering the receiver amplifier and thus the earphone. Further , to remember that side tone is a small signal that is the difference of two large signals and that the amplitude of the distortion can be up to ten times the amplitude of the fundamental frequency. A short guidance for understanding the side tone principle (See fig.13.) Assuming the line impedance to be 600Ω. ( theorethical value ) Z1 = Line impedance Z2 = The telephone set impedance 600Ω Z1//Z2 = 300Ω R6 will have a certain value 39 - 100Ω to give the telephone a specified DCcharacteristic and overcurrent protection. Assuming that this DC-characteristic requires R6=60Ω, hence it will be 1/5 of the Z1//Z2. This will in transmitting mode result that 1/5 of the ac-signal that is on the line appear across R6. Note that the signals at points a. and b. are 180 degrees off phase. 10 x R6 ≈ R7 + Zbal Note #1 R7 ≈ Zbal Note#2 The ac-signal at point c. is now 1/10 of the signal on the line because it is further divided by two from point b. (R7≈Zbal). Hence 10 x R10 ≈ R11 to satisfy the balancing criteria. R12 is to set the receiver gain ( can also be a volume control potentiometer). Note #1 These values ensure that the frequency behaviour of the transmitter is not influenced. With the ratio 1/10 the influence is 1 dB, and with ratio 1/20 it´s 0.5 dB. Note #2 If the R7 is made low ohmic compared with Zbal, it will load the latter and result in a bad side tone perfomannce, again if the R7 is made high ohmic compared with Zbal will result in a low signal to balance the side tone with and make the balancing difficult. • Making any of the impedances unnecessary high will make the circuit sensitive to RFI. All values given here are approximate and serve as starting entities only. The final trimming of side tone network is a cut and try proposition because a part of the balance lies in the acoustical path between the microphone and earphone. Reverse side tone network. This type of side tone balancing will help when of some reason there is a need to make the R6 low < 47Ω and thus the signal for balancing gets small across R6. By placing the balancing network like shown in fig.14. the possible signal level is 6 dB higher than in the first case and it will also help in case that a volume control is added to the receiver. • PBL 385 70 2 R10 C6 +Line R6 R11 C* Z bal. 15 • R12 * To give receiver flat frequency response Figure 14. Sidetone network with complex R11. Telephone set side Line side a. 1 • PBL 385 70 17 Tx 2 15 Rx 18 b. R7 Z2 Z1 c. R10 C6 R11 R8 R6 C5 Zbal R9 R12 Figure 13. The side tone suppression principle. 9 PBL 385 70 a) Mute IMute PBL 385 70 5 Mute IMute b) PBL 385 70 5 c) PBL 385 70 14 -L 5 d) PBL 385 70 Rx 17 VMute 14 -L VMute 14 -L Mute Muting points 18 15 The diode has to be low voltage drop type. Receiver mute only. Figure 15. Mute principles. Mute function The circuit has a mute function at pin 5. Sinking current from this pin will cut off the gain in the microphone amplifier (attenuation min. 60dB) and decrease the gain in the receiver amplifier to reach the confidence tone level at DTMF-dialling. The receiver mute is ≈ 40dB down from the unmuted value to satisfy those who keep the handset close to the ear at dialling. Optional conditions. For users who keep the handset from the ear the confidence tone level is too low. To alter the level, a signal can be taken from DTMF generator output to receiver input before the capacitor C6. The added impedance to this point will hardly disturbe the signal condition in active speech mode. The microphone amplifier only, can be muted by sinking current from the output pin 11. See fig.4 or 9. Figure 15 b.) If the system mute signal is used to other tasks than muting the speech circuit it has to be isolated. If a diode is used it has to be a low voltage drop type. The input at mute has to be below 300mV. If the mute signal has reverse polarity out of the system it can be phase changed like in e.) In case it is required to mute the receiver only, d.) it can be done by shorting the receiver input to ground before or after the input capacitor. Shorting the input pin to ground (does not have to be absolute ground) actuates a mute by driving the amplifier into saturation thus blocking the signal path and rendering a mute with high attenuation but will cause a DC-level shift at output which in its turn will cause a ”click ” in the earphone. This can be softened with a slower mute signal flank. If the second approach, grounding before the input capacitor is chosen, the grounding has to be low ohmic in order to render a high attenuating mute. Power supplies DC1, DC2, V+C and VPA(See fig.17) PBL 38570 generates its own DC supply V+C dependent of line current with an internal shunt regulator. This regulator senses the line voltage VL via R3 and line current via R6 in order to set the correct V+C so the circuit can generate the required DC characteristic for a given line resistance RLine and the line feeding data of the exchange. A decoupling capacitor is needed between pins +C and -L. The V+C supply changes its voltage linearly with the line current. It can be used to feed an electret microphone. Caution must be taken though not to drain too much current out of this output because it will affect the internal quick start circuit by locking itself into active state. (max. permissible current drain 700µA). Care has to be taken when deciding the resistance value of R3. All resistances that are applied from +Line to ground (-Line) will be in parallel, forming the real impedance towards the line. This will sometimes result in, that the ohmic value of R3 is increased in order to comply to the impedance specification towards the line. The speech circuit sinks ≈ 1mA into pin 4, which means that the working voltage for the speech function V+ will decrease with increasing R3, thus starving in the end the circuit of its working voltage . This dependency is often falsely taken as a sign of that the circuit does not work down to the low line current specified, but in fact it is the working voltage at pin 4 that has become too low. It is obvious that this problem is also connected into what kind of DCcharacteristic is set. See fig. 7. Start up circuit The circuit contains a start up device which function is to fast charge the capacitor C1 when the circuit goes into hook- off condition. The fast charge circuit is a thyristor function between pins 1 and 4 that will stop conducting when the current drain at pin 4 is lower than ≈ 700 µA + the internal current consumption. ( about 1 mA) This circuit can not retrigger before the voltage level at C1 drops below 2V or the line voltage below 1V. See fig 16. +Line 1 PBL 385 70 Tx 2 DC supply R3 4 C1 -Line Figure 16. Fast start up principle. 10 PBL 385 70 The circuit has further two temperature and line current compensated DC supplies DC1 and DC2. DC1 is a voltage supply for supplying diallers, can also be used for memory back up because it does not leak any current back into the circuit. Typical voltage 2.4V down to line voltage of 4.1V, in case the line voltage is lower than 4.1V calculate ; actual line voltage minus 1.9V. In order to prevent noise entering the line, a series resistor and a reservoir capaciotor is recommended in series at this output.The output current is given to be 2 mA in the specification. In case this would not be enough the current capability can be increased by connecting the outputs of DC1 and DC2 in parallel. The driving capacity will increase almost to the double but the voltage drop across the necessary series resistor will go upp thus limiting the useful current. The voltage level that is common for both of these supplies is set by DC2. DC2 is a high precision, reference quality supply that can be used to supply microphones, opto couplers etc. The internally set voltage can be adjusted with external resitors when needed (RDC1 and RDC2). The fourth DC-supply VPA has an advantage that it does not influence the circuits DC characteristics even at high current drain. The supply has a floating ground reference in the plus line in order to minimize RFI problems and is used to supply the power amplifier of a handsfree telephone ( PBL3881, 38811---14 ). These circuits have a current controlled charging of the supply capacitor and the control signal is taken across the resistor R6. In case a monitor amplifier is required where the ground reference is hardly necessary, it can be supplied from VPA or like in alt. b in fig. 17. IL Hook switch +Line 1 R3 RLine VPA + V+C 4 PBL 38 570 V Ref. 1.2V 1-10M + 15k 7 8 9 RDC1 0-470Ω VL + b. RFeed T + VDC1 0-470Ω - VDC2 a. + Vexh. VMon. ƒ 2 Lim 15k 3 14 RDC2 + + 4.7-47 µF + 4.7-47 µF + -Line C1 R6 a. Supply arrangement for a handsfree system power amplifier. For ex. PBL 38811---14 b. Supply arrangement for a call monitor cicuit. Figure 17. DC-supplies 1-10M 1 Hook switch VDD 10 PBL 385 70 AD AT AR 17 100Ω CMOS DIALLER 220Ω MUTE 9 1µF Rec. 18 10n 12 13 MIC. 220Ω 33k 1µF AM DC-supply Telephone line 7 100Ω 18k 100n 5 6 11 3 2 15 47n 910Ω 560Ω 75Ω 22k 11k 11k 100n 10Ω 6.2k 62k 910Ω 15n 15V 16 14 DTMF 12 GND 8 100Ω 9 +4 10Ω 1 4 7 2 5 8 0 3 6 9 # 680p 3.3n * Voltage adjust * 47µF + + 47µF * + 47µF Figure 18. Typical DTMF tone dialling telephone. 18-pin DIP package. * marked components for gain regulation. 11 PBL 385 70 Ordering Information Package Temp. Range Part No. Plastic DIP Plastic SO Plastic SO -40 to +70°C -40 to +70°C -40 to +70°C PBL 385 70/1N PBL 385 70/1SO PBL 385 70/1SO:T Information given in this data sheet is believed to be accurate and reliable. However no responsibility is assumed for the consequences of its use nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Ericsson Components. These products are sold only according to Ericsson Components' general conditions of sale, unless otherwise confirmed in writing. Specifications subject to change without notice. 1522-PBL 385 70/1 © Ericsson Components AB September 1997 Ericsson Components AB S-164 81 Kista-Stockholm, Sweden Telephone: +46 8 757 50 00 12