PBL386202SHT

June 1999 PBL 386 20/2 Subscriber Line Interface Circuit Description The PBL 386 20/2 Subscriber Line Interface Circuit (SLIC) is a 90 V bipolar integrated circuit for use in PBX,Terminal adapters and other telecommunications equipment. The PBL 386 20/2 has been optimized for low total line interface cost and a high degree of flexibility in different applications. The PBL 386 20/2 has constant current feed, programmable to max. 30 mA. A second lower battery voltage may be connected to the device to reduce short loop power dissipation. The SLIC automatically switches between the two battery supply voltages without need for external components or external control. The SLIC incorporates loop current, ground key and ring trip detection functions. The PBL 386 20/2 is compatible with loop start signaling. Two- to four-wire and four- to two-wire voice frequency (VF) signal conversion is accomplished by the SLIC in conjunction with either a conventional CODEC/filter or with a programmable CODEC/filter, e.g. SLAC, SiCoFi, Combo II. The programmable two-wire impedance, complex or real, is set by a simple external network. Longitudinal voltages are suppressed by a feedback loop in the SLIC and the longitudinal balance specifications meet Bellcore TR909 requirements. The PBL 386 20/2 package options are 24-pin SSOP, 24-pin SOIC and 28 pin PLCC. Key Features • 24-pin SSOP package • High and low battery with automatic switching • 60 mW on-hook power dissipation in active state • On-hook transmission • Long loop battery feed tracks Vbat for maximum line voltage • Only +5 V feed in addition to battery • Selectable transmit gain (1x or 0.5x) • No power-up sequence • 44V open loop voltage @ -48V battery feed • Full longitudinal current capability during on-hook state • Analog over temperature protection permits transmission while the protection circuit is active • Integrated Ring Relay driver • Ground key detector • Programmable signal headroom Ring Relay Driver RRLY DT DR TIPX RINGX HP Ring Trip Comparator Input Decoder and Control C1 C2 C3 DET Ground Key Detector LP VBAT2 VBAT Off-hook Detector PLD REF AGND BGND VF Signal Transmission VTX RSN P B PLC PBL 386 20/2 PTG 24-pinSOIC, 24-pin SSOP, 28-pin PLCC Figure 1. Block diagram. 1 38 PB 6L 20 /2 Two-wire Interface L 38 VCC Line Feed Controller and Longitudinal Signal Suppression POV 6 20 PSG /2 PBL 386 20/2 Maximum Ratings Parameter Symbol Min Max Unit Temperature, Humidity Storage temperature range Operating temperature range Operating junction temperature range, Note 1 Power supply, 0°C ≤ TAmb ≤ +70°C VCC with respect to A/BGND VBat2 with respect to A/BGND VBat with respect to A/BGND, continuous VBat with respect to A/BGND, 10 ms Power dissipation Continuous power dissipation at TAmb ≤ +70 °C Ground Voltage between AGND and BGND Relay Driver Ring relay supply voltage Ring trip comparator Input voltage Input current Digital inputs, outputs (C1, C2, C3, DET) Input voltage Output voltage TIPX and RINGX terminals, 0°C < TAmb < 70°C, VBat = -50V Maximum supplied TIPX or RINGX current TIPX or RINGX voltage, continuous (referenced to AGND), Note 2 TIPX or RINGX, pulse < 10 ms, tRep > 10 s, Note 2 TIPX or RINGX, pulse < 1 µs, tRep > 10 s, Note 2 TIPX or RINGX, pulse < 250 ns, tRep > 10 s, Notes 2 & 3 TStg TAmb TJ VCC VBat2 VBat VBat PD VG -55 -40 -40 -0.4 VBat -75 -80 +150 +110 +140 6.5 0.4 0.4 0.4 1.5 °C °C °C V V V V W V -0.3 0.3 BGND+14 V VDT, VDR IDT, IDR VID VOD ITIPX, IRINGX VTA, VRA VTA, VRA VTA, VRA VTA, VRA VBat -5 -0.4 -0.4 AGND 5 VCC VCC +100 2 5 10 15 V mA V V -100 -80 VBat -10 VBat -25 VBat -35 mA V V V V Recommended Operating Condition Parameter Symbol Min Max Unit Ambient temperature VCC with respect to AGND VBat with respect to AGND AGND with respect to BGND TAmb VCC VBat VG 0 4.75 -58 -100 +70 5.25 -8 100 °C V V mV Notes 1. The circuit includes thermal protection. Operation at or above 140°C junction temperature may degrade device reliability. 2. With the diodes DVB and DVB2 included, see figure 12. 3. RF1 and RF2 ≥ 20 Ω is also required. Pulse is applied to TIP and RING outside RF1 and RF2. 2 PBL 386 20/2 Electrical Characteristics 0 °C ≤ TAmb ≤ +70 °C, PTG = open (see pin description), VCC = +5V ±5 %, VBat = -58V to -40V, VBAT2 = -17V, RLC=38.3 kΩ, IL = 22 mA. RL = 600 Ω, RF1= RF2=RP1= RP2 =0 Ω, RRef = 49.9 kΩ, CHP = 47 nF, CLP=0.15 µF, RT = 120 kΩ, RSG = 0 kΩ, RRX = 60 kΩ, RR = 52.3 kΩ, ROV=∞ unless otherwise specified. Current definition: current is positive if flowing into a pin. Parameter Ref fig Conditions Min Typ Max Unit Two-wire port Overload level, VTRO On-Hook, ILdc < 5mA Input impedance, ZTR Longitudinal impedance, ZLOT, ZLOR Longitudinal current limit, ILOT, ILOR Longitudinal to metallic balance, BLM 2 Active state 1% THD, ROV = ∞ Note 1 Note 2 0 < f < 100 Hz active state IEEE standard 455-1984 0.2 kHz < f < 1.0 kHz 1.0 kHz < f < 3.4 kHz 0.2 kHz < f < 1.0 kHz 1.0 kHz < f < 3.4 kHz 3 0.2 kHz < f < 1.0 kHz 1.0 kHz < f < 3.4 kHz 4 0.2 kHz < f < 3.4 kHz 53 53 40 75 70 50 dB dB dB 1.0 1.0 ZT/200 20 10 53 53 53 53 75 70 35 VPeak VPeak Ω/wire mArms /wire dB dB dB dB Longitudinal to metallic balance, BLME BLME = 20 · Log ELo VTR 3 Longitudinal to four-wire balance, BLFE BLFE = 20 · Log ELo VTX Metallic to longitudinal balance, BMLE V BMLE = 20 · Log TR ; ERX = 0 VLo C TIPX VTX Figure 2. Overload level, VTRO , two-wire port RL VTRO ILDC PBL 386 20/2 RINGX RSN RT 1