ADC-304

® ® ADC-304 8-Bit, 20MHz, Low-Power Flash A/D Converters IN N O V A T I O N a n d E X C E L L E N C E FEATURES • • • • • • • 8-bit resolution 20MHz conversion rate ±1/2LSB maximum nonlinearity 8MHz input bandwidth Low power consumption, 375mW TTL compatible Single or dual supply operation GENERAL DESCRIPTION Datel’s ADC-304 is an 8-bit, 20MHz analog-to-digital flash converter. The ADC-304 offers many performance features not obtainable from other flash A/D’s. Key reatures include a low power dissipation of 375mW and TTL-compatible outputs. A wide analog input bandwidth of 8MHz (–3dB) allows operation without the need of a samplehold. Also, single +5V supply operation is obtainable with an input range of +3 to +5V, eliminating the need for an additional power supply. A 0 to –2V input range is available with ±5V supply operation. Another novel feature of the ADC-304 is its user-selectable output coding. The MINV and LINV pins allow selection of binary, complementary binary, and if external offset circuitry is used for bipolar inputs, offset binary, two’s complement and complementary two’s complement coding. The ADC-304 is supplied in a 28-pin plastic DIP or a 28-pin plastic SOP package. Operating temperature range is –20 to +75°C. Storage temperature range is –55 to +150°C. INPUT/OUTPUT CONNECTIONS PLASTIC DIP PACKAGE PIN 1 2 3 4 5 6 7 8 9 10 11 12 13 14 FUNCTION BIT 1 (MSB) BIT 2 BIT 3 BIT 4 DIGITAL GND +5V POWER –5.2V POWER –5.2V POWER –5.2V POWER +5V POWER DIGITAL GND LINV BIT 5 BIT 6 PIN 28 27 26 25 24 23 22 21 20 19 18 17 16 15 FUNCTION MINV VM VB ANALOG GND NO CONNECT ANALOG INPUT NO CONNECT ANALOG INPUT NO CONNECT ANALOG GND VT CLOCK INPUT BIT 8 (LSB) BIT 7 CLOCK INPUT R/2 1 R 2 LINV BIT 8 (LSB) BIT 7 6 VT VT SENSE Œ INPUT/OUTPUT CONNECTIONS PLASTIC SOP PACKAGE PIN 1 2 3 4 5 6 7 8 9 10 11 12 13 14 FUNCTION ANALOG INPUT VB SENSE ANALOG GND VB VM NO CONNECT MINV BIT 1 (MSB) BIT 2 BIT 3 BIT 4 DIGITAL GND +5V POWER –5.2V POWER PIN 28 27 26 25 24 23 22 21 20 19 18 17 16 15 FUNCTION ANALOG INPUT VT SENSE ANALOG GND VT CLOCK INPUT BIT 8 (LSB) BIT 7 BIT 6 BIT 5 LINV DIGITAL GND +5V POWER OVERRANGE –5.2V POWER 24-TO-8 BIT ENCODER 3 256-TO-24 BIT ENCODER R OUTPUT BUFFER BIT 6 BIT 5 OVERRANGE Œ R ANALOG INPUT R/2 R 6 7 129 6 ANALOG INPUT 256 6 1 R/2 COMPARATOR LATCH LATCH 128 BIT 4 BIT 3 BIT 2 BIT 1 (MSB) Œ THESE PINS ARE AVAILABLE ON SOP PACKAGE ONLY VB VM VB SENSE Œ MINV Figure 1. ADC-304 Functional Block Diagram DATEL, Inc., 11 Cabot Boulevard, Mansfield, MA 02048-1151 (U.S.A.) • Tel: (508) 339-3000 Fax: (508) 339-6356 • For immediate assistance (800) 233-2765 ® ® ADC-304 ABSOLUTE MAXIMUM RATINGS PARAMETERS +VS to GND –VS to GND Input Voltage (Analog) Vin (dual power supply) Input Voltage (Reference) VT, VB, VM (dual power supply) ‚ VT – VB ‚ Input Current IM Input Voltage (Digital) Digital Inputs Supply Voltages LIMITS 0 to +6 0 to –6 –VS to (ANA GND + 0.3) –VS to (ANA GND + 0.3) 2.5 –3.0 to +3.0 –0.5 to +VS UNITS Volts Volts Volts Volts Volts mA Volts DIGITAL OUTPUTS Resolution and Output Coding MIN. TYP. MAX. UNITS bits 8 Straight binary Complementary binary Two’s complement Complementary two’s complement +2.7 — — — 15 22 +3.4 — –500 — 20 26 — +0.5 — +3 30 35 Logic Levels Logic “1” Logic “0” Logic Loading “1” Logic Loading “0” Output Data Delay TDLH TDHL POWER REQUIREMENTS Single Power Supply Supply Voltage = +VS Supply Voltage = –VS Supply Current = +IS Power Dissipation Dual Power Supply Supply Voltage = +VS Supply Voltage = –VS Supply Current = +IS Supply Current = –IS Power Dissipation PHYSICAL/ENVIRONMENTAL Operating Temperature Storage Temperature Volts Volts µA mA ns ns FUNCTIONAL SPECIFICATIONS Unless otherwise noted, the following specifications apply to the ADC-304 when used either with a single or dual power source. The test conditions are: For single power supply operation: +VS = +5V, DIG GND = 0V –VS = 0V, VT = +5V VB = +3V, TA = +25°C ANA GND = +5V, fs = 20MHz ANALOG INPUTS Input Range Input Capacitance Input Bias Current Offset Voltage VT VB DIGITAL INPUTS Logic Levels Logic “1” Logic “0” Logic Input Currents Logic “1” Logic “0” PERFORMANCE Conversion Rate Œ Integral Nonlinearity Differential Nonlinearity Differential Gain Error  Differential Phase Error  Aperture Delay Ta Aperture Uncertainty Signal-to-Noise and Distortion (Vin = full scale, fs = 20MHz) fin = 1MHz fin = 5MHz fin = 10MHz Clock Pulse Width Tpw1 Tpw0 Reference Pin Current Reference Resistance (VT to VB) Reference Input (dual supply) VT VB 20 — — — — 5 — — — — — — 7 30 47 43 35 35 10 11 — –0.1 –1.8 — — 15 130 0 –2.0 — — 18 — +0.1 –2.2 — ±1/2 ±1/2 1.5 0.5 9 — MHz LSB LSB % degrees ns ps dB dB dB ns ns mA Ohms Volts Volts +2.0 — — –0.1 — — –100 –0.32 — +0.8 –150 –0.5 Volts Volts µA mA For dual power supply operation: +VS = +5V, DIG GND = 0V –VS = –5.2V, VT = 0V, VB = –2V, TA = +25°C ANA GND = 0V, fs = 20MHz MIN. VB — 15 –8 0 TYP. 30 50 –13 +5 MAX. VT 35 100 –19 +11 UNITS Volts pF µA mV mV +4.75 — +56 280 +4.75 –4.75 +7 –50 295 +5.0 0 +71 355 +5.0 –5.2 +10 –62 375 +5.25 — +91 455 +5.25 –5.5 +14 –78 476 Volts Volts mA mW Volts Volts mA mA mW –20 –55 — — +75 +150 °C °C TECHNICAL NOTES 1. The two DIGITAL GND pins (pins 5 and 11 on the DIP, pins 12 and 18 on the SOP) are not connected to each other internally and neither are the two +5V POWER pins (6 and 10 on the DIP, 13 and 17 on the SOP). All four pins must be externally connected to the appropriate pcb patterns. Also, the DIGITAL GND and ANALOG GND pins are not connected to each other internally. 2. Layout of the analog and digital sections should be separated to reduce interference from noise. To further guard against unwanted noise, it is recommended to bypass, as close as possible, the voltage supply pins to their respective ground pins with 1µF tantalum and 0.01µF ceramic disk capacitors in parallel. 3. The input capacitance of the analog input is much smaller than that of a typical flash A/D converter. It is necessary to use an amplifier with sufficient bandwidth and driving power. The analog input pins are separated internally, so they should be connected together externally. If the ADC-304 is driven with a low output impedance amplifier, parasitic oscillations may occur. These parasitic oscillations can be prevented by introducing a small resistance of 2 to 10Ω between the amplifier output and the ADC-304’s A/D input. This resistance must have a very low value of series inductance at high frequencies. Note that each of the analog input pins is divided in this manner with these resistances. Connect the driving amplifier as close as possible to the A/D input of the ADC-304. Footnotes: Œ fin = 1kHz, ramp  NTSC 40 IRE-modulated ramp, fs = 14.3MHz 2 ® ® ADC-304 4. The voltage between VT and VB is equivalent to the dynamic range of the analog input. Bypass VB to ANALOG GND USING a 1µF and a 0.01µF capacitor in parallel. To balance the characteristics of the ADC-304 at high frequencies, bypass VM with a 0.01µF capacitor to ANALOG GND. Also, VM can be used as a trimming pin for more precise linearity compensation. A stable voltage source with a potential equal to VB and a 1kΩ potentiometer can be connected to VM as shown in Figure 2 for this purpose. 5. Separate the clock input, CLOCK, from other leads as much as possible, observing proper EMI and RFI wiring techniques. This reduces the inductive pick-up of this lead from interfering with the “clean” operation of the ADC-304. 6. The analog input signal is sampled on the positive-going edge of CLOCK. Corresponding digital data appears at the output on the negative-going edge of the CLOCK pulse after a brief delay of 31ns maximum (TDLH, TDHL). Refer to the Timing Diagram (Figure 3) for more information. 7. Connect all free pins to ANALOG GND to reduce unwanted noise. The analog input range is equal to a 2V spread. The voltage on VT-VB will equal 2V. The connection of VT and ANALOG GND is 2V higher than VB. Whether using a single or dual power supply, the analog input will range from the value of VT to VB. If VT equals +5V, then VB will equal +3V and the analog input range will be from +3 to +5V. +5V ADC-304 Ta N(1) ANALOG INPUT TPW1 TPW0 N(2) N(3) ANA GND 0.01µF 1kΩ VB VB CLOCK VM 0.01µF COMPARATOR OUTPUT SINGLE SUPPLY OPERATION 6-BIT LATCH OUTPUT ADC-304 ANA GND DATA OUTPUT BITS 1-8 N DATA VALID N(1) DATA VALID N(2) DATA VALID TDLH 22ns max. TDLH 22ns max. TDHL 31ns max. VB 1kΩ VB TDHL 31ns max. VM 0.01µF Figure 3. ADC-304 Timing Diagram DUAL SUPPLY OPERATION Figure 2. Improving Linearity Compensation 3 ® ® ADC-304 Table 1. Output Coding for +5V Power Supply Operation (+3 to +5V Signal Input) Straight Binary Unipolar Scale +FS – 1SLB +7/8FS +3/4FS +1/2FS +1/4FS +1/8FS +1LSB Zero MINV LINV +4.9922V +4.7500V +4.5000V +4.0000V +3.5000V +3.2500V +3.0078V +3.0000V 0 0 11111111 11011111 10111111 01111111 00111111 00011111 00000001 00000000 Complementary Two’s Complement 0 1 10000000 10100000 11000000 00000000 01000000 01100000 01111110 01111111 Two’s Complement 1 0 01111111 01011111 00111111 11111111 10111111 10011111 10000001 10000000 Complementary Binary 1 1 00000000 00100000 01000000 10000000 11000000 11100000 11111110 11111111 Table 2. Output Coding for ±5V Power Supply Operation (0 to –2V Signal Input) Straight Binary Unipolar Scale Zero –1LSB –1/8FS –1/4FS –1/2FS –3/4FS –7/8FS –FS + 1SLB MINV LINV 0.0000V –0.0078V –0.2500V –0.5000V –1.0000V –1.5000V –1.7500V –1.9922V 0 0 11111111 11111110 11011111 10111111 01111111 00111111 00011111 00000000 Complementary Two’s Complement 0 1 10000000 10000001 10100000 11000000 00000000 01000000 01100000 01111111 Two’s Complement 1 0 01111111 01111110 01011111 00111111 11111111 10111111 10011111 10000000 Complementary Binary 1 1 00000000 00000001 00100000 01000000 10000000 11000000 11100000 11111111 APPLICATION CIRCUITS +5V +5V +5V BIT 1 BIT 2 BIT 3 BIT 4 (MSB) 1 BIT 1(MSB) 2 BIT 2 3 BIT 3 4 BIT 4 5 DIG GND 6 +5V 7 –5.2V 8 –5.2V 9 –5.2V 10 +5V 11 DIG GND MINV 28 VM 27 MINV BIT 1 BIT 2 (MSB) 1 BIT 1(MSB) 2 BIT 2 3 BIT 3 4 BIT 4 5 DIG GND MINV 28 VM 27 VB 26 ANA GND 25 N.C. 24 MINV +3V VB 26 ANA GND 25 N.C. 24 ANA IN 23 N.C. 22 ANA IN 21 N.C. 20 ANA GND 19 VT 18 CLOCK 12 LINV 13 BIT 5 14 BIT 6 CLOCK 17 (TTL LEVEL) (LSB) BIT 8 16 BIT 7 15 ANALOG INPUT +3 to +5V VIN –2V BIT 3 BIT 4 VIN ANA IN 23 N.C. 22 ANA IN 21 N.C. 20 ANA GND 19 VT 18 CLOCK CLOCK 17 (LSB) BIT 8 16 BIT 7 15 (TTL LEVEL) ANALOG INPUT 0 to –2V 6 +5V 7 –5.2V 8 –5.2V 9 –5.2V 10 +5V 11 DIG GND LINV BIT 5 BIT 6 BIT 7 12 LINV 13 BIT 5 14 BIT 6 LINV BIT 5 BIT 6 BIT 7 BIT 8 (LSB) BIT 8 (LSB) –5.2V NOTE: 28-pin DIP package shown Figure 4. Connections for +5V Power Supply Operation NOTE: 28-pin DIP package shown Figure 5. Connections for ±5V Power Supply Operation 4 ® ® ADC-304 MECHANICAL DIMENSIONS 1.494 ±0.010 (37.95 ±0.25) 28 15 ADC-304 28-Pin DIP (Plastic) ADC-304 0.52 ±0.02 (13.2 ±0.3) 1 14 0.187 ±0.010 (4.75 ±0.25) 0.118 MIN. (3.0 MIN.) 0.600 (15.24) 0.011 ±0.003 (0.28 ±0.08) 0° to 15° 0.022 ±0.004 (0.55 ±0.10) 0.051 ±0.006 (1.30 ±0.15) 0.100 TYP. (2.540) SEATING PLANE 0.020 MIN. (0.50 MIN.) 0.746 ±0.010 (18.95 ±0.25) 28 15 ADC-304-3 28-Pin SOP (Plastic) ADC-304 0.30 ±0.01 (7.7 ±0.2) 0.41 ±0.02 (10.3 ±0.4) 1 14 0.090 ±0.011 (2.30 ±0.28) 0.007 ±0.005 (0.18 ±0.13) 0.366 (9.3) 0.050 TYP. (1.270) 0.018 ± 0.004 (0.45 ± 0.1) 0.020 ±0.008 (0.5 ±0.2) 0.006 ±0.003 (0.15 ±0.08) ORDERING INFORMATION MODEL ADC-304 ADC-304-3 PACKAGE 28-pin DIP (plastic) 28-pin SOP (plastic) ® ® ISO 9001 R E G I S T E R E D IN N O V A T I O N a n d E X C E L L E N C E DS-0075B 10/96 DATEL, Inc. 11 Cabot Boulevard, Mansfield, MA 02048-1151 Tel: (508) 339-3000 / Fax: (508) 339-6356 For immediate assistance: (800) 233-2765 DATEL (UK) LTD. Tadley, England Tel: (01256)-880444 DATEL S.A.R.L. Montigny Le Bretonneux, France Tel: 1-34-60-01-01 DATEL GmbH Munchen, Germany Tel: 89-544334-0 DATEL KK Tokyo, Japan Tel: 3-3779-1031, Osaka Tel: 6-354-2025 DATEL makes no representation that the use of its products in the circuits described herein, or the use of other technical information contained herein, will not infringe upon existing or future patent rights. The descriptions contained herein do not imply the granting of licenses to make, use, or sell equipment constructed in accordance therewith. Specifications are subject to change without notice. The DATEL logo is a registered DATEL, Inc. trademark.