AU9380

AU9380 USB Flash Disk Controller Technical Reference Manual Revision 2.2 © 1997-2002 Alcor Micro Corp. All Rights Reserved Copyright Notice C opyright 1997 - 2002 Alcor Micro Corp. All Rights Reserved. Trademark Acknowledgements The company and product names mentioned in this document may be the trademarks or registered trademarks of their manufacturers. Disclaimer A lcor Micro Corp. reserves the right to change this product without prior notice. Alcor Micro Corp. makes no warranty for the use of its products and bears no responsibility for any error that appear in this document. Specifications are subject to change without prior notice. C ontact Information: Web site: http://www.alcormicro.com/ T aiwan Alcor Micro Corp. 4F-1, No 200 Kang Chien Rd., Nei Hu, Taipei, Taiwan, R.O.C. Phone: 886-2-8751-1984 Fax: 886-2-2659-7723 S anta Clara Office 2901 Tasman Drive, Suite 206 Santa Clara, CA 95054 USA Phone: (408) 845-9300 Fax: (408) 845-9086 Los Angeles Office 9400 Seventh St., Bldg. A2 Rancho Cucamonga, CA 91730 USA Phone: (909) 483-9900 Fax: (909) 944-0464 Table of Contents 1.0 Introduction-------------------------------------------------------------------------------------- .1 Description---------------------------------------------------------------------------------1 1.2 Features-------------------------------------------------------------------------------------1 1 1 3 5 9 9 2.0 3.0 4.0 Application Block Diagram------------------------------------------------------------------ Assignment-------------------------------------------------------------------------------Pin -System Architecture and Reference Design------------------------------------------.1 AU9 380 Block Diagram-----------------------------------------------------------------4. 5.0 4.2 Sample Schematics------------------------------------------------------------------------ 10 13 Electrical Characteristics------------------------------------------------------------------5.1 Recommended Operating Conditions------------------------------------------------13 5 .2 General DC Characteristics ------------------------------------------------------------ 13 5 .3 DC Electrical Characteristic for 3.3 volts operation ------------------------------- 13 -5 .4 Crystal Oscillator Circuit Setup for Characteristics -----------------------------14 5 .5 ESD Test Results -------------------------------------------------------------------------5 .6 Latch-Up Test Results ------------------------------------------------------------------15 16 6.0 Mechanical Information---------------------------------------------------------------------- 19 - TABLE OF CONTENTS i TABLE OF CONTENTS i 1.0 Introduction 1.1 Description The AU9380 is a highly integrated single chip USB flash disk controller. It provides the most cost effective bridge between USB enabled PC and NAND type flash memory. AU9380 can be used as a removable storage disk in enormous data exchange applications between PC, Macintosh, laptop and workstation. It can also be configured as a bootable disk for system repairing . The AU9380 can work with 1 to 4 NAND type flash memory chip with the combination of any popular flash memory type - 8M, 16M, 32M, 64M and 128M. Additional features include write protection switch, activity LED and password protected security . The AU9380 integrated 48MHz PLL, 3.3V regulator, power on reset circuit and a power switch for flash memory power control. 1.2 Features ?? Fully compliant with USB v1.1 specification and USB Device Class Definition for Mass Storage, Bulk-Transport v1.0 ?? Work with default driver from Windows ME, Windows 2000, Windows XP, Mac OS 9.1, and Mac OS X. Windows 98se is supported by vendor driver from Alcor. ?? Multiple FIFO implementation for concurrent bus operation ?? Support up to 4 NAND Flash memory chips with write-protected capability ?? Support total flash memory size up to 256 MB ?? Support mixed different size NAND Flash ?? Vendor ID, product ID and strings can be customized by utility software from Alcor ?? Can be configured to support dual partitions with dynamic logic disk space allocation. ?? Security function supported with password protection ?? LED for bus activity monitoring ?? Runs at 12MHz, built-in 48 MHz PLL ?? Built-in 3.3V regulator ?? Built-in power switch and power management circuit to achieve 500uA suspend current required by USB specification. ?? Built-in power on reset circuit ?? Dedicated DMA engine to ensure highest throughput in read and write ?? 48-pin TQFP package as standard package; 44-pin LQFP package is also available INTRODUCTION 1 INTRODUCTION 2 2.0 Application Block Diagram Following is the application diagram of a typical flash disk product with AU9380. By connecting the flash disk to a desktop or notebook PC through USB bus, AU9380 is implemented as a bus-powered, full speed USB disk, which can be used as a bridge for data transfer between Desktop PC and Notebook PC. APPLICATION BLOCK DIAGRAM 3 APPLICATION BLOCK DIAGRAM 4 3.0 Pin Assignment The AU9380 is packed in 48-pin LQFP form factor. The figure on the following page shows the signal names for each of the pins on the chip. Accompanying the figure is the table that describes each of the pin signals. Alcor Micro Corp. AU9380 48-PIN LQFP PIN ASSIGNMENT 5 Table 3-1. Pin Descriptions Pin# 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 Pin Name VCCA GNDA X TAL1 X TAL2 VCC2FM VCC5V VCCIO RSTNX USB_DP USB_DM GNDIO NC GPO1X F MXWP FMXWr FMALE FMCLE FMXChip1 FMXChip2 FMXRd FMRdyXBzy GPO5X Reserved NC GPO4X FMXChip3 I/O Type P WR P WR I O O P WR P WR I I/O I/O P WR 3.3V input for PLL Ground Description Crystal Oscillator Input (12MHz) Crystal Oscillator Output (12MHz) Connect to Flash Memory VCC 5V power supply Regulator 3.3V output/ IO 3.3V input Hardware reset (Active Low) USB D+ USB DGround O I O O O O O O I O General Purpose Output pin, used as activity LED C onnect to Flash Memory Write Protect Connect to Flash Memory Write Enable Connect to Flash Memory Address Latch Enable Connect to Flash Memory Command Latch Enable Connect to Flash Memory Chip1 Enable Connect to Flash Memory Chip2 Enable Connect to Flash Memory Read Enable Connect to Flash Memory Ready/Busy Output General Purpose Output pin, used as activity LED O O General Purpose Output pin, used as activity LED Connect to Flash Memory Chip3 Enable PIN ASSIGNMENT 6 27 FMXChip4 O Connect to Flash Memory Chip4 Enable 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 VCCK GNDK RESERVED RESERVED RESERVED RESERVED RESERVED RESERVED NC GPO3X FMIO4 FMIO5 FMIO6 FMIO7 FMIO0 FMIO1 FMIO2 FMIO3 GPO0X GPO2X NC PWR PWR Core 3.3V Input Ground O I/O I/O I/O I/O I/O I/O I/O I/O O O General Purpose Output pin, used as activity LED Connect to Flash Memory Data IO4 Connect to Flash Memory Data IO5 Connect to Flash Memory Data IO6 Connect to Flash Memory Data IO7 Connect to Flash Memory Data IO0 Connect to Flash Memory Data IO1 Connect to Flash Memory Data IO2 Connect to Flash Memory Data IO3 General Purpose Output pin, used as activity LED General Purpose Output pin, used as activity LED PIN ASSIGNMENT 7 SYSTEM ARCHITECTURE AND REFERENCE DESIGN 8 4.0 System Architecture and Reference Design 4.1 AU9380 Block Diagram Alcor Micro - AU9380 Flash Memory Card Reader Block Diagram USB Upstream Port XCVR USB SIE USB FIFO RAM FM control & FIFO Support up to 4 Flash Memory Processor ROM 3.3 V 3.3 V Voltage Regulator & Power off Suspend 12MHz XTAL SYSTEM ARCHITECTURE AND REFERENCE DESIGN 9 4.2 Sample Schematics U1 VCC FB C1 J1 VCC DATADATA+ GND FGND1 1 2 3 4 5 0.1UF F1 C2 10UF 1.5K R2 R3 VCC3.3 39 39 1 2 3 SW1 FMXWP FMXWR FMALE FMCLE FMXCHIP1 FMXCHIP2 FMXRD GPO5X R4 47K VCC2FM VCC VCC5V C7 VCC3.3 0.1UF R6 330 D6 GPO5X C6 18PF 1M R1 VCC3.3 FB C3 1UF F2 C4 0.1UF VCC3.3 VCCA GNDA XTAL1 XTAL2 VCC2FM VCC5V 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 VCCA GNDA XTAL1 XTAL2 VCC2FM VCC5V VCCIO RSTNX USB_DP USB_DM GNDIO NC GPO1X FMXWP FMXWR FMALE FMCLE FMXCHIP1 FMXCHIP2 FMXRD FMRDXBZY GPO5X RESERVED NC NC GPO2X GPO0X FMIO3 FMIO2 FMIO1 FMIO0 FMIO7 FMIO6 FMIO5 FMIO4 GPO3X NC RESERVED RESERVED RESERVED RESERVED RESERVED RESERVED GNDK VCCK FMXCHIP4 FMXCHIP3 GPO4X 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 FMIO[0..7] FMRDYXBZY GNDK VCCK FMXCHIP4 FMXCHIP3 AU9380-48PIN C5 18PF R5 Y1 12MHZ XTAL2 XTAL1 VCC3.3 VCC3.3 FB FB C10 0.1UF FB F6 F4 C11 0.1UF GNDA 0.1UF FB F5 0.1UF GNDK VCCA C8 C9 F3 VCCK Disclaimer: This schematic is for reference only. Alcor Micro Corp. makes no warranty for the use of its products and bears no responsibility for any error that appear in this document. Specifications are subject to change without notice. Size A Date: Document Number Au9380 demostartion schematic Tuesday, September 10, 2002 Sheet 1 of 1 Rev 1.0a SYSTEM ARCHITECTURE AND REFERENCE DESIGN 10 VCC2FM FMIO[0..7] FMIO0 FMIO1 FMIO2 FMIO3 FMIO4 FMIO5 FMIO6 FMIO7 29 30 31 32 41 42 43 44 U2 I/O0 I/O1 I/O2 I/O3 I/O4 I/O5 I/O6 I/O7 VCC VCC 12 37 6 13 36 GND VSS VSS R/B RE CE CLE ALE WE WP 7 8 9 16 17 18 19 FMRDYXBZY FMXRD FMXCHIP1 FMCLE FMALE VCC2FM FMXWR K9F5608U0A-YCB0 GND FMRDYXBZY FMXRD FMXCHIP3 FMXCHIP4 VCC2FM FMCLE FMALE FMXWR VCC2FM JP1 1 2 3 4 5 6 7 8 9 10 HEADER 10 JP2 10 9 8 7 6 5 4 3 2 1 HEADER 10 FMIO7 FMIO6 FMIO5 FMIO4 VCC2FM GND FMIO3 FMIO2 FMIO1 FMIO0 VCC2FM U3 FMIO0 FMIO1 FMIO2 FMIO3 FMIO4 FMIO5 FMIO6 FMIO7 29 30 31 32 41 42 43 44 I/O0 I/O1 I/O2 I/O3 I/O4 I/O5 I/O6 I/O7 VCC VCC 12 37 6 13 36 GND VSS VSS R/B RE CE CLE ALE WE WP 7 8 9 16 17 18 19 FMRDYXBZY FMXRD FMXCHIP2 FMCLE FMALE VCC2FM FMXWR K9F5608U0A-YCB0 Size A Date: Document Number Au9380 demostartion schematic Tuesday, September 10, 2002 Sheet 1 of 1 Rev 1.0a ELECTRICAL CHARACTERISTICS 11 5.0 Electrical Characteristics 5.1 Recommended Operating Conditions SYMBOL VCC VIN TOPR TSTG PARAMETER Power Supply Input Voltage Operating Temperature Storage Temperature MIN 4.75 0 0 -40 TYP 5 MAX 5.25 VCC 85 125 UNITS V V O C O C 5.2 General DC Characteristics SYMBOL IIL IIH IOZ CIN COUT CBID PARAMETER Input low current Input high current Tri-state leakage current Input capacitance Output capacitance Bi-directional buffer capacitance CONDITIONS no pull-up or pull-down no pull-up or pull-down MIN TYP MAX UNITS -1 1 ?A -1 1 ?A -10 10 ?A 5 ?F 5 ?F 5 ?F 5.3 DC Electrical Characteristics for 3.3 volts operation SYMBOL VIL VIH VOL VOH RI PARAMETER Input Low Voltage Input Hight Voltage Output low voltage Output high voltage Input Pull-up/down resistance CONDITIONS CMOS CMOS IOL =4mA, 16mA IOH =4mA,16mA Vil=0V or Vih=VCC MIN M AX UNITS 0.9 V 2.3 V 0.4 V 2.4 V 10k/200k K? TYP ELECTRICAL CHARACTERISTICS 12 5.4 Crystal Oscillator Circuit Setup for Characterization The following setup was used to measure the open loop voltage gain for crystal oscillator circuits. The feedback resistor serves to bias the circuit at its quiescent operating point and the AC coupling capacitor, Cs, is much larger than C1 and C2. ELECTRICAL CHARACTERISTICS 13 5.5 ESD Test Results Test Description : ESD Testing was performed on a Zapmaster system using the HumanBody –Model (HBM) and Machine-Model (MM), according to MIL_STD 883 and EIAJ IC_121 respectively. ?? Human-Body-Model stress devices by sudden application of a high voltage supplied by a 100 PF capacitor through 1.5 Kohm resistance. ?? Machine-Model stresses devices by sudden application of a high voltage supplied by a 200 PF capacitor through very low (0 ohm) resistance Test circuit & condition ?? Zap Interval : 1 second ?? Number of Zaps : 3 positive and 3 negative at room temperature ?? Critera : I-V Curve Tracing Model HBM MM Model Vdd, Vss, I/C Vdd, Vss, I/C S/S 15 15 TARGET 4000V 200V Results Pass Pass ELECTRICAL CHARACTERISTICS 14 5.6 Latch-Up Test Results Test Description: Latch-Up testing was performed at room ambient using an IMCS-4600 system which applies a stepped voltage to one pin per device with all other pins open except Vdd and Vss which were biased to 5 Volts and ground respectively. Testing was started at 5.0 V (Positive) or 0 V(Negative), and the DUT was biased for 0.5 seconds. If neither the PUT current supply nor the device current supply reached the predefined limit (DUT=0 mA , Icc=100 mA), then the voltage was increased by 0.1 Volts and the pin was tested again. This procedure was recommended by the JEDEC JC-40.2 CMOS Logic standardization committee. Notes: 1. DUT: Device Under Test. 2. PUT: Pin Under Test. Icc Measurement m A 1 Source Vcc Pin under test DUT GND V Supply + Untested Input Tied to V supply Trigger Source Untested Output Open Circuit + Test Circuit : Positive Input/ output Overvoltage /Overcurrent ELECTRICAL CHARACTERISTICS 15 Icc Measurement mA 1 Source V Supply V cc Pin under test + Untested Input Tied to V supply Trigger Source DUT GND Untested Output Open Circuit + Test Circuit : Negative Input/ Output Overvoltage /Overcurrent Icc Measurement mA V Supply Untested Output Open Circuit Vcc All Input Tied to V supply + DUT GND Supply Voltage test Latch–Up Data Model Voltage Current Vdd-Vxx Model + + Voltage (v)/ Current (mA) 11.0 11.0 200 200 9.0 S/S 5 5 5 Pass 16 Results Pass ELECTRICAL CHARACTERISTICS MECHANICAL INFORMATION 17 6.0 Mechanical Information b ody size D1 E1 7 7 7 7 7 7 10 10 10 10 10 10 12 12 12 12 14 14 14 14 14 14 14 14 14 14 14 20 14 20 20 20 20 20 24 24 24 24 24 24 28 28 28 28 28 28 A1 A2 L1 b c e lead c ount 32 44 48 44 64 80 80 100 64 80 100 120 128 100 128 144 160 160 176 216 160 208 256 A1 0 .1 0 .1 0 .1 0 .1 0 .1 0 .1 0 .1 0 .1 0 .1 0 .1 0 .1 0 .1 0 .1 0 .1 0 .1 0 .1 0 .1 0 .1 0 .1 0 .1 0 .1 0 .1 0 .1 A2 1 .4 1 .4 1 .4 1 .4 1 .4 1 .4 1 .4 1 .4 1 .4 1 .4 1 .4 1 .4 1 .4 1 .4 1 .4 1 .4 1 .4 1 .4 1 .4 1 .4 1 .4 1 .4 1 .4 L1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 b 0.35 0 .2 0 .2 0 .3 0 .2 0.16 0 .2 0.16 0.35 0 .3 0 .2 0.16 0.16 0 .3 0 .2 0 .2 0.16 0 .2 0.16 0.16 0 .3 0 .2 0.16 c 0.127 0.127 0.127 0.127 0.127 0.127 0.127 0.127 0.127 0.127 0.127 0.127 0.127 0.127 0.127 0.127 0.127 0.127 0.127 0.127 0.127 0.127 0.127 e 0 .8 0 .5 0 .5 0 .8 0 .5 0 .4 0 .5 0 .4 0 .8 0.65 0 .5 0 .4 0 .4 0.65 0 .5 0 .5 0 .4 0 .5 0 .4 0 .4 0.65 0 .5 0 .4 stand-o f f b ody thickness lead length lead width lead thickness lead pitch MECHANICAL INFORMATION 18