AZ100LVEL16VRLR2

ARIZONA MICROTEK, INC. AZ100LVEL16VR ECL/PECL Oscillator Gain Stage & Buffer with Selectable Enable FEATURES • • • • • • High Bandwidth for ≥1GHz Similar Operation as AZ100EL16VO Operating Range of 3.0V to 5.5V Minimizes External Components Selectable Enable Polarity and Threshold (CMOS/TTL or PECL) Available in a 3x3mm MLP Package PACKAGE AVAILABILITY PACKAGE MLP 16 MLP 16 T&R MLP 16 T&R DIE PART NO. AZ100LVEL16VRL AZ100LVEL16VRLR1 AZ100LVEL16VRLR2 AZ100LVEL16VRX MARKING AZM16R AZM16R AZM16R N/A DESCRIPTION The AZ100LVEL16VR is a specialized oscillator gain stage with high gain output buffer including an enable. The QHG/QHG outputs have a voltage gain several times greater than the Q/Q outputs. ¯ ¯ The AZ100LVEL16VR provides a selectable enable that allows continuous oscillator operation. See truth table below for enable function. If Enable pull-up is desired in the CMOS mode, an external ≤20kΩ resistor connecting EN to VCC will override the on-chip pull-down resistor. The AZ100LVEL16VR also provides a VBB and 470Ω internal bias resistors from D to VBB and D to VBB. The VBB pin can support 1.5mA sink/source current. Bypassing ¯ VBB to ground with a 0.01 µF capacitor is recommended. Outputs Q/Q each have a selectable on-chip pull-down current source. See truth table below for current source ¯ functions. External resistors may also be used to increase pull-down current to a maximum total of 25mA. Outputs QHG/QHG each have an optional on-chip pull-down current source of 10mA. When pad/pin VEEP is left ¯ open (NC), the output current sources are disabled and the QHG /QHG operate as standard PECL/ECL. When VEEP is ¯ connected to VEE , the current sources are activated. The QHG /QHG pull-down current can be decreased, by using a ¯ resistor to connect from VEEP to VEE. NOTE: Specifications in the ECL/PECL tables are valid when thermal equilibrium is established. 1630 S. STAPLEY DR., SUITE 125 • MESA, ARIZONA 85204 • USA • (480) 962-5881 • FAX (480) 890-2541 www.azmicrotek.com AZ100LVEL16VR ENABLE TRUTH TABLE EN-SEL EN Q/Q QHG ¯ NC PECL Low, VEE or NC Data Data NC PECL High or Vcc Data Low VEE* Data Low CMOS Low or VEE VEE* CMOS High or Vcc Data Data Data Low VEE NC, no external pull-up Data Data VEE NC, with ≤20kΩ to VCC *Connections to VCC or VEE must be less than 1Ω. PIN DESCRIPTION PIN D/D ¯ Q/Q ¯ QHG/QHG ¯ VBB EN-SEL EN CS-SEL VEEP VEE VCC FUNCTION Data Inputs Data Outputs Data Outputs w/High Gain Reference Voltage Output Selects Enable Logic Enable Input Selects Q and Q Current Source Magnitude ¯ Optional QHG and QHG Current Sources ¯ Negative Supply Positive Supply QHG ¯ Data High High Data High Data Q Q D D 470 Ω 4mA EA. CS-SEL QHG QHG 10mA EA. VBB EN CMOS / TTL THRESHOLD VEEP VEE EN-SEL CURRENT SOURCE TRUTH TABLE CS-SEL NC VEE* VCC* Q 4mA typ. 8mA typ. 0 Q ¯ 4mA typ. 8mA typ. 4mA typ. Absolute Maximum Ratings are those values beyond which device life may be impaired. Symbol VCC VI VEE VI IOUT TA TSTG Characteristic PECL Power Supply (VEE = 0V) PECL Input Voltage (VEE = 0V) ECL Power Supply (VCC = 0V) ECL Input Voltage (VCC = 0V) Output Current --- Continuous --- Surge Operating Temperature Range Storage Temperature Range Rating 0 to +8.0 0 to +6.0 -8.0 to 0 -6.0 to 0 50 100 -40 to +85 -65 to +150 Unit Vdc Vdc Vdc Vdc mA °C °C 100K ECL DC Characteristics (VEE = -3.0V to -5.5V, VCC = GND) Symbol VOH VOL VIH VIL VBB IIL IIH IEE 1. 2. 3. Characteristic 2 -40°C Min -1045 -1925 Max -835 -1555 Min -995 -1900 0° C Max -835 -1620 -880 VCC -1475 VEE + 800 -1250 150 48 Min -995 -1900 25° C Max -835 -1620 -880 VCC -1475 VEE + 800 -1250 150 48 Min -995 -1900 85° C Max -835 -1620 -880 VCC -1475 VEE + 800 -1250 150 54 Unit mV mV mV mV mV µA µA mA Output HIGH Voltage Output LOW Voltage2 Input HIGH Voltage -880 D/D, EN (PECL) ¯ -1165 VCC EN (CMOS/TTL) VEE+2000 Input LOW Voltage -1475 D/D, EN (PECL) ¯ -1810 VEE + 800 EN (CMOS/TTL) VEE Reference Voltage -1390 -1250 Input LOW Current EN3 0.5 Input HIGH Current EN3 150 Power Supply Current1 48 Specified with VEEP and CS-SEL open. Specified with VEEP and CS-SEL connected to VEE. Specified with EN-SEL open. -1165 VEE+2000 -1810 VEE -1390 0.5 -1165 VEE+2000 -1810 VEE -1390 0.5 -1165 VEE+2000 -1810 VEE -1390 0.5 July 2002 * REV - 1 www.azmicrotek.com 2 AZ100LVEL16VR 100K LVPECL DC Characteristics (VEE = GND, VCC = +3.3V) Symbol VOH VOL VIH VIL VBB IIL IIH IEE 1. 2. 3. 4. Characteristic 1,3 -40°C Min 2255 1375 Max 2465 1745 Min 2305 1400 0° C Max 2465 1655 Min 2305 1480 2135 2000 1490 GND 1910 0.5 25°C Max 2465 1680 2420 VCC 1825 800 2050 150 48 Min 2305 1400 2135 2000 1490 GND 1910 0.5 85°C Max 2465 1680 2420 VCC 1825 800 2050 150 54 Unit mV mV mV mV mV µA µA mA Output HIGH Voltage Output LOW Voltage1,3 Input HIGH Voltage 2135 2420 2135 2420 D/D, EN (PECL)1 ¯ EN (CMOS/TTL) 2000 VCC 2000 VCC Input LOW Voltage 1490 1825 1490 1825 D/D, EN (PECL)1 ¯ EN (CMOS/TTL) GND 800 GND 800 Reference Voltage1 1910 2050 1910 2050 Input LOW Current EN4 0.5 0.5 Input HIGH Current EN4 150 150 Power Supply Current2 48 48 For supply voltages other that 3.3V, use the ECL table values and ADD supply voltage value. Specified with VEEP and CS-SEL open. Specified with VEEP and CS-SEL connected to VEE. Specified with EN-SEL open. 100K PECL DC Characteristics (VEE = GND, VCC = +5.0V) Symbol VOH VOL VIH VIL VBB IIL IIH IEE 1. 2. 3. 4. Characteristic 1,3 -40°C Min 3955 3075 Max 4165 3445 Min 4005 3100 0° C Max 4165 3338 Min 4005 3100 3835 2000 3190 GND 3610 0.5 25°C Max 4165 3338 4120 VCC 3525 800 3750 150 48 Min 4005 3100 3835 2000 3190 GND 3610 0.5 85°C Max 4165 3338 4120 VCC 3525 800 3750 150 54 Unit mV mV mV mV mV µA µA mA Output HIGH Voltage Output LOW Voltage1,3 Input HIGH Voltage 3835 4120 3835 4120 D/D, EN (PECL)1 ¯ EN (CMOS/TTL) 2000 VCC 2000 VCC Input LOW Voltage 3190 3525 3190 3525 D/D, EN (PECL)1 ¯ EN (CMOS/TTL) GND 800 GND 800 Reference Voltage1 3610 3750 3610 3750 Input LOW Current EN4 0.5 0.5 Input HIGH Current EN4 150 150 Power Supply Current2 48 48 For supply voltages other that 5.0V, use the ECL table values and ADD supply voltage value. Specified with VEEP and CS-SEL open. Specified with VEEP and CS-SEL connected to VEE. Specified with EN-SEL open. AC Characteristics (VEE = -3.0V to -5.5V; VCC = GND or VEE = GND; VCC = +3.0V to +5.5V) Symbol tPLH / tPHL Characteristic Min -40°C Typ Max Min 0° C Typ Max Min 25° C Typ Max Min 85° C Typ Max Unit ps ps mV ps Propagation Delay 400 400 400 430 (SE) D to Q/Q Outputs1 ¯ ¯ 550 550 550 630 D to QHG/QHG Outputs1 (SE) tSKEW Duty Cycle Skew2 (SE) 5 20 5 20 5 20 5 20 VPP (AC) Minimum Input Swing3 80 80 80 80 Output Rise/Fall Times1 tr / t f 100 260 100 260 100 260 100 260 (20% - 80%) 1. Output specified with VEEP and CS-SEL connected to VEE with an AC coupled 50Ω load. 2. Duty cycle skew is the difference between a tPLH and tPHL propagation delay through a device. 3. VPP is the minimum peak-to-peak differential input swing for which AC parameters guaranteed. The device has a voltage gain of ≈ 20 to Q/Q ¯ ¯ outputs and a voltage gain of ≈ 100 to QHG/QHG outputs. July 2002 * REV - 1 www.azmicrotek.com 3 AZ100LVEL16VR D EN { EN-SEL OPEN (PECL) (CMOS) EN-SEL SHORTED TO VEE Q QHG TIMING DIAGRAM Q 16 NC D D VBB 1 2 Q 15 NC 14 VCC 13 12 CS-SEL 11 QHG D D LV16VR Q A M Q L VCC K J I H G B DIE: 950u X 950u BOND PAD: 85u X 85u CS-SEL QHG QHG EN-SEL 16MLP 3 4 5 EN 6 NC 7 VEE 8 VEEP 9 10 QHG EN-SEL VBB EN C THICKNESS: 14mils D E F VEE VEEP TOP VIEW July 2002 * REV - 1 www.azmicrotek.com 4 AZ100LVEL16VR PACKAGE DIAGRAM MLP 16 D 2. INDEX AREA (D/2 x E/2) A D 2 E 2 E 3x e e 2 1 16 x b 3. B D2 D2/2 E2/2 E2 2x 2x aaa C aaa C TOP VIEW bbb M C A B 3x e BOTTOM VIEW L ccc C A 4. 0.08 C SIDE VIEW A3 C SEATING PLANE A1 NOTES: 1. DIMENSIONING AND TOLERANCING CONFORM TO ASME T14-1994. 2. THE TERMINAL #1 AND PAD NUMBERING CONVENTION SHALL CONFORM TO JESD 95-1 SPP-012. 3. DIMENSION b APPLIES TO METALLIZED PAD AND IS MEASURED BETWEEN 0.25 AND 0.30mm FROM THE PAD TIP. 4. COPLANARITY APPLIES TO THE EXPOSED PAD AS WELL AS THE TERMINALS DIM A A1 A3 b D D2 E E2 e L aaa bbb ccc MILLIMETERS MIN MAX 1.00 0.80 0.00 0.05 0.25 REF 0.30 0.18 2.90 3.10 0.25 1.95 2.90 3.10 0.25 1.95 0.50 BSC 0.50 0.30 0.25 0.10 0.10 July 2002 * REV - 1 www.azmicrotek.com 5 AZ100LVEL16VR Arizona Microtek, Inc. reserves the right to change circuitry and specifications at any time without prior notice. Arizona Microtek, Inc. makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does Arizona Microtek, Inc. assume any liability arising out of the application or use of any product or circuit and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. Arizona Microtek, Inc. does not convey any license rights nor the rights of others. Arizona Microtek, Inc. products are not designed, intended or authorized for use as components in systems intended to support or sustain life, or for any other application in which the failure of the Arizona Microtek, Inc. product could create a situation where personal injury or death may occur. Should Buyer purchase or use Arizona Microtek, Inc. products for any such unintended or unauthorized application, Buyer shall indemnify and hold Arizona Microtek, Inc. and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that Arizona Microtek, Inc. was negligent regarding the design or manufacture of the part. July 2002 * REV - 1 www.azmicrotek.com 6