BQ2903PN

bq2903 Rechargeable Alkaline Charge/Discharge Controller IC Features ➤ Safe charge of three or four rechargeable alkaline batteries such as Renewal® from Rayovac® ➤ Pulsed charge terminated with maximum voltage limit ➤ LED outputs indicate charge status ➤ Selectable end-of-discharge voltage prevents overdischarge and improves cycle life ➤ Optional external FET drive allows high current loads ➤ Pre-charge qualification indicates fault conditions ➤ Automatic charge control simplifies charger design ➤ Available in 14-pin 300-mil DIP or 150-mil SOIC General Description The bq2903 is a cost-effective charge controller for rechargeable alkaline batteries such as Renewal batteries from Rayovac. The bq2903 combines sensitive, full-charge detection for three to four rechargeable alkaline cells, with a low-battery cut-off for over-discharge protection. Designed for integration into a threeor four-cell system, the bq2903 can improve the service life of the rechargeable alkaline cells by properly managing the charge and discharge. The bq2903 requires a voltage-limited current source to generate the proper charge pulses for the Renewal cell. Each cell is individually monitored to ensure full charge without a damaging overcharge. Charge completion is indicated when the average charge rate falls below approximately 6% of the fast charge rate. Status outputs are provided to indicate charge in progress, charge complete, or fault condition. The bq2903 avoids over-depleting the battery by using the internal end-of-discharge control circuitry. The bq2903 also eliminates the external power switching transistors needed to separately charge individual Renewal cells. To reduce external component count, the discharge and charge control FETs are internal to the bq2903; however, if the discharge load is greater than 400mA, a DRV pin is provided to drive an external N-FET, reducing the effective discharge path resistance for the system. For safety, charging is inhibited if the voltage of any cell is greater than 3.0V during charge or if the voltage of any cell is less than 0.4V when not charging (open-circuit voltage). Pin Connections Pin Names DC CHG Charging supply input Battery status output 1 Battery status output 2 Number of cells input End of discharge voltage select input Battery 1 positive input BAT1N BAT2N BAT3N VSS Battery 1 negative input Battery 2 negative input Battery 3 negative input Battery 4 negative input/ IC ground System load returns External FET drive output BAT1N BAT2N BAT3N NSEL VSEL DONE CHG 1 2 3 4 5 6 7 14 13 12 11 10 9 8 BAT1P DC LRTN2 VSS VSS LRTN1 DRV DONE NSEL VSEL LRTN1, 2 DRV BAT1P 14-Pin Narrow DIP or SOIC PN290301.eps 6/99 C 1 bq2903 Pin Descriptions DC DC supply input This input is used to recharge the rechargeable alkaline cells and power the bq2903 during charge. This input must be connected to a voltage-limited current source. CHG Charge status This open-drain output is used to signify the battery charging status and is valid only when DC is applied. See Figure 4 and Table 1. DONE Charge done This open-drain output is used to signify charge completion and is valid only when DC is applied. NSEL Number of cells input This input selects whether the bq2903 charges 3 or 4 cells. NSEL = BAT1P selects 4 cells, and NSEL = VSS selects 3 cells. VSEL End-of-discharge select input This three-level input selects the desired endof-discharge cut-off voltage for the bq2903. VSEL BAT3N BAT1N BAT1P = BAT1P selects an EDV of 1.10V. VSEL floating selects EDV = 1.0V. VSEL =VSS selects EDV = 0.9V. Battery 1 positive input This input connects to the positive terminal of the battery designated BAT1 (see Figure 3). This pin also provides power to the bq2903 when DC is not present. Battery 1 negative input This input connects to the negative terminal of the battery designated BAT1 (see Figure 3). BAT2N Battery 2 negative input This input connects to the negative terminal of the battery designated BAT2 (see Figure 3). Battery 3 negative input This input connects to the negative terminal of the battery designated BAT3 (see Figure 3). VSS Battery 4 negative input/IC ground This input connects to the negative terminal of the battery designated BAT4 (see Figure 3). DC 13 14 BAT 1P 4 NSEL 5 VSEL 6 DONE Control/Status Logic 1 BAT 1N 2 BAT 2N 3 BAT 3N 8 DRV 9 LRTN1 12 LRTN 2 CHG 7 10 VSS 11 VSS BD290301.eps Figure 1. Functional Block Diagram 2 bq2903 LRTN1, 2 Load returns These open-drain pull-down outputs are typically used as low-side load switches. High-side load switching is also possible with the addition of an external P-FET DRV External FET drive output This push-pull output drives an optional external N-FET (see Figure 4). See page 5 for a full description. (VOCV 3.0V VOCV ≤ 1.63V before pulse VOCV > 1.63V before pulse Average charge rate falls below 6% of the fast charge rate 1 2 BAT1P Input Charge pulsed @ 100Hz per Figure 1 Pulse skipped per Figure 1 Charge complete 1 CHG Output Z 6 sec = Low 1 sec = Z 6 DONE Output Z Z Z Z Low Low Low Z 1. VOCV = Open-circuit voltage of each cell between positive and negative leads. 2. VCCV = Closed-circuit voltage. 3 bq2903 Charging The bq2903 controls charging by periodically connecting the DC current source to the battery stack, not to the individual battery cells. The charge current is pulsed from the internal clock at approximately a 100 Hz rate on the BAT1P pin. The bq2903 pulse charges the battery for approximately 7.5ms of every 10ms, when conditions warrant. The bq2903 measures the open circuit voltage (VOCV) of each battery cell during the idle period. If a single-cell potential of any battery is above the maximum open-circuit voltage (VMAX = 1.63V ±3%), the following pulses are skipped until all cell potentials fall below the VMAX limit. Charging is terminated when the average charge rate falls below approximately 6% of the maximum charge rate. Once charging is terminated, the internal charging FET remains off, and the DONE output becomes active per Table 1 and Figure 2. With DC applied, the internal discharge FET will always remain on, and the DRV output will remain high. End-of-Discharge Control When DC is less than the voltage on BAT1P, the bq2903 is powered by the battery at BAT1P. In this state, the batteries discharge down to the level determined by the VSEL pin. The end-of-discharge voltage (VEDV) is selectable by connecting the VSEL pin as outlined in Table 2. If the voltage across any cell is below the voltage specified by the VSEL input, the bq2903 disconnects the battery stack from the load by turning the internal discharge FET off. The DRV output is also driven low, disabling the external FET. After disconnecting power (the battery stack) to the load, the standby current in the bq2903 is reduced to less than 1µ A. Typically, higher discharge loads (>200mA) should use a lower discharge voltage cut-off to maximize battery capacity. After disconnecting the battery stack from the load, the internal discharge FET remains off, and the DRV output remains low until the batteries are replaced or DC is reapplied, initiating a new charge cycle. DC Valid Pending 1 tP 10ms tPW 7.5ms Charging 2 3 Charge Complete 4 BAT1P 1/6 sec. CHG DONE Notes: 1. 2. 3. 4. Charging Pending: 0.4 < VOCV < 0.4V per cell, VCCV > 3.0V per cell. Charging: 0.4 < VOCV < 1.63V, VCCV < 3.0V. Pulses skipped when VOCV > 1.63V. Charge complete when average charge rate falls below approximately 6% of the fast charge rate. Figure 2. bq2903 Example of Charge Action Events 4 bq2903 Table 2. bq2903 EDV Selections End-of-Discharge Voltage 1.10V 1.00V 0.90V Pin Connection VSEL = BAT1P VSEL = Z VSEL = VSS DRV Pin The bq2903 controls battery discharge with two internal FETs between LRTN1, LRTN2, and VSS. The current through each switch should be limited to 200mA. LRTN1 can be tied to LRTN2 for discharge current of up to 400mA. To reduce the effective discharge switch resistance, or for high current loads, the DRV pin can control an external N-FET, as shown in Figure 4. DRV is “high” when a valid charging voltage is applied to the DC pin and remains “high” during discharge. DRV goes “low” during discharge to turn off the external FET when an end-of-discharge condition is met. This pin should not be connected if the external FET option is not used. Number-of-Cell Selection NSEL is used to select whether the bq2903 will charge 3 or 4 cells. Figure 3 shows the proper connection for a 3or 4-cell system. For 4 cell operation, NSEL = BAT1P. For 3 cell operation, NSEL = VSS and the BAT2N pin should be connected to the BAT3N pin. BAT1P BAT1 BAT2 BAT3 BAT4 BAT1P BAT1 BAT2 NSEL BAT1N BAT2N BAT3N VSS bq2903 4-Cell NSEL BAT1N BAT2N BAT3N VSS bq2903 3-Cell FG290301.eps BAT3 Figure 3. NSEL Connection Diagram 5 bq2903 DC+ R1 D1 CHG/RED C1 D2 DONE/GREEN 13 7 6 4 5 10 11 DC CHG DONE NSEL VSEL VSS VSS BAT1P BAT1N BAT2N BAT3N DRV LRTN1 LRTN2 14 1 2 3 8 9 12 C2 R2 C3 C4 C5 R3 R4 Load bq2903 DCQ1 IRF7102 Dual N-Channel MOSFET Battery and Load Optional for Higher Discharge Current or Lower Series Loss Note: Load must be disconected from battery stack while changing FG290302.eps Figure 4. bq2903 Application Example, 4–Cell and 1.0V EDV 6 bq2903 Absolute Maximum Ratings Symbol DCIN VT TOPR TSTG TSOLDER IDC ILOAD IOL Note: VDC DC threshold voltage applied on any pin, excluding DC pin Operating ambient temperature Storage temperature Soldering temperature DC charging current Discharge current Output current Parameter Minimum -0.3 -0.3 0 -40 Maximum 11.0 11.0 +70 +85 +260 400 500 20 Unit V V °C °C °C mA mA mA No external FET CHG, DONE 10 sec max. Commercial Notes Permanent device damage may occur if Absolute Maximum Ratings are exceeded. Functional operation should be limited to the Recommended DC Operating Conditions detailed in this data sheet. Exposure to conditions beyond the operational limits for extended periods of time may affect device reliability. 7 bq2903 DC Thresholds Symbol VMAX (TA = 25°C; VDC =10V) Parameter Maximum open-circuit voltage Rating 1.63 0.90 Tolerance ± 3% ± 5% ± 5% ± 5% ± 5% ± 5% ± 5% Unit V V V V V V V Notes VOCV > VMAX inhibits or terminates charge pulses VSEL = VSS VSEL = Z VSEL = BAT1P VCCV > VFLT terminates charge, indicates fault VOCV < VMIN inhibits charge VOCV < VCE on all cells re-initiates charge VEDV End-of-discharge voltage 1.00 1.10 VFLT VMIN VCE Note: Maximum closed-circuit voltage Minimum battery voltage Charge enable 3.00 0.40 1.40 Each parameter above has a temperature coefficient associated with it. To determine the coefficient for each parameter, use the following formula: Tempco = ParameterRating * -0.5mV/°C 1.63 The tolerance for these temperature coefficients is 10%. Timing Symbol tP tPW (TA = 25°C) Parameter Pulse period Pulse width Minimum - Typical 10 7.5 Maximum - Unit ms ms See Figure 2 See Figure 2 Notes 8 bq2903 DC Electrical Characteristics (TA = TOPR) Symbol VIH VIL Parameter Logic input high Logic input low Minimum VBAT1P - 0.1 VSS Logic output low VOH Gate drive output (Greater of VBAT1P or VDC) - 1.0 5 IOL Output current 1 IDC ISB1 ISB2 IL IOZ Supply current Standby current End-of-discharge standby current Input leakage Output leakage in high-Z state Discharge on resistance 35 25 250 40 1 ±1 ±5 mA µA µA µA µA µA 0.4 V V Typical Maximum VBAT1P VSS + 0.1 1.0 Unit V V V Notes VSEL, NSEL VSEL, NSEL DONE, CHG, IOL = 5mA IOL = 1.0mA, DRV DRV, IOH = -1.0mA VOL = VSS + 1.0V, DONE DRV = VSS + 1.0V Outputs unloaded, VDC = 10.0V VDC = 0, VOCV > VEDV, BAT1P-3N VDRV = 0V, VDC = 0 NSEL CHG, DONE Discharge FETs; VBAT1P = 2.7V, LRTN1 (pin 9) must be tied to LRTN2 (pin 12) No external FET; LRTN1 (pin 9) must be tied to LRTN2 (pin 12). V= GND to GND + 0.5V, VSEL V = VDC -0.5 to VDC, VSEL VSEL CHG, VOL - - mA RDSON - 0.5 - Ω ILOAD Discharge current without external N-FET Logic input low Logic input high Logic input float DC charging current Operating voltage All voltages relative to VSS. - - 400 mA IIL IIH IIZ IDC VOP Note: -70 -2 2.7 - 70 2 300 10 µA µA µA mA V 9 bq2903 PN: 14-Pin DIP (0.300") 14-Pin PN (0.300" DIP) Inches Dimension A A1 B B1 C D E E1 e G L S Min. 0.160 0.015 0.015 0.055 0.008 0.740 0.300 0.230 0.300 0.090 0.115 0.070 Max. 0.180 0.040 0.022 0.065 0.013 0.770 0.325 0.280 0.370 0.110 0.150 0.090 Millimeters Min. 4.06 0.38 0.38 1.40 0.20 18.80 7.62 5.84 7.62 2.29 2.92 1.78 Max. 4.57 1.02 0.56 1.65 0.33 19.56 8.26 7.11 9.40 2.79 3.81 2.29 SN: 14-Pin SN (0.150" SOIC) 14-Pin SN (0.150" SOIC) Inches Dimension A A1 B C D E e H L Min. 0.060 0.004 0.013 0.007 0.335 0.150 0.045 0.225 0.015 Max. 0.070 0.010 0.020 0.010 0.350 0.160 0.055 0.245 0.035 Millimeters Min. 1.52 0.10 0.33 0.18 8.51 3.81 1.14 5.72 0.38 Max. 1.78 0.25 0.51 0.25 8.89 4.06 1.40 6.22 0.89 10 bq2903 Data Sheet Revision History Change No. 1 1 1 1 1 1 2 Notes: Page No. 1 2 3 5 6 9 7 Description Pin connections Functional block diagram Pin description DRV pin Application example RDSON and ILOAD specification TOPR Nature of Change LRTN1 (pin 9) was LRTN, LRTN2 (pin 12) was LRTN Updated block diagram Added descriptions for LRTN1 and LRTN2 Clarified LRTN1 and LRTN2 description Corrected schematic Added notes on LRTN1 and LRTN2 Deleted industrial temperature range Change 1 = May 1999 B changes from July 1996. Change 2 = June 1999 C changes from May 1999 B Ordering Information bq2903 Package Option: PN = 14-pin narrow plastic DIP SN = 14-pin narrow SOIC Device: bq2903 Rechargeable Alkaline Charge/Discharge Controller IC 11 IMPORTANT NOTICE Texas Instruments and its subsidiaries (TI) reserve the right to make changes to their products or to discontinue any product or service without notice, and advise customers to obtain the latest version of relevant information to verify, before placing orders, that information being relied on is current and complete. All products are sold subject to the terms and conditions of sale supplied at the time of order acknowledgement, including those pertaining to warranty, patent infringement, and limitation of liability. TI warrants performance of its semiconductor products to the specifications applicable at the time of sale in accordance with TI’s standard warranty. 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