CM8500

CM8500 3A BUS TERMINATOR GENERAL DESCRIPTION The CM8500 is a switching regulator designed to provide a desired output voltage or termination voltage for various applications by converting voltage supplies ranging from 2.0V to 4.0V. The CM8500 can be implemented to produce regulated output voltages in two different modes. In the default mode, when the VIN/2 pin is open, the output voltage is 50% of the VCCQ. The CM8500 can also be used to produce various user-defined voltages by forcing a voltage on the VIN/2 pin. In this case, the output voltage follows the VIN/2 pin input voltage. The switching regulator is capable of sourcing or sinking up to 3A of current while regulating an output V TT voltage to within 3% or less. The CM8500, used in conjunction with series termination resistors, provides an excellent voltage source for active termination schemes of high speed transmission lines as those seen in high speed memory buses and distributed backplane designs. The voltage output of the regulator can be used as a termination voltage for other bus interface standards such as SSTL, CMOS, Rambus ™ ,GTL+, VME, LV-CMOS, LV-TTL, and PECL. FEATURES Patent Filed #6,452,366 16 pin PTSSOP and PSOP package Source and sink up to 3A, no heat sink required Peak Current to 6A Integrated Power MOSFETs Output voltage can be programmed by external resistors Separate voltages for VCCQ and PVDD V OUT of ±3% or less at 3A Minimum external components Shutdown for standby or suspend mode operation Thermal shutdown protection Soft start APPLICATIONS Mother Board PCI / AGP Graphics Game / Play Station Set Top Box IPC SCSI-III Bus terminator Buck Converter PIN CONFIGURATION PSOP-16 (PS16)/PTSSOP-16 (PT16) Top View 1 2 3 4 5 6 7 8 VCC2 PVDD2 VL2 PGND2 AGND VFB VCCQ AGND 16 15 14 13 12 11 10 9 VCC1 PVDD1 VL1 PGND1 AGND SD VIN/2 AGSEN 2004/06/01 Rev. 1.1 Champion Microelectronic Corporation Page 1 CM8500 3A BUS TERMINATOR PIN DESCRIPTION Pin No. 1,16 2,15 3,14 4,13 5,9,12 8 6 Symbol VCC1,VCC2 PVDD1,PVDD2 VL1,VL2 PGND1,PGND2 AGND Description Voltage supply for internal circuits Voltage supply for output power transistors Output voltage/inductor connection (IDD1+IDD2, Output RMS current) Ground for output power transistors Ground for internal reference voltage divider Ground for remote sensing Shutdown active high. CMOS input level 0.75 X VCC 7 10 11 VIN/2 VCCQ VFB Input for external reference voltage Voltage reference for external voltage divider Feedback node for the VTT VCCQ/2 2.5 VCCQ/2 VCC + 0.3V V V V V Min. 2 2 -3 Operating Rating Typ. Max. 2.5 2.5 4 4 3 Unit V V A AGSEN SD BLOCK DIAGRAM VCCQ 10 VCC1 1 VCC2 16 SD 6 PVDD1 2 PVDD2 15 OSCILLATOR/ RAMP GENERATOR 3 VL1 14 VL2 S Q 100K ERROR AMP R + RAMP AMP COMPARATOR Q VIN/2 7 100K + - AGND 5 AGND 9 20PF AGND 12 8 AGND 11 VFB 4 PGND1 13 PGND2 ORDERING INFORMATION Part Number CM8500IT CM8500IS CM8500GIT* CM8500GIS* CM8500TEVAL *Note: G : Suffix for Pb Free Product Temperature Range -40℃ to 85℃ -40℃ to 85℃ -40℃ to 85℃ -40℃ to 85℃ 16-Pin 16-Pin 16-Pin 16-Pin Package PTSSOP (PT16) PSOP (PS16) PTSSOP (PT16) PSOP (PS16) Evaluation Board (T16) 2004/06/01 Rev. 1.1 Champion Microelectronic Corporation Page 2 CM8500 3A BUS TERMINATOR ABSOLUTE MAXIMUM RATINGS Absolute maximum ratings are those values beyond which the device could be permanently damaged. PVDD/VCC/VCCQ ......................................….......-0.3V to 4.0V Voltage on Any Other Pin ………... GND – 0.3V to VCC + 0.3V Output RMS Current, Source or Sink .....…………........…...3.0A Junction Temperature ...…………………… …………150°C Storage Temperature ……................……. -65°C to 125°C Lead Temperature (Soldering, 10 sec)……………….. 300°C Thermal Resistance  ( θ JA )….. ………………….. .40°C/W OPERATING CONDITIONS Temperature Range ............................. -40°C to 85°C PVDD Operating Range .........................2.0V to 4.0V (Unless otherwise stated, these specifications apply TA=25°C; VCC=+3.3V and PVDD=+3.3V) maximum ratings are stress ratings only and functional device operation is not implied. (Note 1) CM8500 Min. 1.12 1.22 1.32 1.09 1.19 1.28 1.139 1.238 1.337 510 Typ. 1.15 1.25 1.35 1.15 1.25 1.35 1.15 1.25 1.35 50 600 690 3 6 150 180 Max. 1.18 1.28 1.38 1.21 1.31 1.42 1.162 1.263 1.364 ELECTRICAL CHARACTERISTICS Symbol SWITCHING REGULATOR Parameter Test Conditions Unit IOUT = 0, VCCQ = 2.3V VIN/2 = open Note 2 VL Output Voltage, SSTL_2 IOUT = ±3A, VIN/2 = open Note 3 VIN/2 ZIN fsw IOUT(RMS) IOUT(PEAK) MOSFETs RDS(ON) SUPPLY IVCCA IPVDD Quiescent Current VFB = 1.4V LC unconnected VFB = 1.4V LC unconnected Drain to Source on-State Resistance PVDD=5V Internal Resistor Divider VIN/2 Reference Pin Input Impedance Switching Frequency Maximum Output RMS Current Maximum Output Peak Current IOUT = 0 Note 2 Note 2 VCCQ = 2.3V VCCQ = 2.5V VCCQ = 2.7V VCCQ = 0 VCCQ = 2.7V VCCQ = 2.5V VCCQ = 2.7V VCCQ = 2.3V VCCQ = 2.5V V V V V V V V V V KΩ KHz A A mΩ CM8500 CM8500 CM8500 200 500 µA µA Note 1: Limits are guaranteed by 100% testing, sampling, or correlation with worst case test conditions Note 2: VCC, PVDD = 3.3V ±10% Note 3: It’s not 100% test 2004/06/01 Rev. 1.1 Champion Microelectronic Corporation Page 3 CM8500 3A BUS TERMINATOR FUNCTIONAL DESCRIPTION The CM8500 is a switching regulator that is capable of sinking and sourcing 3A of current without an external heat sink. CM8500 uses a standard surface mount PTSSOP and PSOP package with bottom metal exposed and the heat can be piped through the bottom of the device and onto the PCB. The CM8500 integrates power MOSFETs that are capable of source and sink 3A of current while maintaining excellent voltage regulation. The output voltage can be regulated within 3% or less by using the external feedback. Separate voltage supply inputs have been added to fit applications with various power supplies for the databus and power buses. INPUTS The input voltage pins (VCCQ or VIN/2) determine the output voltages (VL1 or VL2). In the default mode, when the VIN/2 pin is open, the output voltage is 50% of the VCCQ input. If a specific voltage is forced at the VIN/2 pin, the output voltage follows the voltage at the VIN/2 pin. VCCQ suggested connecting to VCCQ of memory module for better tracking with memory VCCQ. OTHER SUPPLY VOLTAGES Several inputs are provided for the supply voltages: PVDD1, PVDD2, VCC1, and VCC2. The PVDD1 and PVDD2 provide the power supply to the power MOSFETs. VCC1 and VCC2 provide the voltage supply to the OUPUTS The output voltage pins (VL1, VL2) are tied to the databus, is determined by the VCCQ or VIN/2 inputs. address, or clock lines via an external inductor. Output voltage logic section and internal error amplifiers. FEEDBACK The VFB pin is an input that can be used for closed loop compensation. This input is derived from the voltage output. AGSEN pin is a contact node of internal resistor divider for remote sense. APPLICATIONS USING THE CM8500 FOR SSTL BUS TERMINATION Figure 1 is the typical schematic of the CM8500TEVAL that shows the recommended approach for bus terminating solutions for SSTL-2 bus. This circuit can be used in PC memory and Graphics memory applications as shown in Figure 2 and Figure 3. Figure 4 shows the PCB layout of the CM8500TEVAL. Table 1details the key parameters of SSTL_2 specification. Figure 5 shows two different approach of SSTL_2 Terminated Output. (Refer to page 8 for detail description.) 2004/06/01 Rev. 1.1 Champion Microelectronic Corporation Page 4 CM8500 3A BUS TERMINATOR APPLICATION CIRCUIT NOTE: J3:referance output provided from Vtt J4:short :Demo kit on . open:off(into shutdown mode) J6:reference output provided from shunt regulator Vref-OUT J3 1 2 5 J5:pin1 ,pin2 short:Vtt = 1/2Vcc C13 104 1 R8 100 When external voltage applied ,pin1,2 should be open and pin2:connect to external voltage (+) pin3:connect to external voltage (-) D6 TP1 BNC 4 3 L1 3.3uH 2 Vtt=1/2 external voltage R6,R7(option circuit)forVttVOLTAGEADJUST Vtt=(Vcc*R6)/R6+R7 100uf/6.3V 100uf/6.3V 820uf/6.3V SK12 VTT J1 1 2 C3 104 C12 C11 C7 C2 104 C15 10uf/6.3V VDD D5 SK12 VCC U1 CM8500 1 2 VCC1 VDD1 VL1 VCC2 VDD2 VL2 16 15 C16 14 13 12 11 10 9 2 J5 3 1 C5 104 C1 104 C9 100uf/6.3V C10 10uf/6.3V 470uf/6.3V VDD VCC R1 5R1 VDD J2 DC-INPUT 1 2 2 C14 100uf/6.3V R5 100k C4 104 3 4 5 6 PGND1 PGND2 AGND1 AGND4 SD 2/VCC FB VCCQ 1 J4ON/OFF 2 R6 10k 1 R7 10k 2 7 C6 8 G-sense AGND3 IN/EXT 1 102 R3 200k 1 2 1 R4 1k 2 C8 102 Figure 1. CM8500 Typical Application (Schematic of CM8500TEVAL) 2004/06/01 Rev. 1.1 Champion Microelectronic Corporation Page 5 CM8500 3A BUS TERMINATOR Figure 2. Termination Solution for PC Main Memory (Mother Boards) Figure 3. Termination Solution for Graphic Memory (AGP Graphics) 2004/06/01 Rev. 1.1 Champion Microelectronic Corporation Page 6 CM8500 3A BUS TERMINATOR CM8500TEVAL PART LIST Item 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 Q’ty Description Resistors 0805, 5Ω, 1/8W 1 0805, 100Ω, 1/8W 1 0805, 470Ω, 1/8W 1 0805, 1KΩ, 1/8W 1 0805, 100KΩ, 1/8W 2 Capacitors 1 0805, 1nF/ 16V (102) 6 0805, 0.1µF/ 16V (104) 1 0805, 1µF/ 16V (105) CE 10φ, 820uF/ 6.3V 1 2 B Size, Tant 10uF/ 6.3V 4 D Size, Tant 100uF/ 6.3V Magnetics 1 3.3uH 5A Inductor IC’s 1 CM8500IT 1 CM431L Connectors 1 2-pin, 2.54mm 4 2-pin Jumper, 2.54mm 1 3-pin Jumper, 2.54mm PCBs 1 CM8500TEVAL PCB Designator R1 R8 R9 (option) R4 R3, R5 C6, C8 C1, C2, C3, C4, C5 C13 C7 C10, C15 C9, C11, C12, C14 L1 U1 U2 (option) J2 J1, J3, J4, J6 (option) J5 Champion Microelectronic Corp. Manufacturer Sanyo OSCON Bipolar Electronic Corp. Champion Microelectronic Corp. Champion Microelectronic Corp. Vendor Information Bipolar Electronic Corp. Sanyo Phn: +886-3-360 8892 2004/06/01 Rev. 1.1 Champion Microelectronic Corporation Page 7 CM8500 3A BUS TERMINATOR CM8500TEVAL PCB LAYOUT Figure 4. CM8500EVAL PCB Layout SSTL-2 SPECIFICATIONS SYMBOL VDD VDDQ VREF VTT VIH (DC) VIL (DC) VIH (AC) VIL (AC) IOH (DC) IOL (DC) Notes: PARAMETER Device Supply Voltage Output Supply Voltage Input Reference Voltage Termination Voltage DC Input Logic High DC Input Logic Low AC Input Logic High AC Input Logic Low Output Minimum Source DC Current Output Minimum Sink DC Current - 15.2 15.2 MIN VDDQ 2.3 1.15 VREF - 0.04 VREF + 0.18 - 0.3 VREF + 0.35 VREF - 0.35 2.5 1.25 VREF TYP MAX N/A 2.7 1.35 VREF + 0.04 VDDQ + 0.3 VREF - 0.18 UNITS V V V V V V V V mA mA INPUT DC LOGIC LEVELS INPUT AC LOGIC LEVELS OUTPUT DC CURRENT DRIVE VREF and VTT must track variations in VDDQ Peak-to-peak AC noise on VREF may not exceed ± 2% VREF (DC) VTT of transmitting device must track VREF of receiving device Table 1. Key Specifications for SSTL_2 2004/06/01 Rev. 1.1 Champion Microelectronic Corporation Page 8 CM8500 3A BUS TERMINATOR SSTL_2 TERMINATED OUTPUT Single Terminated Output Double Terminated Output Figure 5. SSTL_2 Terminated Output Note. The SSTL_2 specification requires adequate output current drive so that parallel termination schemes can be used. The use of parallel termination is important for high-speed signaling, since it allows proper termination of the bus transmission lines, which reduces signal reflections. The result will be improved settling, lower EMI emissions, and higher possible clock rates. A minimum termination resistance of 23Ω to VTT can be used and still comply with the minimum output voltages and output currents of the SSTL_2 specification. Two choices for implementing the parallel termination are shown in Figure 5. Double Terminated Output The bus is terminated at both ends with a 50Ω resistor, for a combined parallel resistance of 25Ω. Single Terminated Output The bus is terminated at the far end from the controller with a single 25Ω resistor. It is strongly recommended that the single resistor termination scheme be used for best performance. The benefits of this approach include reduced cost, simpler signal routing, reduced reflections, and better signal bandwidth and settling. 2004/06/01 Rev. 1.1 Champion Microelectronic Corporation Page 9 CM8500 3A BUS TERMINATOR CM8500EVAL TESTING DIAGRAM Figure 6. CM8500EVAL Typical Testing Diagram TYPICAL CHARACTERISTICS CM8500 Temperature vs. VTT (VCC,VCCQ&VDD=3.3V) 1.350 1.300 VTT(V) 1.250 1.200 1.150 -40 -30 -20 -10 0 10 20 T(℃) 30 40 50 60 70 80 85 1A 2A 3A Temperature vs. VTT VCC, VCCQ & VDD=3.3V 2004/06/01 Rev. 1.1 Champion Microelectronic Corporation Page 10 CM8500 3A BUS TERMINATOR CM8500 Temperature vs. VTT (VCC,VCCQ&VDD=2.5V) 1.350 1.300 VTT(V) 1.250 1.200 1.150 -40 -30 -20 -10 0 10 20 T(℃) 30 40 50 60 70 80 85 1A 2A 3A Temperature vs. VTT VCC, VCCQ & VDD=2.5V 2V INPUT LOAD: 0A - 3A 2V INPUT LOAD: 3A - 0A 2.5V INPUT LOAD: 0A - 3A 2.5V INPUT LOAD: 3A - 0A 3.3V INPUT LOAD: 0A - 3A 3.3V INPUT LOAD: 3A - 0A 2004/06/01 Rev. 1.1 Champion Microelectronic Corporation Page 11 CM8500 3A BUS TERMINATOR PACKAGE DIMENSION 16-PIN PTSSOP (PT16) θ 16-PIN PSOP (PS16) θ θ θ 2004/06/01 Rev. 1.1 Champion Microelectronic Corporation Page 12 CM8500 3A BUS TERMINATOR IMPORTANT NOTICE Champion Microelectronic Corporation (CMC) reserves the right to make changes to its products or to discontinue any integrated circuit product or service without notice, and advises its customers to obtain the latest version of relevant information to verify, before placing orders, that the information being relied on is current. A few applications using integrated circuit products may involve potential risks of death, personal injury, or severe property or environmental damage. CMC integrated circuit products are not designed, intended, authorized, or warranted to be suitable for use in life-support applications, devices or systems or other critical applications. Use of CMC products in such applications is understood to be fully at the risk of the customer. In order to minimize risks associated with the customer’s applications, the customer should provide adequate design and operating safeguards. HsinChu Headquarter 5F, No. 11, Park Avenue II, Science-Based Industrial Park, HsinChu City, Taiwan 300 T E L : +886-3-567 9979 F A X : +886-3-567 9909 http://www.champion-micro.com Sales & Marketing 11F, No. 306-3, Sec. 1, Ta Tung Rd., Hsichih, Taipei Hsien Taiwan 221 T E L : +886-2-8692 1591 F A X : +886-2-8692 1596 2004/06/01 Rev. 1.1 Champion Microelectronic Corporation Page 13