FS6217-01

FS6217-01 AMERICAN MICROSYSTEMS, INC. Dual PLL Clock Generator IC Advance Information April 2000 1.0 • • Features 2.0 Description 27MHz master clock input Generated audio system clocks SCKO1 : 33.8688MHz (fixed) SCKO2 : 256 x Fs SCKO3 : 384 x Fs SCKO4 : 768 x Fs Zero ppm synthesis error on all output clocks Low cycle-to-cycle and cumulative clock jitter Multiple sampling frequencies: Fs = 32, 44.1, 48, 64, 88.2, and 96KHz (@ 256x, 384x, and 768x Fs) Fs = 128, 176.4, and 192KHz (@ 256x and 384x Fs) Backward-compatible with PLL1700 3.3V logic interface Dual power supplies: +5v and +3.3v (contact factory for +3.3 volt only version) Small package: 20 pin SSOP (5.3mm) Custom frequency patterns and packages are available. Contact your local AMI Sales Representative for more information. • • • The FS6217-01 is a CMOS clock generator IC designed to minimize cost and component count in digital video/ audio systems. The FS6217-01 can generate four system clocks from a single 27MHz reference frequency. This device eliminates external components and provides the low phase jitter performance needed for highperformance digital-to-analog converters (DAC) and analog-to-digital converters (ADC). The FS6217-01 is ideal for MPEG-2 applications which use a 27MHz master clock such as: DVD players, DVD add-on cards for multimedia PCs, digital HDTV systems, and set-top boxes. • • • • • Figure 1: Pin Configuration ML/SR0 MODE VDD GND XT2 XT1 GNDP VDDP SR1 MCKOP 1 2 3 4 5 6 7 8 9 10 20 19 18 17 16 MC/FS1 MD/FS0 RST SCKO3 VDDB GNDB SCKO2 SCKO4 SCKO1 MCKON FS6217-01 15 14 13 12 11 20-pin SSOP (5.3mm) Figure 2: Block Diagram XT1 XT2 6 10 11 12 MCKOP MCKON SCKO1 SCKO2 SCKO3 SCKO4 5 SR1 ML/SR0 MC/FS1 MD/FS0 MODE RST 9 1 20 19 2 18 Shift Register PLL1 Look-Up Table PLL2 Dividers & Switching 14 17 13 Reset Logic FS6217-01 This document contains information on a product under development. American Microsystems, Inc. reserves the right to change or discontinue this product without notice. ISO9001 4.18.00