FS6322-08
AMERICAN MICROSYSTEMS, INC.
Three-PLL Clock Generator IC
Advance Information
February 2001
1.0
• • • • • •
Features
2.0
Description
Three PLLs with deep reference, feedback, and post dividers to provide precision clock frequencies Multiple outputs provide several clocking options Outputs may be tristated for board testing S0, S1, and S2 inputs modify output frequencies for design flexibility 3.3V operation Custom frequency patterns, pinouts, and packages are available. Contact your local AMI Sales Representative for more information.
The FS6322 is a ROM-based CMOS clock generator IC designed to minimize cost and component count in a variety of electronic systems. Three low-jitter phase-locked loops (PLLs) drive up to five low-skew clock outputs to provide a high degree of flexibility. The device is packaged in a 16-pin SOIC to minimize board space. High-resolution divider capability permits generation of desired frequencies.
Figure 1: Pin Configuration
CLK_C VDD VSS XOUT/REFIN XIN CLK_E CLK_D CLK_F
1 2 3 16 15 14
OE S2 VDD S1 S0 VSS CLK_A CLK_B
FS6322
4 5 6 7 8
13 12 11 10 9
16-pin (0.150”) SOIC
Figure 2: Block Diagram
OE XIN XOUT Crystal Oscillator PLL A Clock Logic CLK_A CLK_B CLK_C CLK_D CLK_E CLK_F
PLL B
PLL C S2:S0 Device Control
FS6322-08
This document contains information on a product under development. American Microsystems, Inc. reserves the right to change or discontinue this product without notice.
ISO9001
2.2.01
FS6322-08
Three-PLL Clock Generator IC
Advance Advance Information Table 1: Pin Descriptions
Key: AI = Analog Input; AO = Analog Output; DI = Digital Input; DIU = Input with Internal Pull-Up; DID = Input with Internal Pull-Down; DIO = Digital Input/Output; DI-3 = Three-Level Digital Input, DO = Digital Output; P = Power/Ground; # = Active Low pin
February 2001
PIN
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16
TYPE
DO P P AI AO DO DO DO DO DO P DI DI
U U
NAME
CLK_C VDD VSS XOUT / REFIN XIN CLK_E CLK_D CLK_F CLK_B CLK_A VSS S0 S1 VDD S2 OE C clock output
DESCRIPTION
Power supply (3.3V nominal – see version specific information) Ground Crystal oscillator drive / external reference input Crystal oscillator feedback E clock output D clock output F clock output A clock output B clock output Ground Frequency select control input Frequency select control input Power supply (5V to 3.3V) Frequency select control input Output enable input: logic-high enables outputs; logic-low tristates outputs (high impedance)
P DIU DIU
Table 2: Frequency Table – FS6322-08 (3.3volt)
S2 S1 S0 FREF CLK_A (pin 10) CLK_B (pin 9) CLK_C (pin 1) CLK_D (pin 7) CLK_E (pin 6) CLK_F (pin 8)
0 0 0 0 1 1 1 1
0 0 1 1 0 0 1 1
0 1 0 1 0 1 0 1
23.3560 13.5000 12.5000 25.0000 24.54545 13.5000 14.31818 14.7456
48.00956 27.00000 0.00000 0.00000 36.00000 27.00000 48.00802 48.00512
0.00000 108.00000 125.00000 125.00000 0.00000 108.00000 0.00000 0.00000
32.69840 33.33333 25.00000 25.00000 24.54545 33.33333 14.31818 14.74560
0.00000 11.28960 0.00000 0.00000 0.00000 12.28800 66.66422 66.66894
0.00000 0.00000 0.00000 0.00000 0.00000 0.00000 0.00000 0.00000
0.00000 0.00000 0.00000 0.00000 0.00000 0.00000 33.33211 33.33447
2
2.2.01
AMERICAN MICROSYSTEMS, INC.
FS6322-08
Three-PLL Clock Generator IC
Advance Information
February 2001
3.0
Electrical Specifications
Table 3: Absolute Maximum Ratings
Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. These conditions represent a stress rating only, and functional operation of the device at these or any other conditions above the operational limits noted in this specification is not implied. Exposure to maximum rating conditions for extended conditions may affect device performance, functionality, and reliability.
PARAMETER Supply Voltage, dc (VSS = ground) Input Voltage, dc Output Voltage, dc Input Clamp Current, dc (VI < 0 or VI > VDD) Output Clamp Current, dc (VI < 0 or VI > VDD) Storage Temperature Range (non-condensing) Ambient Temperature Range, Under Bias Junction Temperature Lead Temperature (soldering, 10s) Input Static Discharge Voltage Protection (MIL-STD 883E, Method 3015.7)
SYMBOL VDD VI VO IIK IOK TS TA TJ
MIN. VSS-0.5 VSS-0.5 VSS-0.5 -50 -50 -65 -55
MAX. 7 VDD+0.5 VDD+0.5 50 50 150 125 150 260 2
UNITS V V V mA mA °C °C °C °C kV
CAUTION: ELECTROSTATIC SENSITIVE DEVICE
Permanent damage resulting in a loss of functionality or performance may occur if this device is subjected to a high-energy electrostatic discharge.
Table 4: Operating Conditions
PARAMETER Supply Voltage Ambient Operating Temperature Range Crystal Resonator Frequency Output Load Capacitance SYMBOL VDD TA fXIN CL CONDITIONS/DESCRIPTION 3.3V ± 10% MIN. 3 0 5 TYP. 3.3 MAX. 3.6 70 30 20 UNITS V °C MHz pF
3
2.2.01
FS6322-08
Three-PLL Clock Generator IC
Advance Advance Information Table 5: DC Electrical Specifications
Unless otherwise stated, VDD = 3.3V ± 10%, no load on any output, and ambient temperature range TA = 0°C to 70°C. Parameters denoted with an asterisk ( * ) represent nominal characterization data and are not production tested to any specific limits. Where given, MIN and MAX characterization data are ± 3σ from typical. Negative currents indicate current flows out of the device.
February 2001
PARAMETER Overall Supply Current, Dynamic, with Loaded Outputs Digital Inputs (OE, S2, S0) High-Level Input Voltage Low-Level Input Voltage High-Level Input Current Low-Level Input Current (pull-up) Digital Inputs (S1) High-Level Input Voltage Low-Level Input Voltage High-Level Input Current Low-Level Input Current (pull-up) Crystal Oscillator Crystal Loading Capacitance Crystal Drive Level Clock Outputs (CLKA-CLKF) Output Current High Output Current Low Short Circuit Source Current * Short Circuit Sink Current * Output Impedance *
SYMBOL
CONDITIONS/DESCRIPTION
MIN.
TYP.
MAX.
UNITS
IDD
20
mA
VIH VIL IIH IIL VIN = VDD VIN = 0V
2.4 VSS-0.3 -1 -8
VDD+0.3 0.8 1
V V µA µA
VIH VIL IIH IIL VIN = VDD VIN = 0V
2.4 VSS-0.3 -1 -16
VDD+0.3 0.8 1
V V µA µA
CL(xtal)
As seen by a crystal connected to XIN and XOUT RXTAL=20Ω
16 200
pF uW
IOH IOL IOSH IOSL zOH zOL
VO = 2.4V VO = 0.4V VO = 0V; shorted for 30s, max. VO = 3.3V; shorted for 30s, max. VO = 0.5VDD; output driving high VO = 0.5VDD; output driving low
mA mA mA mA Ω
4
2.2.01
AMERICAN MICROSYSTEMS, INC.
FS6322-08
Three-PLL Clock Generator IC
Advance Information
February 2001
Table 6: AC Timing Specifications
Unless otherwise stated, VDD = 3.3V ± 10%, no load on any output, and ambient temperature range TA = 0°C to 70°C. Parameters denoted with an asterisk ( * ) represent nominal characterization data and are not production tested to any specific limits. Where given, MIN and MAX characterization data are ± 3σ from typical.
PARAMETER Clock Output (CLK_X) Duty Cycle * Duty Cycle * Rise Time * Fall Time * Jitter, Period (RMS) * Jitter, Period (peak-peak) *
SYMBOL
CONDITIONS/DESCRIPTION
CLOCK (MHz)
MIN.
TYP.
MAX.
UNITS
Crystal oscillator derived outputs Measured @1.4V; CL = 20pF PLL derived outputs Measured @1.4V; CL = 20pF tr tf tj(1σ) tj(∆P) tj(LT) VO = 0.4V to 2.4V; CL = 20pF VO = 2.4V to 0.4V; CL = 20pF From rising edge to next rising edge at VDD/2, CL = 20pF From rising edge to next rising edge at VDD/2, CL = 20pF PLL-derived outputs From 0-500µs at VDD/2, CL = 20pF compared to ideal clock source PLL derived outputs @ 100KHz offset from fundamental
43 45
51 51
57 55
% % ns ns ps ps
Jitter, Cumulative (RMS)*
ps
Phase Noise *
dbC/Hz
5
2.2.01
FS6322-08
Three-PLL Clock Generator IC
Advance Advance Information
February 2001
4.0
Package Information
Table 7: 16-pin SOIC (0.150") Package Dimensions
DIMENSIONS INCHES MIN. A A1 A2 B C D E e H h L Θ 0.061 0.004 0.055 0.013 0.0075 0.386 0.150 0.230 0.010 0.016 0° MAX. 0.068 0.0098 0.061 0.019 0.0098 0.393 0.157 0.244 0.016 0.035 8° MILLIMETERS MIN. 1.55 0.102 1.40 0.33 0.191 9.80 3.81 5.84 0.25 0.41 0° MAX. 1.73
R
16
E
H
0.249 1.55 0.49 0.249 9.98 3.99 6.20 0.41 0.89 8°
1
AMERICAN MICROSYSTEMS, INC.
ALL RADII: 0.005" TO 0.01"
h x 45°
7° typ.
B
e A2 D A1
SEATING PLANE
0.050 BSC
1.27 BSC
A
C L θ
BASE PLANE
Table 8: 16-pin SOIC (0.150") Package Characteristics
PARAMETER Thermal Impedance, Junction to Free-Air 16-pin 0.150” SOIC Lead Inductance, Self Lead Inductance, Mutual Lead Capacitance, Bulk SYMBOL ΘJA L11 L12 C11 CONDITIONS/DESCRIPTION Air flow = 0 m/s Corner lead Center lead Any lead to any adjacent lead Any lead to VSS TYP. 95 4.0 3.0 0.4 0.5 UNITS °C/W nH nH pF
6
2.2.01
AMERICAN MICROSYSTEMS, INC.
FS6322-08
Three-PLL Clock Generator IC
Advance Information
February 2001
5.0
Ordering Information
DEVICE NUMBER PACKAGE TYPE 16-pin (0.150”) SOIC (Small Outline Package) OPERATING TEMPERATURE RANGE 0°C to 70°C (Commercial) SHIPPING CONFIGURATION Tape and Reel
ORDERING CODE
11825-822
FS6322-08
Copyright © 2001 American Microsystems, Inc.
Devices sold by AMI are covered by the warranty and patent indemnification provisions appearing in its Terms of Sale only. AMI makes no warranty, express, statutory implied or by description, regarding the information set forth herein or regarding the freedom of the described devices from patent infringement. AMI makes no warranty of merchantability or fitness for any purposes. AMI reserves the right to discontinue production and change specifications and prices at any time and without notice. AMI’s products are intended for use in commercial applications. Applications requiring extended temperature range, unusual environmental requirements, or high reliability applications, such as military, medical life-support or life-sustaining equipment, are specifically not recommended without additional processing by AMI for such applications.
American Microsystems, Inc., 2300 Buckskin Rd., Pocatello, ID 83201, (208) 233-4690, FAX (208) 234-6796, WWW Address: http://www.amis.com E-mail: tgp@amis.com 7
2.2.01
