MAX1037EKA

MAX1037EKA Rev. A RELIABILITY REPORT FOR MAX1037EKA PLASTIC ENCAPSULATED DEVICES November 19, 2002 MAXIM INTEGRATED PRODUCTS 120 SAN GABRIEL DR. SUNNYVALE, CA 94086 Written by Reviewed by Jim Pedicord Quality Assurance Reliability Lab Manager Bryan J. Preeshl Quality Assurance Executive Director Conclusion The MAX1037 successfully meets the quality and reliability standards required of all Maxim products. In addition, Maxim’s continuous reliability monitoring program ensures that all outgoing product will continue to meet Maxim’s quality and reliability standards. Table of Contents I. ........Device Description II. ........Manufacturing Information III. .......Packaging Information IV. .......Die Information V. ........Quality Assurance Information VI. .......Reliability Evaluation ......Attachments I. Device Description A. General The MAX1037 low-power, 8-bit, multichannel, analog-to-digital converter (ADCs) features internal track/hold (T/H), voltage reference, clock, and an I2C-compatible 2-wire serial interface. This device operates from a single supply and requires only 350µA at the maximum sampling rate of 188ksps. Auto-Shutdown™ powers down the device between conversions reducing supply current to less than 1µA at low throughput rates. The MAX1037 has four analog input channels. The analog inputs are software configurable for unipolar or bipolar and single-ended or pseudo-differential operation. The full-scale analog input range is determined by the internal reference or by an externally applied reference voltage ranging from 1V to VDD. The MAX1037 features a 2.048V internal. The MAX1037 is available in a 8-pin SOT23 package. B. Absolute Maximum Ratings Item VDD to GND AIN0–AIN11, REF to GND SDA, SCL to GND Maximum Current Into Any Pin Operating Temperature Range Junction Temperature Storage Temperature Range Lead Temperature (soldering, 10s) Continuous Power Dissipation (TA = +70°C) 8-Pin SOT23 Derates above +70°C 8-Pin SOT23 Rating -0.3V to +6V -0.3V to the lower of (VDD + 0.3V) and +6V -0.3V to +6V ±50mA -40°C to +85°C +150°C -60°C to +150°C +300°C 567mW 7.1mW/°C II. Manufacturing Information A. Description/Function: B. Process: C. Number of Device Transistors: D. Fabrication Location: E. Assembly Location: F. Date of Initial Production: 2.7V to 5.5V, Low-Power, 12-Channel 2-Wire Serial 8-Bit ADC S6 BiCMOS process 6283 California, USA Malaysia April, 2002 III. Packaging Information A. Package Type: B. Lead Frame: C. Lead Finish: D. Die Attach: E. Bondwire: F. Mold Material: G. Assembly Diagram: H. Flammability Rating: I. 8-Lead SOT Copper Solder Plate Non-Conductive Epoxy Gold (1 mil dia.) Epoxy with silica filler Buildsheet # 05-2101-0053 Class UL94-V0 Classification of Moisture Sensitivity per JEDEC standard JESD22-A112: Level 1 IV. Die Information A. Dimensions: B. Passivation: C. Interconnect: D. Backside Metallization: E. Minimum Metal Width: F. Minimum Metal Spacing: G. Bondpad Dimensions: H. Isolation Dielectric: I. Die Separation Method: 66 x 45 mils Si3N4/SiO2 (Silicon nitride/ Silicon dioxide) TiW/ AlCu/ TiWN None .6 microns (as drawn) .6 microns (as drawn) 5 mil. Sq. SiO2 Wafer Saw V. Quality Assurance Information A. Quality Assurance Contacts: Jim Pedicord (Reliability Lab Manager) Bryan Preeshl (Executive Director of QA) Kenneth Huening (Vice President) 0.1% for all electrical parameters guaranteed by the Datasheet. 0.1% For all Visual Defects. B. Outgoing Inspection Level: C. Observed Outgoing Defect Rate: < 50 ppm D. Sampling Plan: Mil-Std-105D VI. Reliability Evaluation A. Accelerated Life Test The results of the 135°C biased (static) life test are shown in T able 1. Using these results, the Failure Rate (λ) is calculated as follows: λ= 1 = MTTF 1.83 (Chi square value for MTTF upper limit) 192 x 4389 x 160 x 2 Temperature Acceleration factor assuming an activation energy of 0.8eV λ = 6.79 x 10-9 λ = 6.79 F.I.T. (60% confidence level @ 25°C) This low failure rate represents data collected from Maxim’s reliability qualification and monitor programs. Maxim also performs weekly Burn-In on samples from production to assure reliability of its processes. The reliability required for lots which receive a burn-in qualification is 59 F.I.T. at a 60% confidence level, which equates to 3 failures in an 80 piece sample. Maxim performs failure analysis on rejects from lots exceeding this level. The Burn-In Schematic (Spec.# 06-5759) shows the static circuit used for this test. Maxim also performs 1000 hour life test monitors quarterly for each process. This data is published in the Product Reliability Report (RR-1M) located on the Maxim website at http://www.maxim-ic.com . B. Moisture Resistance Tests Maxim evaluates pressure pot stress from every assembly process during qualification of each new design. Pressure Pot testing must pass a 20% LTPD for acceptance. Additionally, industry standard 85°C/85%RH or HAST tests are performed quarterly per device/package family. C. E.S.D. and Latch-Up Testing The AC32-1 die type has been found to have all pins able to withstand a transient pulse of ±2500V, per MilStd-883 Method 3015 (reference attached ESD Test Circuit). Latch-Up testing has shown that this device withstands a current of ±250mA. Table 1 Reliability Evaluation Test Results MAX1037EKA TEST ITEM TEST CONDITION FAILURE IDENTIFICATION SAMPLE SIZE NUMBER OF FAILURES Static Life Test (Note 1) Ta = 135°C Biased Time = 192 hrs. Moisture Testing (Note 2) Pressure Pot Ta = 121°C P = 15 psi. RH= 100% Time = 168hrs. Ta = 85°C RH = 85% Biased Time = 1000hrs. DC Parameters & functionality 160 0 DC Parameters & functionality 77 0 85/85 DC Parameters & functionality 77 0 Mechanical Stress (Note 2) Temperature Cycle -65°C/150°C 1000 Cycles Method 1010 DC Parameters 77 0 Note 1: Life Test Data may represent plastic D.I.P. qualification lots. Note 2: Generic Package/Process data Attachment #1 TABLE II. Pin combination to be tested. 1/ 2/ Terminal A (Each pin individually connected to terminal A with the other floating) 1. 2. All pins except V 3/ PS1 All input and output pins Terminal B (The common combination of all like-named pins connected to terminal B) All V pins PS1 All other input-output pins 1/ Table II is restated in narrative form in 3.4 below. 2/ No connects are not to be tested. 3/ Repeat pin combination I for each named Power supply and for ground (e.g., where V is VDD, V , V , V , GND, +VS, -V , V , etc). PS1 CC SS BB S REF 3.4 a. b. Pin combinations to be tested. Each pin individually connected to terminal A with respect to the device ground pin(s) connected to terminal B. All pins except the one being tested and the ground pin(s) shall be open. Each pin individually connected to terminal A with respect to each different set of a combination of all named power supply pins (e.g., V , or V or V or V , or V ) connected to terminal B. All pins except the one being SS1 SS2 SS3 CC1 CC2 tested and the power supply pin or set of pins shall be open. Each input and each output individually connected to terminal A with respect to a combination of all the other input and output pins connected to terminal B. All pins except the input or output pin being tested and the combination of all the other input and output pins shall be open. c. TERMINAL C R1 S1 R2 TERMINAL A REGULATED HIGH VOLTAGE SUPPLY S2 C1 DUT SOCKET SHORT CURRENT PROBE (NOTE 6) TERMINAL B R = 1.5kΩ C = 100pf TERMINAL D Mil Std 883D Method 3015.7 Notice 8 ONCE PER SOCKET ONCE PER BOARD +5V 10 K 100 OHMS 1 8 2 7 8-SOT 3 6 4 5 1 uF DEVICES: MAX 1036/7 MAX. EXPECTED CURRENT = 650uA DRAWN BY: HAK TAN NOTES: MAXIM TITLE: BI DOCUMENT I.D. 0 6-5759 REVISION A Circuit (MAX1036/1037) PAGE 2 OF 3