P55N02LD

NIKO-SEM N-Channel Logic Level Enhancement Mode Field Effect Transistor P55N02LD TO-252 (DPAK) D PRODUCT SUMMARY V(BR)DSS 25 RDS(ON) 10mΩ ID 55A 1. GATE 2. DRAIN 3. SOURCE G S ABSOLUTE MAXIMUM RATINGS (TC = 25 °C Unless Otherwise Noted) PARAMETERS/TEST CONDITIONS Gate-Source Voltage Continuous Drain Current Pulsed Drain Current Avalanche Current Avalanche Energy Repetitive Avalanche Energy Power Dissipation 2 1 SYMBOL VGS LIMITS ±20 55 36 140 20 140 5.6 60 38 -55 to 150 275 UNITS V TC = 25 °C TC = 100 °C ID IDM IAR A L = 0.1mH L = 0.05mH TC = 25 °C TC = 100 °C EAS EAR PD Tj, Tstg TL mJ W Operating Junction & Storage Temperature Range Lead Temperature ( /16” from case for 10 sec.) THERMAL RESISTANCE RATINGS THERMAL RESISTANCE Junction-to-Case Junction-to-Ambient Case-to-Heatsink 1 2 1 °C SYMBOL RθJC RθJA RθCS TYPICAL MAXIMUM 2.5 65 UNITS °C / W 0.7 Pulse width limited by maximum junction temperature. Duty cycle ≤ 1％ ELECTRICAL CHARACTERISTICS (TC = 25 °C, Unless Otherwise Noted) PARAMETER SYMBOL TEST CONDITIONS STATIC Drain-Source Breakdown Voltage Gate Threshold Voltage Gate-Body Leakage Zero Gate Voltage Drain Current V(BR)DSS VGS(th) IGSS IDSS VGS = 0V, ID = 250µA VDS = VGS, ID = 250µA VDS = 0V, VGS = ±20V VDS = 20V, VGS = 0V VDS = 20V, VGS = 0V, TJ = 125 °C 25 1 1.5 3 ±250 25 250 nA µA V LIMITS UNIT MIN TYP MAX 1 MAY-24-2001 NIKO-SEM 1 N-Channel Logic Level Enhancement Mode Field Effect Transistor ID(ON) RDS(ON) 1 P55N02LD TO-252 (DPAK) On-State Drain Current Drain-Source On-State 1 Resistance VDS = 10V, VGS = 10V VGS = 7V, ID = 24A VGS = 10V, ID = 30A VDS = 15V, ID = 30A 55 11 10 16 14 13 A mΩ S Forward Transconductance DYNAMIC Input Capacitance Output Capacitance gfs Ciss Coss Crss Qg 2 2700 VGS = 0V, VDS = 15V, f = 1MHz 500 200 25 VDS = 0.5V(BR)DSS, VGS = 10V, ID = 30A 7 11 7 VDS = 15V, RL = 1Ω ID ≅ 30A, VGS = 10V, RGS = 2.5Ω 7 24 6 nS nC pF Reverse Transfer Capacitance Total Gate Charge 2 Gate-Source Charge Gate-Drain Charge 2 2 Qgs Qgd Turn-On Delay Time Rise Time 2 td(on) tr Turn-Off Delay Time Fall Time 2 2 td(off) tf SOURCE-DRAIN DIODE RATINGS AND CHARACTERISTICS (TC = 25 °C) Continuous Current Pulsed Current 3 1 IS ISM VSD trr IRM(REC) Qrr IF = IS, dlF/dt = 100A / µS IF = IS, VGS = 0V 37 200 0.043 55 150 1.3 A V nS A µC Forward Voltage Reverse Recovery Time Peak Reverse Recovery Current Reverse Recovery Charge 1 2 Pulse test : Pulse Width ≤ 300 µsec, Duty Cycle ≤ 2％. Independent of operating temperature. 3 Pulse width limited by maximum junction temperature. REMARK: THE PRODUCT MARKED WITH “P55N02LD”, DATE CODE or LOT # 2 MAY-24-2001 NIKO-SEM N-Channel Logic Level Enhancement Mode Field Effect Transistor P55N02LD TO-252 (DPAK) TO-252 (DPAK) MECHANICAL DATA mm Dimension Min. A B C D E F G 9.35 2.2 0.48 0.89 0.45 0.03 6 Typ. Max. 10.1 2.4 0.6 1.5 0.6 0.23 6.2 H I J K L M N 6.4 5.2 0.6 0.64 4.4 Dimension Min. Typ. 0.8 6.6 5.4 1 0.9 4.6 Max. mm 3 MAY-24-2001