RT9237CS

Preliminary RT9237 Multi-Phase DC/DC Controller for CPU Core Power Supply General Description The RT9237 is a multi-phase buck DC/DC controller integrated with all control functions for high performance processor VRM. The RT9237 drives 2, 3 or 4 buck switching stages operating in interleaved phase set automatically. The multi-phase architecture provides high output current while maintaining low power dissipation on power devices and low stress on input and output capacitors. The high equivalent operating frequency also reduces the component dimension and the output voltage ripple in load transient. RT9237 regulates both easily set voltage and current loops. Precise current sharing for power stage is achieved by differential input current sense and processing circuit. The settings of current sense, droop tuning and over current protection are independent to compensation circuit of voltage loop. The feature greatly facilitates the flexibility of CPU power supply design and tuning. The RT9237 uses a 5-bit DAC of 1.1V to 1.85V (25mV/step) output with load current droop compensation to meet the strict VRM transient requirement. The IC monitors the VCORE voltage for PGOOD and over voltage protection. Soft start, over current protection and programmable under voltage lockout are also provided to assure the safety of microprocessor and power system. Features Multi-Phase Power Conversion with Automatic Phase Selection VRM 9.0 DAC Output with Active Droop Compensation for Fast Load Transient Precise Channel Current Sharing with Differential Sense Input Hiccup Mode Over Current Protection Programmable Under Voltage Lockout and Soft Start High Ripple Frequency, (Channel Frequency 200KHz) Times Channel Number Pin Configurations Part Number RT9237CS (Plastic SOP-28) VID4 VID3 VID2 VID1 VID0 COMP FB ADJ GND 1 2 3 4 5 6 7 8 9 Pin Configurations TOP VIEW VDD PGOOD 26 PWM4 28 27 25 24 23 ISP4 ISP1 PWM1 22 PWM2 21 ISP2 20 ISP3 PWM3 ISN1 17 ISN2 19 18 16 15 VSEN 10 IRMP 11 DVD 12 IMAX 13 SS 14 ISN3 ISN4 Applications Power Supply for Server and Workstation Power Supply for High Current Microprocessor Ordering Information RT9237 Package Type S : SOP-28 Operating temperature range C: Commercial standard DS9237-00 January 2002 www.richtek-ic.com.tw 1 RT9237 Absolute Maximum Ratings Supply Voltage Input, Output or I/O Voltage Ambient Temperature Range Operating Junction Temperature Range Storage Temperature Range Power Dissipation, PD @ TA = 25°C SOP-28 Package Thermal Resistance SOP-28, θJA Lead Temperature (Soldering, 10 sec.) Preliminary 7V GND-0.3V ~ VDD+0.3V 0°C ~ 70°C 0°C ~ 125°C -65°C ~ 150°C 0.625W 60°C /W 260°C Electrical Characteristics (VDD = 5V, GND = 0V, TA = 25°C, unless otherwise specified) Parameter VDD Supply Current Nominal Supply Current Power-On Reset VDD Rising Threshold VDD Falling Threshold VDVD Rising Trip Threshold Oscillator Frequency Ramp Amplitude Ramp Valley Maximum On Time of Each Channel IRMP Pin Voltage Reference and DAC DACOUT Voltage Accuracy DAC (VID0-VID4) Input Low Voltage DAC (VID0-VID4) Input High Voltage DAC (VID0-VID4) Bias Current PWM Controller Error Amplifier DC Gain Bandwidth Slew Rate Current Sense GM Amplifier ISP 1,2,3,4 Full Scale Source Current ISP 1,2,3,4 Current for OCP -80 50 ---µA µA CL = 10pF ---85 10 5 ---dB MHz V/µS -1.0 -2.0 10 ---20 +1.0 0.8 -40 % V V µA RIRMP = 56kΩ ∆VOSC For each phase RIRMP = 56kΩ 170 -1.0 -0.95 200 1 1.3 75 1 230 ---1.05 kHz V V % V 4.2 3.7 1.19 4.35 3.85 1.25 4.5 4 1.31 V V V IDD PWM 1,2,3,4 Open -6 -mA Symbol Test Conditions Min Typ Max Units To be continued www.richtek-ic.com.tw DS9237-00 January 2002 2 Preliminary Parameter Protection IMAX Voltage SS Current Over-Voltage Trip (VSEN/DACOUT) Power Good Upper Threshold (VSEN/DACOUT) Lower Threshold (VSEN/DACOUT) VSEN Rising VSEN Rising --108 92 RIMAX = 15k VSS = 1V 0.55 -116 0.6 10 120 Symbol Test Conditions Min Typ RT9237 Max 0.65 -124 --Units V µA % % % Function Block Diagram DVD IMAX IRMP VDD PGOOD VID0 VID1 VID2 VID3 VID4 Power On Reset Oscillator 120% VDAC DAC 108% VDAC 92% VDAC INH +_ +_ INH OVP, PGOOD POR Logic Current Limit PWM Logic & Driver PWM Logic & Driver PWM Logic & Driver PWM Logic & Driver _+ PWM1 PWMCP INH PWMCP INH PWMCP INH + _ +_ PWM2 +_ +_ Current Balance PWM3 VSEN ADJ Droop Control EA Processor PWM4 +_ PWMCP ISP1 ISN1 ISP2 ISN2 ISP3 ISN3 ISP4 ISN4 +_ FB CS1 CS2 GND CS3 CS4 COMP SS DS9237-00 January 2002 _+ _+ SS Control _+ www.richtek-ic.com.tw 3 RT9237 Preliminary Table 1 Output Voltage Program Pin Name Nominal Output Voltage DACOUT Off 1.100V 1.125V 1.150V 1.175V 1.200V 1.225V 1.250V 1.275V 1.300V 1.325V 1.350V 1.375V 1.400V 1.425V 1.450V 1.475V 1.500V 1.525V 1.550V 1.575V 1.600V 1.625V 1.650V 1.675V 1.700V 1.725V 1.750V 1.775V 1.800V 1.825V 1.850V VID4 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 VID3 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 VID2 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 VID1 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 VID0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 Note: (1) 0:Connected to GND (2) 1:Open www.richtek-ic.com.tw DS9237-00 January 2002 4 DS9237-00 January 2002 +5V 2µH C7 1µF 28 27 PGOOD PHASE 8 5V 3 PWM GND 4 LGATE R1 2.4K 26 25 5 Q2 PHB95NO3LT 24 23 22 21 R10 2.4K Typical 12V 5V R2 2.4K 6 7 VCC PVCC C13 1µF 3 20 19 18 17 R13 16 2.4K 15 C8 1µF C9 100µF C4 1µF Typical 12V R3 10K 6 VCC 7 PVCC C3 1µF Q1 PHB83NO3LT L2 2µH 0.01µF C5 1000µF C6 1000µF VCORE 2 BOOT 1 UGATE C1 1µF C2 100µF 12V L1 1 VID4 VID3 VID2 PWM4 PGOOD VDD 2 3 4 VID1 ISP4 ISP1 PWM1 PWM2 ISP2 ISP3 PWM3 ISN1 ISN2 ISN3 ISN4 VID0 COMP FB ADJ GND VSEN IRMP DVD IMAX SS 5 6 7 8 9 10 11 12 13 14 Typical Application Circuit VID4 VID3 VID2 R5 C10 6.6nF R 6 VID1 RT9600 2.4K R7 24K VID0 C12 Preliminary C14 R8 33pF R9 1K R12 12V 2 BOOT 1 UGATE PHASE 8 C11 1µF Q3 PHB83NO3LT L3 2µH R15 39K 13K R14 2.4K R11 12K RT9600 PWM GND 4 LGATE C17 0.1µF RT9237 5 Q4 PHB95NO3LT 0.01µF C15 1000µF C16 1000µF RT9237 www.richtek-ic.com.tw 5 RT9237 Functional Pin Description VID4, VID3, VID2, VID1 and VID0 ( Pin1,2,3,4,5) Preliminary ISEN1 (Pin 18), ISEN2 (Pin 17), ISEN3 (Pin 16) and ISEN4 (Pin 15) Current sense inputs from the individual converter channel’s sense component GND nodes. ISP1 (Pin 24), ISEN2 (Pin 21), ISEN3 (Pin 20) and ISEN4 (Pin 25) Current sense inputs for individual converter channels. Tie this pin to the component sense node. DAC voltage identification inputs for VRM9.0. These pins are TTL-compatible and internally pulled to VDD if left open. COMP (Pin 6) Output of the error amplifier and input of the PWM comparator. FB (Pin 7) Inverting input of the internal error amplifier. ADJ (Pin 8) Current sense output for active droop adjust. Connect a resistor from this pin to GND to set the amount of load droop. GND (Pin 9) Ground for the IC. VSEN (Pin 10) Power good and over voltage monitor input. Connect to the microprocessor-CORE voltage. IRMP (Pin 11) PWM ramp amplitude set by external resistor. Ramp amplitude = 1V × (R [IRMP] / 56KΩ) DVD (Pin 12) Programmable power UVLO detection input. Trip threshold = 1.25V at V(DVD) rising IMAX (Pin 13) Over current protection amplitude set. SS (Pin 14) Connect this SS pin to GND with a capacitor to set the start time interval. Pull this pin below 1V(ramp valley of saw-tooth wave in pulse width modulator) to shutdown the converter output. PWM1 (Pin 23), PWM2 (Pin 22), PWM3 (Pin 19) and PWM4 (Pin 26) PWM outputs for each driven channel. Connect these pins to the PWM input of the MOSFET driver. For systems which use 3 channels, connect PWM4 high. Two channel systems connect PWM3 and PWM4 high. PGOOD (Pin 27) Power good open-drain output. VDD (Pin 28) IC power supply. Connect this pin to a 5V supply. www.richtek-ic.com.tw DS9237-00 January 2002 6 Preliminary RT9237 Simplified Block Diagram Control Loops for a Two Phase Converter VDAC ADJ Droop Control EA Current Balance FB GND SS Control COMP SS Processor + _ PWM Logic & Driver PWM Logic & Driver ISP1 ISN1 ISP2 ISN2 PWM1 CS1 CS2 VIN RT9600 R LOAD C OUT VIN RT9600 Voltage loop Current loop DS9237-00 January 2002 _+ _+ + _ PWMCP PWM2 +_ PWMCP www.richtek-ic.com.tw 7 RT9237 Operation Preliminary RT9237 is a multi-phase DC/DC controller that precisely regulates CPU core voltage and balances the current of different power channels. The converter consists of RT9237 and its companion MOSFET driver provide high quality CPU power and all protection function to meet the requirement of modern VRM. Voltage control The reference of VCORE is provided by a 5-bit DAC of VRM9.0 specification. Control loop consists of error amplifier, multi-phase pulse width modulator, driver and power components. Like conventional voltage mode PWM controller, the output voltage is locked at the VREF of error amplifier and the error signal is used as the control signal VC of pulse width modulator. The PWM signals of different channels are generated by comparison of EA output and spiltphase saw-tooth wave. Power stage transforms VIN to output by PWM signal on-time ratio. Current balance RT9237 senses the current of low side MOSFET in each synchronous rectifier when it is conducting for channel current balance and droop tuning. The differential sensing GM amplifier converts the voltage on the sense component (can be a sense resistor or the RDS(ON) of the low side MOSFET) to current signal into internal balance circuit. The current balance circuit sums and averages the current signals then produces the balancing signals injected to pulse width modulator. If the current of some power channel is greater than average, the balancing signal reduces the output pulse width to keep the balance. Load Droop The sensed power channel current signals regulate the reference of DAC to form a output voltage droop proportional to the load current. The droop or so call “active voltage positioning” can reduce the output voltage ripple at load transient and the LC filter size. Fault detection The chip detects VCORE for over voltage and power good detection. The “hiccup mode” operation of over current protection is adopted to reduce the short circuit current. The in-rush current at the start up is suppressed by the soft start circuit through clamping the pulse width and output voltage. Application Circuit setting Phase setting and converter start up RT9237 interface with companion MOSFET driver (like RT9600 or HIP660X series) for correct converter initialization. The tri-phase PWM output (high, low, high impedance) pins sense the interface voltage at IC POR acts (both VDD and DVD trip). The channel is enabled if the pin voltage is 1.2V less than VDD. Please tie the PWM output to VDD and the current sense pins to GND or left float if the channel is unused. For 2-channel application, connect PWM3 and PWM4 high. 3-channel application connect PWM4 high. Current sensing setting RT9237 senses the current of low side MOSFET in each synchronous rectifier when it is conducting for channel current balance and droop tuning. The differential sensing GM amplifier converts the voltage on the sense component (can be a sense resistor or the RDS(ON) of the low side MOSFET) to current signal into internal circuit (see Fig.1). IX _ Sample & Hold To Current Balance To Droop Tune 2/3 IX 2/3 IX To Over Current Detection 2/3 IX GM + IBP IBN ISPX RSP ISN X RSN RS IL Fig.1 Current Sense Circuit www.richtek-ic.com.tw DS9237-00 January 2002 8 Preliminary The sensing circuit gets IX = IL × RS by local feedback. RSP RT9237 Protection and SS function For OVP, the RT9237 detects the VCORE by VSEN pin. Eliminate the parasitic delay and noise influence on the PCB path for fast and accurate detection. The trip point of OVP is 120% of normal output level. The PWM outputs are pulled low to turn on the low side MOSFET and turn off the high side MOSFET of the synchronous rectifier at OVP. The OVP latch can only be reset by VDD or DVD restart power on reset sequence. The PGOOD detection trip point of VCORE is ±8% out of the normal level. The PGOOD open drain output pulls low when VOCRE exceeds the range. Soft start circuit generates a ramp voltage by charging external capacitor with 10uA current after IC POR acts. The PWM pulse width and VCORE are RSP = RSN to cancel the voltage drop caused by GM amplifier input bias current. IX is sampled and held just before low side MOSFET turns off (See Fig.2). Therefore, I X ( S / H) = TOFF VO TOFF IL(S / H) × RS , IL(S / H) = IL( AVG) − , × L 2 RSP  VIN − VO  =  × 5µS , for operating frequency = 200kHz  VIN     VIN − VO  VO −   × 5µS   VIN    × RS = IL( AVG) −   RSP 2L     IX (S / H) Falling Slope = VO /L IL IL (AVG) IL (S/H) clamped by the rising ramp to reduce the in-rush current and protect the power devices. Over current protection trip point is set by the resistor Inductor Current PWM Signal & High Side MOSFET Gate Signal RIMAX connected to IMAX pin. OCP is triggered if one channel S/H current signal IX> forces PWM output latched at high impedance to turn 3 0.6 × . Controller 2 RIMAX Low Side MOSFET Gate Signal off both high and low side MOSFET in the power stage and initial the hiccup mode protection. The SS pin voltage is pulled low with a 10µA current after it is less than 90% VDD. The converter restarts after SS pin voltage < 0.2V. Three times of OCP disable the converter and only release the latch by POR acts (see Fig.4). COUNT = 1 COUNT = 2 4V 2V 0V VCORE OVERLOAD APPLIED IL 0A T0T1 T2 TIME T3T4 COUNT = 3 SS Fig. 2 Inductor Current and PWM Signal Droop Tuning The S/H current signals from power channels are injected to ADJ pin to create droop voltage. V ADJ = R ADJ × 2 ∑ IX 3 The DAC output voltage decreases by VADJ to form the VCORE load droop(see Fig.3). VDAC _ VADJ 2/3 IX1 _ + COMP EA FB + ∑ ∑ IX ADJ R ADJ 2/3 IX2 2/3 IX3 2/3 IX4 VDAC - VADJ Fig. 4 Fig. 3 Droop Tune Circuit DS9237-00 January 2002 www.richtek-ic.com.tw 9 RT9237 Preliminary 3-Phase Converter and Components Function Grouping 12V VCC PVCC BOOT UGATE PHASE RT9600 PWM +5V LGATE GND VDD VID PWM1 ISP1 ISN1 COMP FB VSEN PWM2 ADJ VCC PVCC BOOT UGATE PHASE +VCORE 12V Compensation & Offset RT9600 PWM LGATE GND Droop Setting 12V RT9237 DVD IRMP SS Driver Power UVLO Ramp Setting ISP2 ISN2 12V VCC PVCC BOOT UGATE PHASE PWM3 ISP3 IMAX ISN3 OCP Setting GND PWM RT9600 LGATE GND Current Sense Components Design Procedure Suggestion Voltage Loop setting a. Output filter pole and zero (Inductor, output capacitor value & ESR) b. Error amplifier compensation & saw-tooth wave amplitude(compensation network & IRMP pin resistor) Current loop setting a. GM amplifier S/H current(current sense component Ron, ISPx & ISNx pin external resistor value, keep ISPx current < 50uA at full load condition) b. Over current protection trip point(IMAX pin resistor, keep ISPx current