Preliminary
RT9264
High Frequency, High Efficiency, Step-up DC/DC Converter
General Description
The RT9264 is a compact, high efficient, step-up DC/DC converter with current mode PWM control loop, providing stable and high efficient operations without external compensation. The RT9264 suitable for 1 to 4 battery cells as well as USB power applications providing up to 400mA output current. The high switching rate minimized the size of external components. A 300mA LDO is included in RT9264 to provide a secondary low noise output as well as an output current stop in the shutdown mode. RT9264 is provided in SOP-8 packages.
Features
400mA High Supply Capability 90% Efficiency Switching Rate higher Than 1.4MHz Providing Flexibility for Using Internal and External Power Switches Built-in 300mA LDO, also for the Zero-OutputCurrent Shutdown Mode Boost DC-DC Integrating LDO for Up-Down Regulation 8-Pin SOP Package
Applications
Portable Instrument ADSL Modem USB Devices
Ordering Information
RT9264 Package type S : SOP-8 Operating temperature range C: Commercial standard
Pin Configurations
Part Number RT9264CS (Plastic SOP-8)
GND 1 EXT 2 LFB 3 LDOO 4
Pin Configurations
TOP VIEW
8 7 6 5
CE LX VDD FB
Typical Application Circuit
VIN L1 2.2µH D1 1N5819 C2 1µF + R2 22K
47µF VDD CE R1 36K 3.3V VOUT1
R T9264
EXT LX
2.5V VOUT2 C3 10µF + R4 42K R3 22K
L DO O LFB GND
FB C1 47µF
Fig. 1 RT9264 Typical Application for Portable Instruments
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RT9264
Preliminary
VIN L1 2.2µH D1 1N5819 R2 22K C2 1µF +
47µF VDD
Chip Enable Input 3.3V VOUT + C3 10µF
CE L DO O LFB
R T9264
EXT LX
R1 36K
GND
FB C1 47µF
Fig. 2 Application Circuit with Zero-Output-Current Shutdown Mode Control
3.3V/5V VIN
R5 100Ω + VDD CE C5 22 µF
L1 3.3µH D1 1N5819
C4 47 µF
15V VOUT1 R1 220K
R T9264
EXT LX
2.5V VOUT2 C3 10 µF + R4 42K R3 22K
L DO O LFB GND
Q1 NMOS
FB R2 C2 20K 1µF + C1 47µF
Fig. 3 High Voltage Application
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Preliminary Pin Description
Pin No. Pin Name 1 2 3 4 5 6 7 8 GND EXT LFB LDOO FB VDD LX CE Pin Function Ground Output pin for driving external NMOS or NPN When driving an NPN, a resistor should be added for limiting base current. Feedback pin of the built-in LDO (Internal Vref = 0.86V) Voltage output pin of the built-in LDO Feedback input pin Internal reference voltage for the error amplifier is 1.25V. Input positive power pin of RT9264 Pin for switching Chip enable RT9264 gets into shutdown mode when CE pin set to low.
RT9264
Function Block Diagram
VDD LDOO LFB FB
VDD Q2 PMOS
RT9264
1.25V _ + EXT LX
VDD 1.25V R2
Loop Control Circuit
Q1 NMOS R1
_ +
CE
Q3 NMOS
Over Temp. Detector
Shut Down GND
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RT9264
Absolute Maximum Ratings
Supply Voltage LX Pin Switch Voltage LDO Output Voltage Other I/O Pin Voltages LX Pin Switch Current EXT Pin Driver Current Power Dissipation, PD @ TA = 25°C SOP-8 • Package Thermal Resistance SOP-8, θJA Operating Junction Temperature Storage Temperature Range
Preliminary
-0.3V to 6V -0.3V to (VDD + 0.8V) -0.3V to (VDD + 0.3V) -0.3V to (VDD + 0.3V) 2.5A 30mA 0.625W 160°C/W 150°C -65°C ~ +150°C
Electrical Characteristics
(VIN = 3.3V, VDD set to 5V, Load Current = 0, TA = 25°C, unless otherwise specified) Parameter Operating VDD Range No Load Current I (VIN) Switch-off Current I (VDD) Shutdown Current I (VIN) Feedback Reference Voltage Feedback Reference Voltage for LDO Switching Rate Maximum Duty LX ON Resistance Current Limit Setting EXT ON Resistance to VDD EXT ON Resistance to GND Line Regulation Load Regulation LDO PMOS ON Resistance LDO Drop Out Voltage CE Pin Trip Level Temperature Stability for FB, LFB, LBI Thermal Shutdown Thermal Shutdown Hysterises TS TSD ∆TSD VDROP ∆VLINE ∆VLOAD ILIMIT Symbol VDD INO LOAD IOFF VREF VREF FS DMAX VIN = 3.3V, VOUT = 5V CE Pin = 0V, VIN = 4.5V Close Loop, VDD = 3.3V Close Loop, VDD = 3.3V VDD = 5V VDD = 5V VDD = 5V VDD = 5V VDD = 5V VDD = 5V VIN = 3 ~ 4V, IL = 1mA VIN = 3.3V, IL = 1 ~ 50mA VDD = 5V VDD = 5V, IL = 100mA VDD = 5V Guaranteed by Design Guaranteed by Design Guaranteed by Design ISWITCH OFF VIN = 6V Test Conditions Min 1 ---1.225 0.843 1.4 ---------0.2 ---Typ -3 1 0.1 1.25 0.86 -80 0.25 2 30 20 20 0.5 1 70 0.8 50 165 10 Max 6 --1 1.275 0.877 2.8 -------1.5 -1.4 ---Units V mA mA µA V V MHz % Ω A Ω Ω mV/V mV/mA Ω mV V ppm/°C °C °C
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Preliminary Application Note
Output Voltage Setting Referring to application circuits Fig.1 to Fig.3, the output voltage of the switching regulator (VOUT1) can be set with Eq.1. The LDO output voltage can be set with Eq.2. VOUT1 = (1 + R1 ) × 1.25 V R2 Eq.1 Eq.2 Layout Guide
RT9264
• A full GND plane without gap break. • VOUT1 to GND noise bypass – Short and wide connection for C2 to Pin1 and Pin6. • VIN to GND noise bypass – Add a 100µF capacitor close to L1 inductor, when VIN is not an idea voltage source. • Minimized FB/LFB node copper area and keep far away from noise sources. • Minimized parasitic capacitance connecting to LX and EXT nodes, which may cause additional switching loss. • The following diagram is an example of 2-layer board layout for application circuits Fig.1 and Fig.2.
R4 VOUT 2 = (1 + ) × 0.86 V R3
First Layer
RT9264
Second Layer (Full GND Plane)
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RT9264
Package Information
Preliminary
H A M
JB
F
C D I
Symbol A B C D F H I J M
Dimensions In Millimeters Min 4.801 3.810 1.346 0.330 1.194 0.178 0.102 5.791 0.406 Max 5.004 3.988 1.753 0.508 1.346 0.254 0.254 6.198 1.270
Dimensions In Inches Min 0.189 0.150 0.053 0.013 0.047 0.007 0.004 0.228 0.016 Max 0.197 0.157 0.069 0.020 0.053 0.010 0.010 0.244 0.050
8–Lead SOP Plastic Package
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Preliminary
RT9264
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RT9264
Preliminary
RICHTEK TECHNOLOGY CORP.
Headquarter
6F, No. 35, Hsintai Road, Chupei City Hsinchu, Taiwan, R.O.C. Tel: (8863)5510047 Fax: (8863)5537749
RICHTEK TECHNOLOGY CORP.
Taipei Office (Marketing)
8F-1, No. 137, Lane 235, Paochiao Road, Hsintien City Taipei County, Taiwan, R.O.C. Tel: (8862)89191466 Fax: (8862)89191465 Email: marketing@richtek-ic.com.tw
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