TL811

TL811 STB/PVR Controller IC Multiple-transport, multiple-descrambler Controller IC for Consumer Electronic OEMs to manufacture Digital TV sets, Digital Set Top Boxes and Personal Video Recorders integrated GLOBAL AND SCAL ABLE ARCHITECTURE The STB/PVR Controller IC from TeraLogic is a key element of its global and scalable architecture for Digital TV. It interfaces seamlessly to TeraLogicÕs Digital TV Decoder ICs to create a versatile solution to design consumer electronics products such as Digital Set-Top Boxes, Digital TV sets and Personal Video Recorders (PVR) for cable, satellite or terrestrial broadcast. These functions are integrated in a single IC Ñ multiple transport demux, descramblers, conditional access, PCI bridge, CPU local bus, I2C, SmartCard interfaces, IDE interface, UART and GPIOs. This system-on-a-chip approach provides a very cost-effective solution by eliminating either the need to use discrete solutions or costly ASIC development. This IC address ES worldwide Digital TV requirements by incorporating four transport streams I/Os and multiple demultiplexers that are compatible with ATSC, ARIB, DVB, and DIRECTV¨. The universal appeal of this device is enhanced by the inclusion of DVB, DIRECTV DES-ECB, MPEG DES, Triple DES-CBC and Multi-2 descrambling schemes. The Controller IC can be used to design next generation PVR devices with advanced features or to upgrade an existing Set-Top Box to include PVR functions. The multiple transport inputs enable consumer-pleasing capabilities such as the ability to simultaneously watch and record or to have digital picture-in-picture on any television set. circuits CPU CPU Interface (SysAD Bus) Local Bus SDRAM (Unified for CPU) Memory Controller ATSC/DVB/DIRECTV®/ARIB Local Bus Controller T/S in 1 T/S in 2 Demux 2 Transport Out Transport In Transport In Demux 1 T/S Out Descrambler 1 Transport In & Out T/S in 3 Descrambler 2 DTV I/O I2C SmartCard GPIO UART I2C SmartCards GPIO UART PVR I/O IDE PCI BUS IDE T L 8 1 X B LO C K D I AG R A M PCI Bus TL811 STB/PVR Controller IC APPLICATIONS ¥ Set-Top Boxes ¥ Digital TV ¥ Personal Video Recorders SUPPORTING TERALOGIC PRODUCTS ¥ TL85x Decoder ICs ¥ Cougar Development Platform PROGRAMMABLE TRANSPORT INPUT/DEMULTIPLEXER ¥ Two dedicated and one bi-directional transport input ports ¥ One dedicated and one bi-directional transport output ports ¥ Glueless interface to IEEE 1394 devices ¥ Two ATSC/DVB/ARIB/DIRECTV compliant demux ¥ Glueless interface to most front-end ICs ¥ Maximum input bit rate of 80 Mbits/sec supported on each port ¥ Ability to transfer multiple SD streams to the TeraLogic DTV Decoder for SD PIP applications DESCRAMBLERS ¥ DVB, DIRECTV DES-ECB, MPEG DES, Triple DES-CBC, Multi-2 descrambling supported ¥ Simultaneous descrambling of two streams supported ¥ All three transport input ports can access the descramblers ¥ Bypass mode of transport streams supported CPU INTERFACE ¥ Glueless interface to MIPS CPUs such as QED RM5231, NEC VR5432 ¥ 32-bit wide multiplexed address/data supported ¥ Write and Read posting buffers between CPU and external resources (PCI, memory bus and local bus). LOCAL BUS ¥ Generic bus interface (16-bit data and 24-bit address bus) ¥ 6 Pre-decoded, programmable chip selects ¥ Can be configured to be fixed 8-bit only, or 8- and 16-bit width device support IDE ULTRA DMA INTERFACE ¥ Supports one IDE connector for up to 2 IDE drives ¥ Ultra DMA specifications allows 66 MByte transfer rate SDRAM INTERFACE ¥ 32-bit wide SDRAM interface ¥ Supports 16/64/128-Mbit SDRAM devices PCI BUS INTERFACE ¥ 32-bit PCI 2.1 compliant interface ¥ 50 MHz or 33 MHz bus clock ¥ PCI Master/Slave/Arbiter capability supported ¥ Supports burst transfers for efficient data movement PERIPHERALS ¥ Two ISO-7816 smart card interfaces ¥ Four Asynchronous UART 2 ¥ Two I C compatible master and slave ports ¥ Three 32-bit timers/counters ¥ NRSS-A/NRSS-B support ¥ User-configurable general purpose I/Os TECHNOLOGY ¥ See grid below for packaging ¥ 2.5 V core, 3.3 V 1/0, 0.25µ CMOS ¥ 352 Ball BGA circuits CPU EPROM Other I/O required SDRAM Memory Controller CPU Interface (SysAD Bus) FLASH Local Bus Local Bus Controller TL811 TL85x T/S Out HD Video Analog HD Out Audio 5.1 out Transport In DTV Tuner DTV Tuner POD T/S in 1 T/S in 2 Demux 1 Transport In Transport Out Demux 2 TeraLogic DTV Decoder Descrambler 1 Transport In & Out 1394/DVCR T/S in 3 Descrambler 2 DTV I/O I2C 2 SmartCards GPIO UART I2C SmartCards GPIO UART SD Video Out PVR I/O IDE ntegrated PCI BUS SD Video Capture IDE PCI Bus Other Devices if required T L 8 1 1 S Y STE M D I AG R A M TeraLogic, Inc. 1240 Villa Street Mountain View C A 94041 tel 650.526.2000 fax 6 50.526.2006 www.teralogic.tv Copyright 2000. TeraLogic, Inc. All rights reserved worldwide. TeraLogic and the TeraLogic logo are registered trademarks of TeraLogic, Inc. Janus is a trademark of TeraLogic, Inc. All other trademarks are properties of their respective owners and are acknowledged. 11/00 - 5K