AZ100ELT21DR2

AZ100ELT21DR2

  • 厂商:

    ETC1

  • 封装:

  • 描述:

    AZ100ELT21DR2 - Differential PECL to CMOS/TTL Translator - List of Unclassifed Manufacturers

  • 详情介绍
  • 数据手册
  • 价格&库存
AZ100ELT21DR2 数据手册
AZ100ELT21 ARIZONA MICROTEK, INC. Differential PECL to CMOS/TTL Translator FEATURES PACKAGE AVAILABILITY • • • • • • • 3.5ns Typical Propagation Delay Differential PECL Inputs CMOS/TTL Outputs Flow Through Pinouts Operating Range of 3.0V to 5.5V Direct Replacement for ON Semiconductor MC100ELT21 Use AZ100ELT21 for 10K Applications PACKAGE SOIC 8 SOIC 8 T&R SOIC 8 T&R TSSOP 8 TSSOP 8 T&R TSSOP 8 T&R PART NO. AZ100ELT21D AZ100ELT21DR1 AZ100ELT21DR2 AZ100ELT21T AZ100ELT21TR1 AZ100ELT21TR2 MARKING AZM100ELT21 AZM100ELT21 AZM100ELT21 AZHLT21 AZHLT21 AZHLT21 DESCRIPTION The AZ100ELT21 is a differential PECL to CMOS/TTL translator. Because PECL (Positive ECL) levels are used, only VCC and ground are required. The small outline 8-lead packaging and the single gate of the ELT21 makes it ideal for those applications where space, performance and low power are at a premium. The ELT21 provides a VBB output for single-ended use or a DC bias reference for AC coupling to the device. For single-ended input applications, the VBB reference should be connected to one side of the D0/D0 differential ¯¯ input pair. The input signal is then fed to the other D0/D0 input. The VBB pin should be used only as a bias for the ¯¯ ELT21 as its sink/source capability is limited. When used, the VBB pin should be bypassed to ground via a 0.01µF capacitor. NOTE: Specification in ECL/PECL tables are valid when thermal equilibrium is established. LOGIC DIAGRAM AND PINOUT ASSIGNMENT PIN DESCRIPTION PIN Q D0, D0 ¯¯ VCC VBB GND NC FUNCTION CMOS/TTL Output Differential Inputs Positive Supply Reference Voltage Output Ground No Connect NC 1 CMOS/TTL 8 VCC D0 2 PECL 7 Q D0 3 6 NC VBB 4 5 GND 1630 S. STAPLEY DR., SUITE 125 • MESA, ARIZONA 85204 • USA • (480) 962-5881 • FAX (480) 890-2541 www.azmicrotek.com AZ100ELT21 Absolute Maximum Ratings are those values beyond which device life may be impaired. Symbol VCC TA TSTG Character DC Supply Voltage (Referenced to GND) Operating Temperature Range (In Free-Air) Storage Temperature Range Value 7.0 -40 to +85 -65 to +150 Unit V °C °C CMOS/TTL DC CHARACTERISTICS (VCC = +3.0V to +5.5V) Symbol VOH VOL ICC ICC IOS Characteristic Output HIGH Voltage Output LOW Voltage Power Supply Current Power Supply Current Output Short Circuit Current Min VCC - 0.5 Typ Max 0.5 15 17.6 Unit V V mA mA mA Condition IOH = -24 mA IOL = 24 mA 0°C to 85°C -40°C to 85°C 9.0 9.0 100 100K LVPECL DC Characteristics (VCC = +3.3V) Symbol Characteristic VIH Input HIGH Voltage VIL Input LOW Voltage VBB Reference Voltage VPP Minimum Input Swing1 VCMR Common Mode Range VCC Input LOW Current IIL IIH Input HIGH Current 150 1. 200mV input guarantees full logic swing at the output. Min 2135 1490 1920 200 1.2 0.5 -40°C Typ Max 2420 1825 2090 Min 2135 1490 1920 200 1.2 0.5 0° C Typ Max 2420 1825 2090 VCC 150 Min 2135 1490 1920 200 1.2 0.5 25°C Typ Max 2420 1825 2090 VCC 150 Min 2135 1490 1920 200 1.2 0.5 85°C Typ Max 2420 1825 2090 VCC 150 Unit mV mV mV mV V µA µA 100K PECL DC Characteristics (VCC = +5.0V) Symbol Characteristic VIH Input HIGH Voltage VIL Input LOW Voltage VBB Reference Voltage VPP Minimum Input Swing1 VCMR Common Mode Range VCC Input LOW Current IIL IIH Input HIGH Current 150 1. 200mV input guarantees full logic swing at the output. Min 3835 3190 3620 200 1.2 0.5 -40°C Typ Max 4120 3525 3790 Min 3835 3190 3620 200 1.2 0.5 0° C Typ Max 4120 3525 3790 VCC 150 Min 3835 3190 3620 200 1.2 0.5 25°C Typ Max 4120 3525 3790 VCC 150 Min 3835 3190 3620 200 1.2 0.5 85°C Typ Max 4120 3525 3790 VCC 150 Unit mV mV mV mV V µA µA AC Characteristics (VCC = +3.0V to +5.5V) Symbol tPLH / tPHL 1. CL=20pF Characteristic Propagation Delay to Output VCC = 4.5V to 5.5V VCC = 3.0V to 3.6V 1 Min 2.0 3.5 -40°C Typ Max 5.5 7.0 Min 2.0 3.5 0° C Typ Max 5.5 7.0 Min 2.0 3.5 25° C Typ Max 5.5 7.0 Min 2.0 3.5 85° C Typ Max 5.5 7.0 Unit ns March 2002 * REV - 3 www.azmicrotek.com 2 AZ100ELT21 PACKAGE DIAGRAM SOIC 8 NOTES: 1. DIMENSIONS D AND E DO NOT INCLUDE MOLD PROTRUSION. 2. MAXIMUM MOLD PROTRUSION FOR D IS 0.15mm. 3. MAXIMUM MOLD PROTRUSION FOR E IS 0.25mm. DIM A A1 A2 A3 bp c D E e HE L Lp Q v w y Z θ MILLIMETERS MIN MAX 1.35 1.75 0.10 0.25 1.28 1.57 0.25 0.36 0.49 0.19 0.25 4.80 5.00 3.80 4.00 1.27 5.80 6.20 1.05 0.40 1.27 0.60 0.70 0.25 0.25 0.10 0.30 0.70 8O 0O INCHES MIN MAX 0.053 0.069 0.004 0.010 0.050 0.062 0.01 0.014 0.019 0.0075 0.0100 0.19 0.20 0.15 0.16 0.050 0.228 0.244 0.041 0.016 0.050 0.024 0.028 0.01 0.01 0.004 0.012 0.028 0O 8O March 2002 * REV - 3 www.azmicrotek.com 3 AZ100ELT21 PACKAGE DIAGRAM TSSOP 8 NOTES: 1. DIMENSIONS D AND E DO NOT INCLUDE MOLD PROTRUSION. 2. MAXIMUM MOLD PROTRUSION FOR D IS 0.15mm. 3. MAXIMUM MOLD PROTRUSION FOR E IS 0.25mm. DIM A A1 A2 A3 bp c D E e HE L Lp v w y Z θ MILLIMETERS MIN MAX 1.10 0.05 0.15 0.75 0.95 0.25 0.22 0.40 0.13 0.23 2.90 3.10 2.90 3.10 0.65 4.75 5.05 0.95 0.40 0.70 0.10 0.08 0.10 0.38 0.64 6O 0O March 2002 * REV - 3 www.azmicrotek.com 4 AZ100ELT21 Arizona Microtek, Inc. reserves the right to change circuitry and specifications at any time without prior notice. Arizona Microtek, Inc. makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does Arizona Microtek, Inc. assume any liability arising out of the application or use of any product or circuit and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. Arizona Microtek, Inc. does not convey any license rights nor the rights of others. Arizona Microtek, Inc. products are not designed, intended or authorized for use as components in systems intended to support or sustain life, or for any other application in which the failure of the Arizona Microtek, Inc. product could create a situation where personal injury or death may occur. Should Buyer purchase or use Arizona Microtek, Inc. products for any such unintended or unauthorized application, Buyer shall indemnify and hold Arizona Microtek, Inc. and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that Arizona Microtek, Inc. was negligent regarding the design or manufacture of the part. March 2002 * REV - 3 www.azmicrotek.com 5
AZ100ELT21DR2
1. 物料型号: - SOIC 8: AZ100ELT21D,标记为AZM100ELT21 - SOIC 8 T&R: AZ100ELT21DR1 和 AZ100ELT21DR2,均标记为AZM100ELT21 - TSSOP 8: AZ100ELT2IT,标记为AZHLT21 - TSSOP 8 T&R: AZ100ELT2ITRI 和 AZ100ELT21TR2,均标记为AZHLT21

2. 器件简介: - AZ100ELT21是一款差分PECL至CMOS/TTL转换器,使用PECL(正ECL)电平,仅需$V_{CC}$和地线。ELT21的小外形8引脚封装和单门设计使其非常适合空间、性能和低功耗要求高的应用场合。

3. 引脚分配: - Q: CMOS/TTL输出 - DO, DO: 差分输入 - Vcc: 正电源 - VBB: 参考电压输出 - GND: 地线 - NC: 无连接

4. 参数特性: - 工作电压范围:3.0V至5.5V - 最大传播延迟:3.5ns - 可以直接替换ON Semiconductor的MC100ELT21

5. 功能详解: - ELT21提供$V_{BB}$输出,可用于单端使用或作为AC耦合到设备的DC偏置参考。对于单端输入应用,$V_{BB}$参考应连接到D0/D0差分输入对的一侧,输入信号则连接到另一侧。$V_{BB}$引脚仅作为ELT21的偏置使用,其灌电流/拉电流能力有限。使用时,$V_{BB}$引脚应通过0.01µF电容器接地。

6. 应用信息: - AZ100ELT21适用于需要差分PECL至CMOS/TTL转换的应用,特别是在空间受限、性能要求高和低功耗的场景。

7. 封装信息: - 提供SOIC 8和TSSOP 8两种封装方式,具体尺寸和封装图在文档中有详细描述。
AZ100ELT21DR2 价格&库存

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