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EDI8L21664V10BC

EDI8L21664V10BC

  • 厂商:

    ETC1

  • 封装:

  • 描述:

    EDI8L21664V10BC - External SRAM Memory Solution - List of Unclassifed Manufacturers

  • 数据手册
  • 价格&库存
EDI8L21664V10BC 数据手册
EDI8L21664V 2x64Kx16 SRAM TMS320C54x External SRAM Memory Solution Features DSP Memory Solution • Texas Instruments TMS320C54x 3.3V Operating Supply Voltage Access Times of 10, 12 and 15ns Single Write Control and Output Enable Lines One Chip Enable Line per Memory Bank 50% Space Savings vs. Monolithic TSOPs Upgrade Path Available in Same Footprint Multiple VCC and VSS Pins Reduced Inductance and Capacitance 74 pin BGA, JEDEC MO-151 The EDI8L21664VxxBC is a 3.3V, 2x64Kx16 SRAM constructed with two 64Kx16 die mounted on a multilayer laminate substrate. The device is packaged in a 74 lead, 15mm by 15mm, BGA. Operating with a 3.3V power supply and with access times as fast as 10ns, the device allows the user to develop a fast external memory for Texas Instuments' TMS320C54x DSP. The device consists of two separate banks of 64Kx16 of memory. Each bank has a separate Chip Enable pin and higher order address select pin. Bank 'A' is controlled using CE1\ and A15A. Bank 'B' is controlled using CE2\ and A15B. The two banks have common I/Os (DQ0-15) and control lines (WE\ and G\). Pin Configurations 1 A B C D E F G H J K L VSS VSS VSS VSS VSS A15A N/C VSS VSS VSS A15B 1 2 VCC VCC VSS VSS VSS CE1\ WE\ CE2\ A14 A12 A13 2 3 VCC VCC 4 5 6 VCC VCC VCC 7 8 9 DQ9 DQ4 10 DQ8 VCC VSS VSS VSS DQ3 DQ5 DQ6 DQ2 A0 A3 10 11 N/C VCC VCC VCC VCC DQ7 DQ0 DQ1 N\C G\ A1 11 A B C D E F G H J K L DQ15 DQ14 VSS VSS DQ13 DQ11 DQ12 DQ10 VCC VCC 3 A10 A11 4 A8 A9 5 VCC VSS VSS 6 A6 A7 7 A4 VSS 8 A2 A5 9 Electronic Designs Incorporated • One Research Drive • Westborough, MA 01581 USA • 508-366-5151 • FAX 508-836-4850 • http://www.electronic-designs.com 1 EDI8L21664V Rev. 0 1/98 ECO #9704 Block Diagram A0-A14 G\ WE\ CE1\ A15 A 64K x 16 SRAM DQ0-DQ15 CE2\ A15 B 64K x 16 SRAM Pin Descriptions Pin Symbol A0-A14 A15A A15B WE\ CE1\ CE2\ G\ DQ0-15 Vcc Vss Type Input Input Input Input Input Input Input Input/Output Supply Ground Description Addresses Addresses: A15 on Bank 'A' of memory Addresses: A15 on Bank 'B' of memory Write Enable: This active LOW input allows a full 16-bit WRITE to occur. Chip Enable: This active LOW input is used to enable the 'A' Bank of the device. Chip Enable: This active LOW input is used to enable the 'B' Bank of the device. Output Enable: This active LOW asynchronous input enables the data output drivers. Data Inputs/Outputs Core power supply: +3.3V -5%/+10% Ground Various Various Various EDI8L21664V 2x64Kx16 SRAM 2 EDI8L21664V Rev. 0 1/98 ECO #9704 EDI8L21664V 2x64Kx16 SRAM Absolute Maximum Ratings* Voltage on Vcc Supply Relative to Vss -0.5V to 4.6V VIN -0.5V to Vcc+0.5V Storage Temperature -55°C to +125°C Junction Temperature +125°C Power Dissipation 3 Watts Short Circuit Output Current (per I/O) 50 mA *Stress greater than those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions greater than those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability. Recommended DC Operating Conditions Description Input High Voltage Input Low Voltage Supply Voltage Sym VIH VIL Vcc Min 2.2 -0.3 3.0 Max Vcc+0.5 0.8 3.6 Units V V V AC Test Conditions Input Pulse Levels Input Rise and Fall Times (Max) Input and Output Timing Levels Output Load VSS to 3.0V 1.5ns 1.5V See Figure 1 Capacitance (f=1.0MHz, VIN=VCC or VSS) Parameter Address Lines Data Lines Control Lines Sym CA CD/Q CC Max 8 17 15 Unit pF pF pF Figure 1 DC Electrical Characteristics (f=1.0MHz, VIN=VCC or VSS) Parameter Power Supply Current: Operating CMOS Standby TTL Standby Input Leakage Current Output Leakage Current Output High Voltage Output Low Voltage Sym ICC1 Conditions Device Selected; all inputs ≤VIL or ≥VIH; cycle time ≥tKC MIN; VCC=MAX; outputs open Device deselected; VCC=MAX; all inputs ≤ VSS +0.2 or ≥ VCC -0.2; all inputs static; CLK frequency = 0 Device deselected; all inputs ≤VIL or ≥VIH; all inputs static; VCC=MAX; CLK frequency = 0 0V≤VIN≤VCC Output(s) disabled, 0V≤VOUT≤VCC IOH = -4.0mA IOL = 8.0mA Min Max -10ns 380 -12ns 360 -15ns 260 60 120 -5 --5 2.4 5 5 0.4 Units mA ISB2 ISB3 ILI ILO VOH VOL mA mA µA µA V V 3 EDI8L21664V Rev. 0 1/98 ECO #9704 AC Characteristics Read Cycle Symbol Read Cycle Read Cycle Time Address Access Time Chip Enable Access Output Hold from Address Change Chip Enable to Output in Low-Z Chip Disable to Output in High-Z Output Enable access time Output Enable to Output in Low-Z Output Disable to Output in High-Z Write Cycle Write Cycle Time Chip Enable to End of Write Address valid to End of Write, with G\ HIGH Address Setup Time Address Hold from End of Write Write Pulse Width Write Pulse Width, with G\ HIGH Data Setup Time Data Hold Time Write Disable to Output in Low-Z Write Enable to Output in High-Z tAVAV tAVQV tELQV tAVQX tELQX tEHQZ tGLQV tGLQX tGHQZ tAVAV tELWH tAVGHWH tAVWH tAVWH tWLWH tWLGHWH tDVWH tWHDX tWHQX tWLQZ 10ns Min Max 10 10 10 3 3 5 5 0 5 10 8 8 0 0 10 8 6 0 3 5 12ns Min Max 12 12 12 4 4 6 6 0 6 12 8 8 0 0 10 8 6 0 4 6 15ns Min Max 15 15 15 4 4 7 7 0 7 15 9 9 0 0 11 9 7 0 5 7 Units ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns Read Cycle 1 - W High, G, E Low TAVAV A ADDRESS 1 TAVQV Q ADDRESS 2 TAVQX DATA 1 DATA 2 Read Cycle 2 - W High A E TELQV TELQX G TGLQV TGLQX Q TGHQZ TEHQZ TAVQV EDI8L21664V 2x64Kx16 SRAM 4 EDI8L21664V Rev. 0 1/98 ECO #9704 EDI8L21664V 2x64Kx16 SRAM Write Cycle 1 - W Controlled TAVAV A E TELWH TAVWH W TAVWL D TWLQZ Q HIGH Z TWLWH TDVWH DATA VALID TWHQX TWHDX TWHAX Write Cycle 2 - E Controlled TAVAV A TAVEL E TAVEH TWLEH W TDVEH D Q HIGH Z DATA VALID TEHDX TEHAX TELEH 5 EDI8L21664V Rev. 0 1/98 ECO #9704 Ordering Information Commercial Temperature Range (0°C to +70°C) Part Number EDI8L21664V10BC EDI8L21664V12BC EDI8L21664V15BC Speed (ns) 10 12 15 Package No. Industrial Temperature Range (-40°C to +85°C) Part Number EDI8L21664V15BI Speed (ns) 15 Package No. Package Description 74 Pin BGA JEDEC MO-151 15.0 max. 3.0 max. 1.27 15.0 max. 0.50/.070 Electronic Designs Incorporated EDI8L21664V • One Research Drive • Westborough, MA 01581USA • 508-366-5151 • FAX 508-836-4850 • http://www.electronic-designs.com 6 EDI8L21664V Rev. 0 1/98 ECO #9704 Electronic Designs Inc. reserves the right to change specifications without notice. CAGE No. 66301 2x64Kx16 SRAM
EDI8L21664V10BC 价格&库存

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