LD7552IS

2/21/2005 Green-Mode PWM Controller General Description The LD7552 is a low cost, low startup current, current mode PWM controller with green-mode power-saving operation. The integrated functions such as the leading-edge blanking of the current sensing, internal slope compensation and the small package provide the users a high efficiency, minimum external component counts, and low cost solution for AC/DC power applications. The special green-mode control does not only achieve low power consumption but also offer a non-audible-noise operation when the LD7552 operates under light load or no load condition. The LD7552 is designed for the switching adaptor with 30W~60W output. The LD7552 is offered in both SOP-8 and DIP-8 package. Patent pending Features High-Voltage CMOS Process with Excellent ESD Protection Very Low Startup Current (Typical 5 A) Under Voltage Lockout (UVLO) Current Mode Control with Cycle-by-Cycle Peak Current Limiting Leading-Edge Blanking on CS Pin Programmable Switching Frequency Internal Slope Compensation Proprietary Green-Mode Control for Power Saving Non-audible-noise Green Mode Control 500mA Driving Capability Applications Switching AC/DC Adaptor and Battery Charger Open Frame Switching Power Supply 384X Replacement Note: Please see Application Information Typical Application AC input EMI Filter VCC 40V 16.0V/ 11.4V UVLO OUT RT COMP LD7552 OSC Control Logic photocoupler Divider CS GND TL431 1 Leadtrend Technology Corporation LD7552-DS-00 February, 2005 Pin Configuration SOP-8 & DIP-8 (TOP VIEW) OUT VCC NC 5 8 7 CS 6 TOP MARK YYWWPP 1 2 3 4 YY: Year code (D: 2004, E: 2005…..) WW: week code PP: production code GND VCC Ordering Information Part number LD7552 IS LD7552 BS LD7552 IN LD7552 BN Package SOP-8 SOP-8 (PB Free) DIP-8 DIP-8 (PB Free) TOP MARK LD7552IS LD7552BS LD7552IN LD7552BN Shipping 2500 /tape & reel 2500 /tape & reel 3600 /tube /carton 3600 /tube /carton Pin Descriptions PIN 1 2 3 4 5 6 7 8 NAME GND COMP VCC RT NC CS VCC OUT Ground Voltage feedback pin (same as the COMP pin in UC384X), By connecting a photo-coupler to close the control loop and achieve the regulation. Supply voltage pin This pin is to program the switching frequency. By connecting a resistor to ground to set the switching frequency. Unconnected pin Current sense pin, connect to sense the MOSFET current Supply voltage pin Gate drive output to drive the external MOSFET FUNCTION COMP RT 2 Leadtrend Technology Corporation LD7552-DS-00 February, 2005 Block Diagram VCC 40V 16.0V/ 11.4V UVLO internal bias & Vref RT OSC EN Vref OK EN OUT Green-Mode Oscillator S COMP 2R R R PWM Comparator + + Q CS Leading Edge Blanking Ramp from Oscillator GND Absolute Maximum Ratings Supply Voltage VCC COMP, RT, CS Operating Junction Temperature Storage Temperature Range Package thermal resistance (DIP-8) Package thermal resistance (SOP-8) Lead temperature (LD7552IS & LD7552IN, Soldering, 10sec) Lead temperature (LD7552BS & LD7552BN, Soldering, 10sec) 36V -0.3 ~7V 150 C -65 C to 150 C 100 C/W 160 C/W 230 C 260 C Caution: Stresses beyond the ratings specified in “Absolute Maximum Ratings ” may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. 3 Leadtrend Technology Corporation LD7552-DS-00 February, 2005 Electrical Characteristics (TA = +25 C unless otherwise stated, VCC=15.0V) PARAMETER Supply Voltage (Vcc Pin) Startup Current VCOMP=0V Operating Current UVLO (off) UVLO (on) Voltage Feedback (Comp Pin) Short Circuit Current Open Loop Voltage Green Mode Threshold VCOMP Current Sensing (CS Pin) Maximum Input Voltage Leading Edge Blanking Time Input impedance Delay to Output Oscillator (RT pin) Frequency Green Mode Frequency Temp. Stability Voltage Stability Gate Drive Output (OUT Pin) Output Low Level Output High Level Rising Time Falling Time VCC=15V, Io=20mA VCC=15V, Io=20mA Load Capacitance=1000pF Load Capacitance=1000pF 9 160 60 1 V V nS nS RT=100K Fs=66.5KHz (-30 C ~85 C) (VCC=12V-30V) 61.5 66.5 20 5 2 71.5 KHz KHz % % 0.80 0.85 250 50 300 0.90 V nS K nS VCOMP=0V COMP pin open 2.2 5.0 2.35 3.0 mA V V VCOMP=3V VCOMP=open 10.4 14.8 5 3 2 0.7 11.4 16.0 12.4 17.5 25 4 A mA mA mA V V CONDITIONS MIN TYP MAX UNITS o 4 Leadtrend Technology Corporation LD7552-DS-00 February, 2005 Typical Performance Characteristics 12.2 17.0 16.8 12.0 16.4 UVLO (Off) (V) UVLO (On) (V) 11.8 16.0 15.6 15.2 14.8 11.6 11.4 11.2 14.4 14.0 -40 11.0 -40 -20 0 20 40 60 80 100 120 -20 0 20 40 60 80 100 120 Temperature ( C) Fig. 1 72.0 UVLO (Off) vs. Temperature 18.2 Fig. 2 Temperature ( C) UVLO (On) vs. Temperature 71.0 18.0 Frequency (KHz ) Frequency (KHz ) 70.0 17.8 69.0 17.6 68.0 17.4 67.0 17.2 66.0 -40 -20 0 20 40 60 80 100 120 17.0 -40 -20 0 20 40 60 80 100 120 Temperature ( C) Fig. 3 Frequency vs. Temperature Fig. 4 Temperature ( C) Green-Mode Frequency vs. Temperature 75.9 75.6 Max. Duty -Cy cle ( %) 75.3 75.0 74.7 74.4 -40 -20 0 20 40 60 80 100 120 Temperature ( C) Fig. 5 Duty-Cycle (max.) vs. Temperature 5 Leadtrend Technology Corporation LD7552-DS-00 February, 2005 Application Information Operation Overview The LD7552 is optimized to achieve power saving and minimize the external components counts. The device incorporated several functions to make it ideal to use in switching power supplies and switching adaptors. special circuit design, the maximum startup current of LD7552 is only 25 A. Theoretically, R1 can be very high resistance value. However, higher R1 will cause longer startup time. By properly select the value of R1 and C1, it can be optimized under the consideration of R1 power consumption and the startup time. Under Voltage Lockout (UVLO) An UVLO comparator is included to detect the voltage on the Vcc pin to ensure the supply voltage enough to power on the LD7552 PWM controller and in addition to drive the power MOSFET. As shown in Fig. 6, a hysteresis is AC input EMI Filter Cbulk R1 D1 provided to prevent the shutdown from the voltage dip during startup. The turn-on and turn-off threshold level are set at 16V and 11.4V, respectively. Vcc UVLO(on) UVLO(off) VCC C1 OUT LD7552 t I(Vcc) operating current (~ mA) GND CS Fig. 7 startup current (~uA) Current Sensing and Leading-edge Blanking t The typical current mode PWM controller feedbacks both current signal and voltage signal to close the control loop and achieve regulation. As shown in Fig. 8, the LD7552 detects the primary MOSFET current from the CS pin, which is not only for the peak current mode control but also for the pulse-by-pulse current limit. The maximum voltage threshold of the current sensing pin is set as 0.85V. Thus the MOSFET peak current can be calculated as: 0 .85 V RS Fig. 6 Startup Current and Startup Circuit The typical startup circuit as shown in Fig. 7 powers ups the LD7552. During the startup transient, the Vcc is lower than Therefore, the the UVLO threshold thus there is no gate pulse generated from LD7552 to drive power MOSFET. as charge the capacitor C1. current through R1 is to provide the startup current as well Whenever the Vcc voltage is IPEAK (MAX) higher enough to power on the LD7552 and further to deliver the gate drive signal, the supply current is provided from the auxiliary winding of the transformer. The lower A 250nS leading-edge blanking time is included in the input of CS pin to prevent the false-trigger caused by the current spike and further to eliminate the need of R-C filter which is usually needed in the typical UC384X application (Fig. 9). startup current requirement on the PWM controller will help to increase the R1 value and then reduce the power consumption on R1. By using CMOS process and the 6 Leadtrend Technology Corporation LD7552-DS-00 February, 2005 Vin R1 D1 Oscillator and Switching Frequency Connecting a resistor from RT pin to GND according to the Cbulk equation can program the normal switching frequency: C1 VCC OUT fSW 66.5 100(KHz) RT(K ) The suggested operating frequency range of LD7552 is within 50KHz to 130KHz. LD7552 Comp GND CS Rs Voltage Feedback Loop The voltage feedback signal is provided from the TL431 in the secondary side through the photocoupler to the COMP Fig. 8 pin of LD7552. The input stage of LD7552, like the UC384X, is with 2 diodes voltage offset then feeding into the voltage divider with 1/3 ratio, that is, 1 ( VCOMP 3 V (PWMCOMPARATOR ) 2 VF ) A pull-high resistor is embedded internally thus can be eliminated on the external circuit. VCC OUT 250ns blanking time Internal Slope Compensation A fundamental issue of current mode control is the stability problem when its duty-cycle is operated more than 50%. To stabilize the control loop, the slope compensation is needed LD7552 CS GND in the traditional UC384X design by injecting the ramp signal from the RT/CT pin through a coupling capacitor. In LD7552, the internal slope compensation circuit has been implemented to simplify the external circuit design. remove On/Off Control Fig. 9 The LD7552 can be controlled to turn off by pulling COMP pin to lower than 1.2V. The gate output pin of LD7552 will be disabled immediately under such condition. The off mode can be released when the pull-low signal is removed. Output Stage and Maximum Duty-Cycle An output stage of a CMOS buffer, with typical 500mA driving capability, is incorporated to drive a power MOSFET directly. And the maximum duty-cycle of LD7552 is limited Dual-Oscillator Green-Mode Operation There saving are many difference such as topologies has been implemented in different chips for the green-mode or power requirements “burst-mode control”, “skipping-cycle Mode”, “variable off-time control “…etc. The to 75% to avoid the transformer saturation. 7 Leadtrend Technology Corporation LD7552-DS-00 February, 2005 basic operation theory of all these approaches intended to reduce the switching cycles under light-load or no-load condition either by skip some switching pulses or reduce the switching frequency. What LD7552 used to implement the power-saving operation is Leadtrend Technology’s own IP . By using this dual-oscillator control, the green-mode frequency can be well controlled and further to avoid the generation of audible noise. from OSC In such VCO "Set" Signal (to OSC & Nor gate) approach, as shown in the block diagram, 2 oscillators are implemented in LD7552. The first oscillator is to take care the normal switching frequency, which can be set by the RT pin through an external resistor. Under this operation mode, as shown in Fig. 10, the 2nd oscillation (green-mode oscillator) is not activated. Therefore, the rising-time and the falling-time of the internal ramp will be constant to achieve good stability over all temperature range. frequency. Ramp of OSC V+ Normal Mode VGreen Mode V+ Green-Mode Oscillator Level-detector & Counter Vgreen (V+ -Vgreen) >=0, VCO disabled (V+ -Vgreen)