PDM41028LA12TSOI

PDM41028 1 Megabit Static RAM 256K x 4-Bit Features n 1 2 3 4 5 6 7 Description The PDM41028 is a high-performance CMOS static RAM organized as 262,144 x 4 bits. Writing to this device is accomplished when the write enable (WE) and the chip enable (CE) inputs are both LOW. Reading is accomplished when WE remains HIGH and CE and OE are both LOW. The PDM41028 operates from a single +5V power supply and all the inputs and outputs are fully TTLcompatible. The PDM41028 comes in two versions, the standard power version PDM41028SA and a low power version the PDM41028LA. The two versions are functionally the same and only differ in their power consumption. The PDM41028 is available in a 28-pin 300-mil SOJ, and a 28-pin 400-mil SOJ for surface mount applications. High speed access times Com’l: 10, 12 and 15 ns Ind’l: 12 and 15 ns Low power operation (typical) - PDM41028SA Active: 400 mW Standby: 150 mW - PDM41028LA Active: 350 mW Standby: 100 mW Single +5V (±10%) power supply TTL-compatible inputs and outputs Packages Plastic SOJ (300 mil) - TSO Plastic SOJ (400 mil) - SO n n n n Functional Block Diagram A0 • • • • • A17 Decoder Memory Matrix Addresses • • • • • • 8 9 10 11 I/O 0 I/O 1 I/O 2 I/O 3 ••••• Input Data Control Column I/O CE WE OE 12 1 Rev. 2.2 - 4/29/98 PDM41028 Pin Configuration SOJ A7 A8 A9 A10 A11 A12 A13 A14 A15 A16 A17 CE OE Vss 1 2 3 4 5 6 7 8 9 10 11 12 13 14 28 27 26 25 24 23 22 21 20 19 18 17 16 15 Vcc A6 A5 A4 A3 A2 A1 A0 NC I/O3 I/O2 I/O1 I/O0 WE Pin Description Name A17-A0 I/O3-I/O0 OE WE CE NC VCC VSS Description Address Inputs Data Inputs/Outputs Output Enable Input Write Enable Input Chip Enable Input No Connect Power (+5V) Ground Truth Table(1) OE X L X H WE X H L H CE H L L L I/O Hi-Z DOUT DIN Hi-Z MODE Standby Read Write Output Disable NOTE: 1. H = VIH, L = VIL, X = DON’T CARE Absolute Maximum Ratings (1) Symbol VTERM TBIAS TSTG PT IOUT Tj Rating Terminal Voltage with Respect to VSS Temperature Under Bias Storage Temperature Power Dissipation DC Output Current Maximum Junction Temperature (2) Com’l. –0.5 to +7.0 –55 to +125 –55 to +125 1.0 50 125 Ind. –0.5 to +7.0 –65 to +135 –65 to +150 1.0 50 145 Unit V °C °C W mA °C NOTE: 1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability. 2. Appropriate thermal calculations should be performed in all cases and specifically for those where the chosen package has a large thermal resistance (e.g., TSOP). The calculation should be of the form: Tj = Ta + P * θja where Ta is the ambient temperature, P is average operating power and θja the thermal resistance of the package. For this product, use the following θja values: SOJ: 76o C/W TSOP: 100o C/W 2 Rev. 2.2 - 4/29/98 PDM41028 Recommended DC Operating Conditions Symbol VCC VSS Industrial Commercial Parameter Supply Voltage Supply Voltage Ambient Temperature Ambient Temperature Min. 4.5 0 –40 0 Typ. 5.0 0 25 25 Max. 5.5 0 85 70 Unit V V °C °C 1 2 3 DC Electrical Characteristics (VCC = 5.0V ± 10%) PDM41028SA Symbol ILI ILO VIL VIH VOL VOH Parameter Input Leakage Current Output Leakage Current Input Low Voltage Input High Voltage Output Low Voltage Output High Voltage IOL = 8 mA, VCC = Min. IOL = 10 mA, VCC = Min. IOH = –4 mA, VCC = Min. Test Conditions VCC = MAX., VIN = VSS to VCC VCC= MAX., CE = VIH, VOUT = VSS to VCC Com’l/ Ind. Com’l/ Ind. Min. –5 –5 –0.5 (1) PDM41028LA Min. –5 –5 –0.5 (1) Unit Max. 5 5 0.8 6.0 0.4 0.5 — Max. 5 5 0.8 6.0 0.4 0.5 — µA µA V V V V V 4 5 6 7 2.2 — — 2.4 2.2 — — 2.4 NOTE: 1. VIL(min) = –3.0V for pulse width less than 20 ns Power Supply Characteristics -10 Symbol Parameter ICC Operating Current CE = VIL, f = fMAX = 1/tRC VCC = Max. IOUT = 0 mA ISB Standby Current CE = VIH f = fMAX = 1/tRC VCC = Max. ISB1 Full Standby Current CE ≥ VHC f=0 VCC = Max., VIN ≥ VCC – 0.2V or ≤ 0.2V -12 -15 Unit mA mA Power Com’l. Com’l Ind. Com’l Ind. SA 250 230 240 185 195 LA 230 210 220 165 175 8 9 10 11 12 3 SA LA SA LA 80 75 20 10 70 65 15 10 70 65 25 10 55 50 10 5 55 50 15 10 mA mA mA mA SHADED AREA = PRELIMINARY DATA NOTES: All values are maximum guaranteed values. VLC ≤ 0.2V, VHC ≥ VCC – 0.2V Rev. 2.2 - 4/29/98 PDM41028 Capacitance(1) (TA = +25°C, f = 1.0 MHz) Symbol CIN COUT Parameter Input Capacitance Output Capacitance Max. 8 8 Unit pF pF NOTE:1. This parameter is determined by device characterization but is not production tested. AC Test Conditions Input pulse levels Input rise and fall times Input timing reference levels Output reference levels Output load VSS to 3.0V 3 ns 1.5V 1.5V See Figures 1 and 2 +5V 480Ω DOUT 255Ω 30 pF +5V 480Ω DOUT 255Ω 5 pf Figure 1. Output Load Equivalent Figure 2. Output Load Equivalent (for tLZCE, tHZCE, tLZWE, tHZWE, tLZOE, tHZOE) Delta tAA - ns 5 4 3 2 1 0 0 Typical Delta tAA vs Capacitive Loading Figure 4. 30 60 90 120 Additional Lumped Capacitive Loading (pF) 4 Rev. 2.2 - 4/29/98 PDM41028 Read Cycle No. 1(4, 5) tRC ADDR 1 DATA VALID tAA tOH DOUT PREVIOUS DATA VALID 2 3 Read Cycle No. 2(2, 4, 6) tRC ADDR tAA tACE CE 4 tHZCE tLZCE OE 5 tHZOE tLZOE DOUT DATA VALID 6 7 tAOE AC Electrical Characteristics Description READ Cycle READ cycle time Address access time Chip enable access time Output hold from address change Chip enable to output in low Z (1,3) -10(7) Sym tRC tAA tACE tOH tLZCE tHZCE tPU (3) -12(7) 8 -15 15 ns 15 15 3 5 6 7 0 ns ns ns ns ns ns 15 6 0 6 6 ns ns ns ns Min. Max. Min. Max. Min. Max. Units 10 10 10 3 5 6 0 10 6 0 6 0 0 12 6 3 5 12 12 12 9 10 11 12 5 Chip disable to output in high Z(1,2,3) Chip enable to power up time(3) Chip disable to power down time Output enable access time Output enable to output in low Z (1,3) Output disable to output in high Z (1,3) tPD tAOE tLZOE tHZOE SHADED AREA = PRELIMINARY DATA Notes referenced are after Data Retention Table. Rev. 2.2 - 4/29/98 PDM41028 Write Cycle No. 1 (Write Enable Controlled) tWC ADDR tAW CE tAH tCW tWP2 WE tAS DIN tDS DATA VALID tDH tHZWE DOUT HIGH-Z HIGH-Z tLZWE Write Cycle No. 2 (Write Enable Controlled) tWC ADDR tAW tCW CE tAH tAS WE tWP1 tDS DIN DATA VALID tDH DOUT HIGH-Z NOTE: Output Enable (OE) is inactive (high) Write Cycle No. 3 (Chip Enable Controlled) tWC ADDR tAW tCW CE tAS WE tWP1 tDS tAH tDH DIN DATA VALID DOUT HIGH-Z 6 Rev. 2.2 - 4/29/98 PDM41028 AC Electrical Characteristics Description WRITE Cycle WRITE Cycle time Chip enable active time Address Valid to end of write Address setup time Address hold from end of write Write pulse width Write pulse width Data setup time Data hold time Write disable to output in low Z (1,3) -10(7) Sym tWC tCW tAW tAS tAH tWP1 tWP2 tDS tDH tLZWE tHZWE -12(7) -15 Min. Max. Min. Max. Min. Max. Units 10 10 10 0 0 9 10 7 0 0 7 12 10 10 0 0 10 11 7 0 0 7 15 11 11 0 0 11 12 7 0 0 7 ns ns ns ns ns ns ns ns ns ns ns 1 2 3 4 5 6 Write enable to output in high Z(1,3) SHADED AREA = PRELIMINARY DATA Notes referenced are after Data Retention Table Low VCC Data Retention Waveform Data Retention Mode V CC 4.5V VDR 4.5V t CDR VIH V IL VDR tR 7 8 DON'T CARE CE Data Retention Electrical Characteristics (LA Version Only) Symbol VDR ICCDR Parameter VCC for Retention Data Data Retention Current CE ≥ VCC – 0.2V VIN ≥ VCC – 0.2V or ≤ 0.2V VCC = 2V VCC = 3V Test Conditions Min. 2 — — 0 tRC Typ. — — — — — Max. — 500 750 — — Unit V µA µA ns ns 9 10 11 12 tCDR tR (3) Chip Deselect to Data Retention Time Operation Recovery Time NOTES: (For three previous Electrical Characteristics tables) 1. The parameter is tested with CL = 5 pF as shown in Figure 2. Transition is measured ±200 mV from steady state voltage. 2. At any given temperature and voltage condition, tHZCE is less than tLZCE. 3. This parameter is sampled. 4. WE is high for a READ cycle. 5. The device is continuously selected. Chip Enable is held in its active state. 6. The address is valid prior to or coincident with the latest occuring Chip Enable. 7. Vcc = 5V ± 5%. Rev. 2.2 - 4/29/98 7 PDM41028 Ordering Information XXXXX X Device Type Power XX Speed X X X Package Type Process Temp. Range Preferred Shipping Container Blank Tubes TR Tape & Reel TY Tray Blank Commercial (0° to +70°C) I Industrial (–40°C to +85°C) A Automotive ( –40°C to +105°C) TSO 28-pin 300-mil Plastic SOJ SO 28-pin 400-mil Plastic SOJ 10 12 15 Commercial Only (Use 15ns for slower designs.) SA LA Standard Power Low Power PDM41028 - (256Kx4) Static RAM Faster Memories for a Faster World ™ 8 Rev. 2.2 - 4/29/98