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AM79M574

AM79M574

  • 厂商:

    ETC2

  • 封装:

  • 描述:

    AM79M574 - Metering Subscriber Line Interface Circuit - List of Unclassifed Manufacturers

  • 数据手册
  • 价格&库存
AM79M574 数据手册
Am79M574 Metering Subscriber Line Interface Circuit DISTINCTIVE CHARACTERISTICS Programmable loop-detect threshold Ground-key detect Performs polarity reversal Line-feed characteristics independent of battery variations Test relay driver optional Programmable constant-resistance feed Supports 2.2 Vrms metering (12 and 16 kHz) On-chip switching regulator for low-power dissipation Two-wire impedance set by single external impedance Tip Open state for ground-start lines On-hook transmission BLOCK DIAGRAM Ring Relay Driver A(TIP) Test Relay Driver Ground-Key Detector HPA Two-Wire Interface HPB Signal Transmission Off-Hook Detector B(RING) DA DB VREG L VBAT BGND CHS QBAT CHCLK VCC VEE AGND 16857C-001 Power-Feed Controller Ring-Trip Detector Switching Regulator Notes: 1. Am79M574—E0 and E1 inputs; ring and test relay drivers sourced internally to BGND. 2. Current gain (K1) = 1000.            RINGOUT TESTOUT C1 C2 C3 C4 E1 E0 DET Input Decoder and Control VTX RSN RD RDC Publication# 080135 Rev: E Amendment: /0 Issue Date: October 1999 ORDERING INFORMATION Standard Products Legerity standard products are available in several packages and operating ranges. The order number (Valid Combination) is formed by a combination of the elements below. Am79M574 J C TEMPERATURE RANGE C = Commercial (0°C to 70°C)* PACKAGE TYPE J = 32-Pin Plastic Leaded Chip Carrier (PL 032) PERFORMANCE GRADE Blank = Standard Specification –1 = Performance Grading –2 = Performance Grading DEVICE NAME/DESCRIPTION Am79M574 Subscriber Line Interface Circuit Valid Combinations Valid Combinations Am79M574 –1 –2 JC Valid Combinations list configurations planned to be supported in volume for this device. Consult the local Legerity sales office to confirm availability of specific valid combinations, to check on newly released combinations, and to obtain additional data on Legerity’s standard military grade products. Note: * Functionality of the device from 0°C to +70°C is guaranteed by production testing. Performance from –40°C to +85°C is guaranteed by characterization and periodic sampling of production units. 2 Am79M574 Data Sheet CONNECTION DIAGRAM Top View RINGOUT B(RING) A(TIP) 31 BGND VREG VCC 32 30 4 3 2 1 DB TP TESTOUT L VBAT QBAT CHS CHCLK C4 E1 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 29 28 27 26 25 24 23 22 21 TP DA RD HPB HPA VTX VEE RSN AGND Notes: 1. Pin 1 is marked for orientation. 2. TP is a thermal conduction pin tied to substrate (QBAT). 3. NC = No connect SLIC Products DGND E0 C2 C3 DET C1 RDC 3 PIN DESCRIPTIONS Pin Names AGND A(TIP) BGND B(RING) C3–C1 C4 CHCLK CHS DA DB DET DGND E0 E1 HPA HPB L Type Gnd Output Gnd Output Input Input Input Input Input Input Output Gnd Input Input Capacitor Capacitor Output Analog (quiet) ground Output of A(TIP) power amplifier Battery (power) ground Output of B(RING) power amplifier Decoder. TTL compatible. C3 is MSB and C1 is LSB. Test relay driver command. TTL compatible. A logic Low enables the driver. Chopper clock. Input to switching regulator (TTL compatible). Frequency = 256 kHz (Nominal). Chopper Stabilization. Connection for external stabilization components. Ring-trip negative. Negative input to ring-trip comparator. Ring-trip positive. Positive input to ring-trip comparator. Detector. When enabled, a logic Low indicates that the selected detector is tripped. Logic inputs C3–C1, E1, and E0 select the detector. Open-collector with a built-in 15 kΩ pull-up resistor. Digital ground Read Enable. A logic High enables DET. A logic Low disables DET. Ground enable. When E0 is High, E1 = High connects the ground-key detector to DET, and E1 = Low connects the off-hook or ring-trip detector to DET. High-pass filter capacitor. A(TIP) side of high-pass filter capacitor. High-pass filter capacitor. B(RING) side of high-pass filter capacitor. Switching Regulator Power Transistor. Connection point for filter inductor and anode of catch diode. Has up to 60 V of pulse waveform and must be isolated from sensitive circuits. Keep the diode connections short because of the high currents and high di/dt. Quiet Battery. Filtered battery supply for the signal processing circuits. Detector resistor. Threshold modification and filter point for the off-hook detector. DC feed resistor. Connection point for the DC feed resistance programming network, which also connects to the Receiver Summing Node (RSN). VRDC is negative for normal polarity and positive for reverse polarity. Ring relay driver. Sourcing from BGND with internal diode to QBAT. Receive Summing Node. The metallic current (AC and DC) between A(TIP) and B(RING) = 1000 x the current into this pin. The networks that program receive gain, two-wire impedance, and feed resistance all connect to this node. This node is extremely sensitive. Route the 256 kHz chopper clock and switch lines away from the RSN node. Test relay driver. Sourcing from BGND with internal diode to QBAT. Thermal pin. Connection for heat dissipation. Internally connected to substrate (QBAT). Leave as open circuit or connected to QBAT. In both cases, the TP pins can connect to an area of copper on the board to enhance heat dissipation. Battery supply. Connected to office battery supply through an external protection diode. +5 V power supply –5 V power supply Regulated Voltage. Provides negative power supply for power amplifiers, connection point for inductor, filter capacitor, and chopper stabilization. Transmit Audio.This output is 0.510 times the A(TIP) and B(RING) metallic voltage. The other end of the two-wire input impedance programming network connects here. Description QBAT RD RDC Battery Resistor Resistor RINGOUT RSN Output Input TESTOUT TP Output Thermal VBAT VCC VEE VREG VTX Battery Power Power Input Output 4 Am79M574 Data Sheet ABSOLUTE MAXIMUM RATINGS Storage temperature . . . . . . . . . . . . –55°C to +150°C VCC with respect to AGND/DGND . . . –0.4 V to +7.0 V VEE with respect to AGND/DGND . . .+0.4 V to –7.0 V VBAT with respect to AGND/DGND . . . +0.4 V to –70 V Note: Rise time of VBAT (dv/dt) must be limited to 27 V/µs or less when QBAT bypass = 0.33 µF. BGND with respect to AGND/DGND. . . . . . . . . . . . . . . .+1.0 V to –3.0 V A(TIP) or B(RING) to BGND: Continuous . . . . . . . . . . . . . . . . . –70 V to +1.0 V 10 ms (f = 0.1 Hz) . . . . . . . . . . . . –70 V to +5.0 V 1 µs (f = 0.1 Hz). . . . . . . . . . . . . . . –90 V to +10 V 250 ns (f = 0.1 Hz) . . . . . . . . . . . . –120 V to +15 V Current from A(TIP) or B(RING) . . . . . . . . . . . .±150 mA Voltage on RINGOUT. . . . .BGND to 70 V above QBAT Voltage on TESTOUT. . . . .BGND to 70 V above QBAT Current through relay drivers . . . . . . . . . . . . . . 60 mA Voltage on ring-trip inputs (DA and DB) . . . . . . . . . . . . . . . . . . . . VBAT to 0 V Current into ring-trip inputs . . . . . . . . . . . . . . . . .±10 mA Peak current into regulator switch (L pin) . . . . . . . . . . . . . . . . . . . . . . 150 mA Switcher transient peak off voltage on L pin . . . . . . . . . . . . . . . . . . . . . +1.0 V C4–C1, E0, E1, CHCLK to AGND/DGND. . . . . . . . . . . . –0.4 V to VCC + 0.4 V Maximum power dissipation, (see note). . . .TA = 70°C In 32-pin PLCC package . . . . . . . . . . . . . . 1.74 W Note: Thermal limiting circuitry on chip will shut down the circuit at a junction temperature of about 165°C. The device should never be exposed to this temperature. Operation above 145 ° C junction temperature may degrade device reliability. See the SLIC Packaging Considerations for more information. Stresses above those listed under Absolute Maximum Ratings may cause permanent device failure. Functionality at or above these limits is not implied. Exposure to Absolute Maximum Ratings for extended periods may affect device reliability. OPERATING RANGES Commercial (C) Devices Ambient temperature . . . . . . . . . . . . . . .0°C to +70°C VCC . . . . . . . . . . . . . . . . . . . . . . . . . . 4.75 V to 5.25 V VEE . . . . . . . . . . . . . . . . . . . . . . . . –4.75 V to –5.25 V VBAT . . . . . . . . . . . . . . . . . . . . . . . . . . . –40 V to –58 V AGND/DGND . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0 V BGND with respect to AGND/DGND . . . . . . . . . . . –100 mV to +100 mV Load resistance on VTX to ground . . . . . . . 10 kΩ min Operating Ranges define those limits between which the functionality of the device is guaranteed. * Functionality of the device from 0°C to +70°C is guaranteed by production testing. Performance from –40°C to +85°C is guaranteed by characterization and periodic sampling of production units. SLIC Products 5 ELECTRICAL CHARACTERISTICS Description Analog (VTX) output impedance Analog (VTX) output offset 0°C to +70°C –1* –40°C to +85°C Analog (RSN) input impedance 300 Hz to 3.4 kHz Longitudinal impedance at A or B Overload level Z2WIN = 600 Ω to 900 Ω 4-wire 2-wire –3.1 –6.0 –1 –35 –30 –40 –35 1 Test Conditions (See Note 1) Min Typ 3 +35 +30 +40 +35 20 35 +3.1 +6.0 Max Unit Ω — — 4 4 4 — — 2 Note mV Ω Vpk Transmission Performance, 2-Wire Impedance 2-wire return loss (See Test Circuit D) 300 Hz to 500 Hz 500 Hz to 2500 Hz 2500 Hz to 3400 Hz 26 26 20 dB 4, 14 Longitudinal Balance (2-Wire and 4-Wire, See Test Circuit C) RL = 600 Ω, longitudinal to metallic L-T, L-4 (normalized to unity gain) Longitudinal to metallic L-T, L-4 300 Hz to 3400 Hz –1* 48 52 — — 4 — — — 4 — 200 Hz to 1 kHz normal polarity 0°C to +70°C normal polarity –40°C to +85°C reverse polarity 1 kHz to 3.4 kHz normal polarity 0°C to +70°C normal polarity –40°C to +85°C reverse polarity –2* –2 –2 –2* –2 –2 –1* 63 58 54 58 54 54 40 42 25 18 dB Longitudinal signal generation 4-L Longitudinal current capability per wire 300 Hz to 800 Hz 300 Hz to 800 Hz Active state OHT state mArms 4 Insertion Loss (2- to 4-Wire and 4- to 2-Wire, See Test Circuits A and B) Gain accuracy 2- to 4-wire 2- to 4-wire 2- to 4-wire 2- to 4-wire 4- to 2-wire 4- to 2-wire 4- to 2-wire 4- to 2-wire Variation with frequency 0 dBm, 1 kHz, 0°C to +70°C 0 dBm, 1 kHz, –40°C to +85°C 0 dBm, 1 kHz, 0°C to +70°C 0 dBm, 1 kHz, –40°C to +85°C 0 dBm, 1 kHz, 0°C to +70°C 0 dBm, 1 kHz, –40°C to +85°C 0 dBm, 1 kHz, 0°C to +70°C 0 dBm, 1 kHz, –40°C to +85°C 300 Hz to 3400 Hz Relative to 1 kHz 0°C to +70°C –40°C to +85°C +7 dBm to –55 dBm, ref 0 dBm 0°C to +70°C –40°C to +85°C 5.75 5.65 5.75 5.70 –0.15 –0.20 –0.1 –0.15 5.85 5.85 5.85 5.85 6.00 6.05 5.95 6.00 +0.15 +0.20 +0.1 +0.15 — 4 — 4 — 4 — 4 — — — 4 — 4 4 –1* –1 –1* –1 dB –0.1 –0.15 –0.1 –0.15 +0.1 +0.15 +0.1 +0.15 Gain tracking Notes: * P.G. = Performance Grade –2 grade performance parameters are equivalent to –1 performance parameters except where indicated. 6 Am79M574 Data Sheet ELECTRICAL CHARACTERISTICS (continued) Description Test Conditions (See Note 1) Min Typ Max Unit Note Balance Return Signal (4- to 4-Wire, See Test Circuit B) Gain accuracy 0 dBm, 1 kHz, 0°C to +70°C 0 dBm, 1 kHz, –40°C to +85°C 0 dBm, 1 kHz, 0°C to +70°C 0 dBm, 1 kHz, –40°C to +85°C 300 Hz to 3400 Hz Relative to 1 kHz 0°C to +70°C –40°C to +85°C +7 dBm to –55 dBm, ref 0 dBm 0°C to +70°C –40°C to +85°C f = 1 kHz –6.00 –6.05 –5.95 –6.00 –5.85 –5.85 –5.85 –5.85 –5.75 –5.65 –5.75 –5.70 dB –0.1 –0.15 –0.1 –0.15 5.3 +0.1 +0.15 +0.1 +0.15 µs 3 3, 4 3 3, 4 — — 3, 4 3, 4 — 4 4 4, 15 –1* –1 Variation with frequency Gain tracking Group delay Total Harmonic Distortion (2- to 4-Wire or 4- to 2-Wire, See Test Circuits A and B) Total harmonic distortion Total harmonic distortion with metering Idle Channel Noise C-message weighted noise 2-wire, 0°C to +70°C 2-wire, 0°C to +70°C 2-wire, –40°C to +85°C 4-wire, 0°C to +70°C 4-wire, 0°C to +70°C 4-wire, –40°C to +85°C Psophometric weighted noise 2-wire, 0°C to +70°C 2-wire, 0°C to +70°C 2-wire, –40°C to +85°C 4-wire, 0°C to +70°C 4-wire, 0°C to +70°C 4-wire, –40°C to +85°C Single Frequency Out-of-Band Noise (See Test Circuit E) Metallic 4 kHz to 9 kHz 9 kHz to 1 MHz 256 kHz and harmonics 1 kHz to 15 kHz Above 15 kHz 256 kHz and harmonics –76 –76 –57 dBm Longitudinal –70 –85 –57 4, 5, 9 4, 5, 9 4, 5 4, 5, 9 4, 5, 9 4, 5 –1* +7 +7 +7 +7 +7 +7 –83 –83 –83 –83 –83 –83 +15 +12 +15 dBrnC –1* +15 +12 +15 –75 –78 –75 dBmp –1* –75 –78 –75 7 7 4, 7 7 7 4, 7 4 0 dBm, 300 Hz to 3.4 kHz +9 dBm, 300 Hz to 3.4 kHz –64 –55 –50 –40 dB –35 4, 11 –1* Line Characteristics (See Figure 1) BAT = –48 V, RL = 600 Ω and 900 Ω, RFEED = 800 Ω Apparent battery voltage Loop-current accuracy Loop current—Tip Open state Active state Active state RL = 600 Ω 47 –7.5 50 53 +7.5 1.0 1.0 –20 +20 130 mA % 10 V Loop current—Open Circuit state RL = 0 Ω Loop-current limit accuracy Fault current limit, ILLIM (IAX + IBX) OHT state Active state A and B shorted to GND SLIC Products 7 ELECTRICAL CHARACTERISTICS (continued) Description Test Conditions (See Note 1) Min Typ Max Unit Note Power Dissipation BAT = –48 V, Normal Polarity On-hook Open Circuit state –1* On-hook OHT state –1* On-hook Active state –1* Off-hook OHT state Off-hook Active state Supply Currents VCC On-hook supply current Open Circuit state OHT state Active state Open Circuit state OHT state Active state Open Circuit state OHT state Active state 3.0 6.0 7.5 1.0 2.2 2.7 0.4 3.0 4.0 4.5 10.0 12.0 2.3 3.5 6.0 1.0 5.0 6.0 mA RL = 600 Ω RL = 600 Ω 35 35 135 135 200 200 500 650 120 80 250 200 400 300 750 1000 mW VEE On-hook supply current VBAT On-hook supply current Power Supply Rejection Ratio (VRIPPLE = 50 mVrms) VCC 50 Hz to 3400 Hz –1* 3.4 kHz to 50 kHz –1* VEE 50 Hz to 3400 Hz –1* 3.4 kHz to 50 kHz –1* VBAT 50 Hz to 3400 Hz –1* 3.4 kHz to 50 kHz –1* Off-Hook Detector Current threshold accuracy IDET = 365/RD Nominal –20 +20 % 25 30 22 25 20 25 10 10 27 30 20 25 45 45 6, 7 35 35 40 40 dB 25 25 45 45 6, 7 40 40 6, 7 Ground-Key Detector Thresholds, Active State, BAT = –48 V (See Test Circuit F) Ground-key resistance threshold B(RING) to GND Ground-key current threshold Ring-Trip Detector Input Bias current Offset voltage Source resistance 0 to 2 MΩ –5 –50 –0.05 0 +50 µA mV 13 B(RING) to GND Midpoint to GND 2.0 5.0 9 9 10.0 kΩ mA 8 8 Am79M574 Data Sheet ELECTRICAL CHARACTERISTICS (continued) Description Test Conditions (See Note 1) Min Typ Max Unit Note Logic Inputs (C4–C1, E0, E1, and CHCLK) Input High voltage Input Low voltage Input High current Input High current Input Low current Logic Output (DET) Output Low voltage Output High voltage IOUT = 0.8 mA IOUT = –0.1 mA 2.4 0.4 V All inputs except E1 Input E1 –75 –75 –0.4 2.0 V 0.8 40 45 µA mA Relay Driver Outputs (RINGOUT, TESTOUT) On voltage Off leakage Clamp voltage 50 mA sink QBAT –2 50 mA source BGND –2 BGND –0.95 0.5 100 V µA V RELAY DRIVER SCHEMATICS BGND BGND RINGOUT TESTOUT QBAT QBAT 16857C-002 SLIC Products 9 SWITCHING CHARACTERISTICS Symbol Parameter E1 Low to DET High (E0 = 1) tgkde E1 Low to DET Low (E0 = 1) tgkdd tgkd0 E0 High to DET Low (E1 = 0) E0 Low to DET High (E1 = 0) E1 High to DET Low (E0 = 1) tshde E1 High to DET High (E0 = 1) tshdd tshd0 E0 High to DET Low (E1 = 1) E0 Low to DET High (E1 = 1) Switchhook Detect state RL = 600 Ω, RG open (See Figure G) Ground-Key Detect state RL open, RG connected (See Figure H) Test Conditions Temperature Range 0°C to +70°C –40°C to +85°C 0°C to +70°C –40°C to +85°C 0°C to +70°C –40°C to +85°C 0°C to +70°C –40°C to +85°C 0°C to +70°C –40°C to +85°C 0°C to +70°C –40°C to +85°C 0°C to +70°C –40°C to +85°C 0°C to +70°C –40°C to +85°C Min Typ Max 3.8 4.0 1.1 1.6 1.1 1.6 3.8 4.0 1.2 1.7 3.8 4.0 1.1 1.6 3.8 4.0 Unit Note µs 4 SWITCHING WAVEFORMS E1 to DET E1 DET tgkde tshde tgkde tshde E0 to DET E1 E0 DET tshdd Note: All delays measured at 1.4 V level. tshd0 tgkdd tgkd0 16857C-003 10 Am79M574 Data Sheet Notes: 1. Unless otherwise noted, test conditions are BAT = –48 V, VCC = +5 V, VEE = –5 V, RL = 600 Ω, CHP = 0.22 µF, RDC1 = RDC2 = 20 kΩ, CDC = 0.1 µF, Rd = 51.1 kΩ, no fuse resistors, two-wire AC output impedance, programming impedance (ZT) = 306 kΩ resistive, receive input summing impedance (ZRX) = 300 kΩ resistive. (See Table 2 for component formulas.) 2. Overload level is defined when THD = 1%. 3. Balance return signal is the signal generated at VTX by VRX. This specification assumes that the two-wire AC load impedance matches the impedance programmed by ZT. 4. Not tested in production. This parameter is guaranteed by characterization or correlation to other tests. 5. These tests are performed with a longitudinal impedance of 90 Ω and metallic impedance of 300 Ω for frequencies below 12 kHz and 135 Ω for frequencies greater than 12 kHz. These tests are extremely sensitive to circuit board layout. 6. This parameter is tested at 1 kHz in production. Performance at other frequencies is guaranteed by characterization. 7. When the SLIC is in the Anti-sat 2 operating region, this parameter is degraded. The exact degradation depends on system design. The Anti-sat 2 region occurs at high loop resistances when VBAT – VAX – VBX is less than approximately 17V. 8. "Midpoint" is defined as the connection point between two 300 Ω series resistors connected between A(TIP) and B(RING). 9. Fundamental and harmonics from 256 kHz switch-regulator chopper are not included. 10. Loop-current limit which depends upon the programmed apparent open circuit voltage and the feed resistance is calculated as follows: In OHT state: I LIMIT = 0.5 V apparent -------------------R FEED In Active state: I LIMIT = 0.8 V apparent -------------------R FEED 11. Total harmonic distortion with metering as specified with a metering signal of 2.2 Vrms at the two-wire output, and a transmit signal of +3 dBm or receive signal of –4 dBm. The transmit or receive signals are single-frequency inputs, and the distortion is measured as the highest in-band harmonic at the two-wire or the four-wire output relative to the input signal. 12. Noise with metering is measured by applying a 2.2 Vrms metering signal (measured at the two-wire output) and measuring the psophometric noise at the two-wire and four-wire outputs over a 200 ms time interval. 13. Tested with 0 Ω source impedance. 2 MΩ is specified for system design purposes only. 14. Assumes the following ZT network: VTX RSN 153 kΩ 56 pF 15. Group delay can be considerably reduced by using a ZT network such as that shown in Note 14. The network reduces the group delay to less than 2 µs. The effect of group delay on linecard performance may be compensated for by using the QSLAC™ or DSLAC™ devices. 153 kΩ Table 1. SLIC Decoding DET Output State 0 1 2 3 4 5 6 7 C3 C2 C1 0 0 0 0 1 1 1 1 0 0 1 1 0 0 1 1 0 1 0 1 0 1 0 1 Two-Wire Status Open Circuit Ringing Active On-hook TX (OHT) Tip Open Reserved Active Polarity Reversal OHT Polarity Reversal E0 = 1* E1 = 0 Ring trip Ring trip Loop detector Loop detector Loop detector Loop detector Loop detector Loop detector E0 = 1* E1 = 1 Ring trip Ring trip Ground key Ground key — — Ground key Ground key Note: * Logic Low on E0 disables the DET output into the open-collector state. SLIC Products 11 Table 2. Z T = 510 ( Z 2WIN – 2R F ) User-Programmable Components ZT is connected between the VTX and RSN pins. The fuse resistors are RF, and Z2WIN is the desired 2-wire AC input impedance. When computing ZT, the internal current amplifier pole and any external stray capacitance between VTX and RSN must be taken into account. ZRX is connected from VRX to the RSN pin, ZT is defined above, and G42L is the desired receive gain. RDC1, RDC2, and CDC form the network connected to the RDC pin. RDC1 and RDC2 are approximately equal. ZL 1000 • ZT Z RX = ---------- • ------------------------------------------------G 42L Z T + 510 ( Z L + 2R F ) R DCI + R DC2 = 50 ( R FEED – 2R F ) R DC1 + R DC2 C DC = 1.5 ms • ------------------------------R DC1 • R DC2 365 0.5 ms R D = --------, C D = ---------------IT RD V MG K1 ( ω ) ZL • ZT Z M = -------------- • -----------------------------------------------------------------------V M2W Z T + 0.51 • K 1 ( ω ) ( 2R F + Z L ) RD and CD form the network connected from RD to –5 V and IT is the threshold current between on-hook and off-hook. ZM is connected from VMG (metering source) to the RSN pin, VM2W is the desired magnitude of the metering signal at the 2-wire output (usually 2.2 Vrms) and K1 ( ω ) is defined below. 1000 K 1 ( ω ) = -------------------------------------------------------------------------------------------------------------–9 1 + j ω ( 11.5 • 10 + CX ⁄ 2 ) ( 36 + Z L + 2R F ) where: CX = The values of the identical capacitors from A and B to GND ω = 2 π • metering frequency 12 Am79M574 Data Sheet DC FEED CHARACTERISTICS 6 4 3 5 2 1 7 VBAT = 47.3 V RDC = 40 kΩ Notes: R DC 1. Constant-resistance region: V AB = 50 – I L --------- Active state OHT state 50 2. Anti-sat–1 turn-on: V AB = 28.48 V V AB = 0.992 V BAT – 13.8 V AB = 0.44 V BAT + 15.89, V AB = 38.85 V, V BAT < 52.2 V (Anti-sat –2) V BAT ≥ 52.2 V (Anti-sat –1) 3. Anti-sat–2 turn-on: 4. Open Circuit voltage: 5. Anti-sat –1 region: R DC V AB = 38.85 – IL -----------101.3 R DC V AB = 0.44 V BAT + 15.89 – IL -----------173.9 1992 I L = ----------R DC 6. Anti-sat –2 region: 7. Current limit: a. VA–VB (VAB) Voltage vs. Loop Current (Typical) SLIC Products 13 DC FEED CHARACTERISTICS (continued) VBAT = 47.3 V RDC = 40 kΩ b. Loop Current vs. Load Resistance (Typical) A a RL b IL SLIC RSN RDC1 RDC2 B RDC CDC Feed resistance programmed by RDC1 and RDC2 c. Feed Programming 16857C-004 Figure 1. DC Feed Characteristics 14 Am79M574 Data Sheet TEST CIRCUITS A(TIP) RL 2 VL RL 2 B(RING) RSN VAB VTX RT VAB RL A(TIP) VTX RT SLIC AGND RTMG VMG SLIC AGND RRX B(RING) RSN RRX VRX IL2-4 = –20 log (VTX / VAB) IL4-2 = –20 log (VAB / VRX) BRS = 20 log (VTX / VRX) B. Four- to Two-Wire Insertion Loss and Balance Return Signal A. Two- to Four-Wire Insertion Loss RL 2 1/ωC
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