AN231E04-E2-QFNTR

AN231E04 Datasheet Rev 1.0 3rd Generation Dynamically Reconfigurable dpASP This device is RoHS compliant www.anadigm.com DS231000-U001d -1- Disclaimer Anadigm reserves the right to make any changes without further notice to any products herein. Anadigm makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does Anadigm assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including with out limitation consequential or incidental damages. "Typical" parameters can and do vary in different applications. All operating parameters, including "Typicals" must be validated for each customer application by customer's technical experts. Anadigm does not in this document convey any license under its patent rights nor the rights of others. Anadigm software and associated products cannot be used except strictly in accordance with an Anadigm software license. The terms of the appropriate Anadigm software license shall prevail over the above terms to the extent of any inconsistency. © Anadigm®, Inc. 2007 All Rights Reserved. DS231000-U001d -2- AN231E04 Datasheet – Dynamically Reconfigurable dpASP PRODUCT AND ARCHITECTURE OVERVIEW The AN231E04 device is an “Analog Signal Processor”; ideally suited to signal conditioning, filtering, gain, rectification, summing, subtracting, multiplying, etc. The device also accommodates nonlinear functions such as sensor response linearization and arbitrary waveform synthesis. The AN231E04 device consists of a 2x2 matrix of fully Configurable Analog Blocks (CABs), surrounded by programmable interconnect resources and analog input/output cells with active elements. On chip clock generator block controls multiple non-overlapping clock domains generated from an external stable clock source. Internal band-gap reference generator is used to create temperature compensated reference voltage levels. The inclusion of an 8x256 bit look-up table enables waveform synthesis and several non-linear functions. Configuration data is stored in an on-chip SRAM configuration memory. An SPI like interface is provided for simple serial load of configuration data from a microprocessor or DSP. This memory is shadowed allowing a different circuit configuration to be loaded as a background task without disrupting the current circuit functionality. The AN231E04 device features seven configurable input/output structures each can be used as input or output, 4 of the 7 have integrated differential amplifiers. There is also a single chopper stabilized amplifier that can be used by 3 of the 7 output cells. Figure 1: Architectural overview of the AN231E04 device Circuit design is enabled using Anadigmdesigner2 software, a high level block diagram based circuitry entry tool. Circuit functions are represented as CAMs (Configurable Analog Modules) these are configurable block which map onto portions of CABs. The software and a development board facilite instant prototyping of any circuit captured in the tool. With dynamic reconfigurability, the functionality of the AN231E04 can be reconfigured in-system by the designer or on-the-fly by a microprocessor. A single AN231E04 can thus be programmed to implement multiple analog functions and/or to adapt on-the-fly to your circuit requirements. PRODUCT FEATURES • • • • • • • • • • • • • Dynamic reconfiguration Seven configurable I/O cells, two dedicated output cells Fully differential architecture I/O buffering with single ended to differential conversion Low input offset through chopper stabilized amplifiers 256 Byte Look-Up Table (LUT) for linearization and arbitrary signal generation Typical Signal Bandwidth: DC-2MHz (Bandwidth is CAM dependent) Signal to Noise Ratio: o Broadband 90dB o Narrowband (audio) 120dB Total Harmonic Distortion (THD): 100dB User controlled Compensated low DC offset