P2703BAG

NIKO-SEM N-Channel Logic Level Enhancement Mode Field Effect Transistor_Preliminary P2703BAG TSOP-6 Lead-Free D PRODUCT SUMMARY V(BR)DSS 30 RDS(ON) 27mΩ ID 7A D 6 D 5 2 D S 4 3 G G S 1 D 1. GATE 2. DRAIN 3. SOURCE ABSOLUTE MAXIMUM RATINGS (TC = 25 °C Unless Otherwise Noted) PARAMETERS/TEST CONDITIONS Gate-Source Voltage Continuous Drain Current Pulsed Drain Current Power Dissipation 1 SYMBOL VGS LIMITS ±20 7 5 20 1.6 1.2 -55 to 150 275 UNITS V TC = 25 °C TC = 100 °C ID IDM A TC = 25 °C TC = 100 °C PD Tj, Tstg TL W Operating Junction & Storage Temperature Range Lead Temperature ( /16” from case for 10 sec.) THERMAL RESISTANCE RATINGS THERMAL RESISTANCE Junction-to-Case Junction-to-Ambient 1 2 1 °C SYMBOL RθJC RθJA TYPICAL MAXIMUM 30 78 UNITS °C / W Pulse width limited by maximum junction temperature. Duty cycle ≤ 1% ELECTRICAL CHARACTERISTICS (TC = 25 °C, Unless Otherwise Noted) PARAMETER SYMBOL TEST CONDITIONS STATIC Drain-Source Breakdown Voltage Gate Threshold Voltage Gate-Body Leakage Zero Gate Voltage Drain Current On-State Drain Current1 Drain-Source On-State Resistance1 Forward Transconductance1 V(BR)DSS VGS(th) IGSS IDSS ID(ON) RDS(ON) gfs VGS = 0V, ID = 250µA VDS = VGS, ID = 250µA VDS = 0V, VGS = ±20V VDS = 24V, VGS = 0V VDS = 20V, VGS = 0V, TJ = 125 °C VDS = 5V, VGS = 10V VGS = 4.5V, ID = 5A VGS = 10V, ID = 7A VDS = 5V, ID = 7A 20 32 23 14.4 40 27 30 1 1.5 3 ±100 nA 1 10 µA A mΩ S V LIMITS UNIT MIN TYP MAX 1 AUG-12-2005 NIKO-SEM N-Channel Logic Level Enhancement Mode Field Effect Transistor_Preliminary P2703BAG TSOP-6 Lead-Free DYNAMIC Input Capacitance Output Capacitance Reverse Transfer Capacitance Total Gate Charge 2 2 Ciss Coss Crss Qg Qgs Qgd 2 680 VGS = 0V, VDS = 10V, f = 1MHz 140 70 10 VDS = 15V, VGS = 10V, ID = 7A 1.7 2.1 8.0 VDS = 10V, ID ≅ 1A, VGS = 10V, RGEN = 6Ω 4.0 22.0 5.0 nS 15 nC pF Gate-Source Charge Gate-Drain Charge Rise Time2 Turn-Off Delay Time Fall Time2 2 Turn-On Delay Time td(on) tr 2 td(off) tf SOURCE-DRAIN DIODE RATINGS AND CHARACTERISTICS (TC = 25 °C) Continuous Current Forward Voltage 1 2 1 IS VSD IF = 1A, VGS = 0V 3 1.1 A V Pulse test : Pulse Width ≤ 300 µsec, Duty Cycle ≤ 2%. Independent of operating temperature. 3 Pulse width limited by maximum junction temperature. REMARK: THE PRODUCT MARKED WITH “19YWW”, DATE CODE or LOT # Orders for parts with Lead-Free plating can be placed using the PXXXXXXG parts name 6 5 4 19YWW 1 2 3 Marking Description: 1 - N MOSFET 9 - Serial Number Y - Year W - Week 2 AUG-12-2005 NIKO-SEM N-Channel Logic Level Enhancement Mode Field Effect Transistor_Preliminary P2703BAG TSOP-6 Lead-Free TYPICAL CHARACTERISTICS I ,DRAIN - SOURCE CURRENT( A ) 0 100 I S,REVERSE DRAIN CURRENT( A ) BODY DIODE FORWARD VOLTAGE VARIATION WITH SOURCE CURRENT AND TEMPERATURE VGS= 0V 10 TA = 125°C 25°C 1 0.1 0.01 -55°C 0.001 0.0001 0 0.8 1.0 1.2 0.2 0.4 0.6 VSD ,BODY DIODE FORWARD VOLTAGE( V ) 1.4 3 AUG-12-2005 NIKO-SEM N-Channel Logic Level Enhancement Mode Field Effect Transistor_Preliminary P2703BAG TSOP-6 Lead-Free 10 TRANSIENT THERMAL RESISTANCE r ( t ) ,NORMALIZED EFFECTIVE 1 T RANSIENT THERMAL RESPONSE CURVE D=0.5 10 0 0.20 0.10 -1 10 0.05 0.02 0.01 P(pk) 10 -2 Single pulse -3 t1 10 t2 10 -4 1.RθJC (t)=r(t)*R 2.R θJC = 156° C/W 3.T j + TC = P * R θJC (t) t1 4.Duty Cycle,D = t2 -4 10 10 -3 10 -2 10 10 t 1 , TIME( ms ) -1 0 10 1 10 2 10 3 4 AUG-12-2005 NIKO-SEM N-Channel Logic Level Enhancement Mode Field Effect Transistor_Preliminary P2703BAG TSOP-6 Lead-Free TSOP- 6 MECHANICAL DATA mm Dimension Min. A B C D E F G 2.5 1.5 2.7 0.7 0 0.3 0.4 Typ. 0.95 2.8 1.6 2.9 3.1 1.7 3.1 1.2 0.15 0.5 Max. H I J K L M N Dimension Min. 0.08 0.3 Typ. 0.13 Max. 0.2 0.6 mm H C B A D E G I F 5 AUG-12-2005