P3055LLG

NIKO-SEM N-Channel Logic Level Enhancement Mode Field Effect Transistor P3055LLG SOT-223 Lead-Free D PRODUCT SUMMARY V(BR)DSS 25 RDS(ON) 90mΩ ID 6A 1. GATE 2. DRAIN 3. SOURCE G S ABSOLUTE MAXIMUM RATINGS (TC = 25 °C Unless Otherwise Noted) PARAMETERS/TEST CONDITIONS Gate-Source Voltage Continuous Drain Current Pulsed Drain Current Avalanche Energy Repetitive Avalanche Energy Power Dissipation 2 1 SYMBOL VGS LIMITS ±20 6 3.6 22 60 3 3 1.5 -55 to 150 275 UNITS V TC = 25 °C TC = 100 °C ID IDM A L = 0.1mH L = 0.05mH TC = 25 °C TC = 100 °C EAS EAR PD Tj, Tstg TL mJ W Operating Junction & Storage Temperature Range Lead Temperature ( /16” from case for 10 sec.) THERMAL RESISTANCE RATINGS THERMAL RESISTANCE Junction-to-Case Junction-to-Ambient 1 2 1 °C SYMBOL RθJC RθJA TYPICAL MAXIMUM 12 42 UNITS °C / W Pulse width limited by maximum junction temperature. Duty cycle ≤ 1% ELECTRICAL CHARACTERISTICS (TC = 25 °C, Unless Otherwise Noted) PARAMETER SYMBOL TEST CONDITIONS STATIC Drain-Source Breakdown Voltage Gate Threshold Voltage Gate-Body Leakage Zero Gate Voltage Drain Current On-State Drain Current1 V(BR)DSS VGS(th) IGSS IDSS ID(ON) VGS = 0V, ID = 250µA VDS = VGS, ID = 250µA VDS = 0V, VGS = ±20V VDS = 20V, VGS = 0V VDS = 20V, VGS = 0V, TJ = 125 °C VDS = 10V, VGS = 10V 6 25 0.8 1.2 2.5 ±250 25 250 nA µA A V LIMITS UNIT MIN TYP MAX 1 NOV-05-2004 NIKO-SEM N-Channel Logic Level Enhancement Mode Field Effect Transistor P3055LLG SOT-223 Lead-Free 70 50 16 120 90 Drain-Source On-State Resistance1 Forward Transconductance1 RDS(ON) gfs VGS = 5V, ID = 3A VGS = 10V, ID = 6A VDS = 15V, ID = 6A DYNAMIC mΩ S Input Capacitance Output Capacitance Reverse Transfer Capacitance Total Gate Charge 2 Ciss Coss Crss Qg Qgs Qgd td(on) tr td(off) tf VDS = 15V, RL = 1Ω ID ≅ 10A, VGS = 10V, RGS = 2.5Ω VDS = 0.5V(BR)DSS, VGS = 10V, ID = 3A VGS = 0V, VDS = 15V, f = 1MHz 450 200 60 15 2.0 7.0 6.0 6.0 20 5.0 nS nC pF Gate-Source Charge2 Gate-Drain Charge 2 2 Turn-On Delay Time2 Rise Time Turn-Off Delay Time2 Fall Time2 SOURCE-DRAIN DIODE RATINGS AND CHARACTERISTICS (TC = 25 °C) Continuous Current Pulsed Current 3 IS ISM VSD trr IRM(REC) Qrr IF = IS, dlF/dt = 100A / µS IF = IS, VGS = 0V 30 15 0.043 6 35 1.5 A V nS A µC Forward Voltage1 Reverse Recovery Time Peak Reverse Recovery Current Reverse Recovery Charge 1 2 Pulse test : Pulse Width ≤ 300 µsec, Duty Cycle ≤ 2％. Independent of operating temperature. 3 Pulse width limited by maximum junction temperature. REMARK: THE PRODUCT MARKED WITH “P3055LLG”, DATE CODE or LOT # Orders for parts with Lead-Free plating can be placed using the PXXXXXXG parts name. 2 NOV-05-2004 NIKO-SEM N-Channel Logic Level Enhancement Mode Field Effect Transistor P3055LLG SOT-223 Lead-Free 3 NOV-05-2004 NIKO-SEM N-Channel Logic Level Enhancement Mode Field Effect Transistor P3055LLG SOT-223 Lead-Free SOT-223 MECHANICAL DATA mm Dimension Min. A B C D E F G 0.67 6.7 2.9 2.27 4.57 1.5 6.3 Typ. 0.7 7 3 2.3 4.6 1.6 6.5 Max. 0.73 7.3 3.1 2.33 4.63 1.7 6.7 H I J K L M N 0° 0.03 Dimension Min. 3.3 0.63 Typ. 3.5 0.65 0.32 Max. 3.7 0.67 0.4 10° 0.1 mm 4 NOV-05-2004