P45N03LTG

NIKO-SEM N-Channel Logic Level Enhancement Mode Field Effect Transistor P45N03LTG TO-220 Lead Free D PRODUCT SUMMARY V(BR)DSS 25 RDS(ON) 20mΩ ID 45A 1. GATE 2. DRAIN 3. SOURCE G S ABSOLUTE MAXIMUM RATINGS (TC = 25 °C Unless Otherwise Noted) PARAMETERS/TEST CONDITIONS Gate-Source Voltage Continuous Drain Current Pulsed Drain Current Avalanche Current Avalanche Energy Repetitive Avalanche Energy2 Power Dissipation L = 0.1mH L = 0.05mH TC = 25 °C TC = 100 °C Operating Junction & Storage Temperature Range Lead Temperature ( /16” from case for 10 sec.) THERMAL RESISTANCE RATINGS THERMAL RESISTANCE Junction-to-Case Junction-to-Ambient Case-to-Heatsink 1 2 1 1 SYMBOL VGS LIMITS ±20 45 28 140 20 140 5.6 65 33 -55 to 150 275 UNITS V TC = 25 °C TC = 100 °C ID IDM IAR EAS EAR PD Tj, Tstg TL A mJ W °C SYMBOL RθJC RθJA RθCS TYPICAL MAXIMUM 3 70 UNITS °C / W 0.7 Pulse width limited by maximum junction temperature. Duty cycle ≤ 1％ ELECTRICAL CHARACTERISTICS (TC = 25 °C, Unless Otherwise Noted) PARAMETER SYMBOL TEST CONDITIONS STATIC Drain-Source Breakdown Voltage Gate Threshold Voltage Gate-Body Leakage Zero Gate Voltage Drain Current V(BR)DSS VGS(th) IGSS IDSS VGS = 0V, ID = 250µA VDS = VGS, ID = 250µA VDS = 0V, VGS = ±20V VDS = 20V, VGS = 0V VDS = 20V, VGS = 0V, TJ = 125 °C 25 0.8 1.2 2.5 ±250 25 250 nA µA V LIMITS UNIT MIN TYP MAX 1 AUG-13-2004 NIKO-SEM N-Channel Logic Level Enhancement Mode Field Effect Transistor P45N03LTG TO-220 Lead Free On-State Drain Current1 Drain-Source On-State Resistance1 Forward Transconductance1 DYNAMIC Input Capacitance Output Capacitance Reverse Transfer Capacitance Total Gate Charge 2 2 ID(ON) RDS(ON) gfs VDS = 10V, VGS = 10V VGS = 7V, ID = 18A VGS = 10V, ID = 20A VDS = 15V, ID = 30A 45 20 15 16 30 28 A mΩ S Ciss Coss Crss Qg Qgs Qgd 2 600 VGS = 0V, VDS = 15V, f = 1MHz 290 100 25 VDS = 0.5V(BR)DSS, VGS = 10V, ID = 20A 2.9 7.0 7.0 VDS = 15V, RL = 1Ω ID ≅ 30A, VGS = 10V, RGS = 2.5Ω 7.0 24 6.0 nS nC pF Gate-Source Charge Gate-Drain Charge2 Turn-On Delay Time Rise Time2 td(on) tr td(off) tf Turn-Off Delay Time2 Fall Time2 SOURCE-DRAIN DIODE RATINGS AND CHARACTERISTICS (TC = 25 °C) Continuous Current Pulsed Current 3 IS ISM VSD trr IRM(REC) Qrr IF = IS, dlF/dt = 100A / µS IF = IS, VGS = 0V 37 200 0.043 45 150 1.3 A V nS A µC Forward Voltage1 Reverse Recovery Time Peak Reverse Recovery Current Reverse Recovery Charge 1 2 Pulse test : Pulse Width ≤ 300 µsec, Duty Cycle ≤ 2％. Independent of operating temperature. 3 Pulse width limited by maximum junction temperature. REMARK: THE PRODUCT MARKED WITH “P45N03LTG”, DATE CODE or LOT # Orders for parts with Lead-Free plating can be placed using the PXXXXXXG parts name. 2 AUG-13-2004 NIKO-SEM N-Channel Logic Level Enhancement Mode Field Effect Transistor P45N03LTG TO-220 Lead Free TO-220 (3-Lead) MECHANICAL DATA mm Dimension Min. A B C D E F G 28.5 14.6 8.4 0.72 9.78 2.61 Typ. 10.16 2.74 20 28.9 15.0 8.8 0.8 29.3 15.4 9.2 0.88 Max. 10.54 2.87 H I J K L M N Dimension Min. 2.4 1.19 4.4 1.14 2.3 0.26 Typ. 2.54 1.27 4.6 1.27 2.6 0.46 7° Max. 2.68 1.35 4.8 1.4 2.9 0.66 mm 3 AUG-13-2004