1ED312xMU12F (1ED-X3 Compact)
EiceDRIVER™ 1ED312xMU12F Compact
Datasheet
Single-channel 3.0 kV (rms) isolated gate driver IC with active Miller clamp or
separate output
Feature list
•
•
•
•
•
•
•
•
•
•
Single channel isolated gate driver
For use with 600 V/650 V/1200 V/1700 V/2300 V IGBTs, Si and SiC MOSFETs
Up to 14.0 A typical peak output current
40 V absolute maximum output supply voltage
High common-mode transient immunity CMTI > 200 kV/µs
Separate source and sink outputs or active Miller clamp with active shutdown and short circuit clamping
Galvanically isolated coreless transformer gate driver
3.3 V and 5 V input supply voltage
Suitable for operation at high ambient temperature and in fast switching applications
UL 1577 certification VISO = 3.0 kV (rms) for 1 min (File E311313)
Potential applications
•
•
•
•
•
•
•
AC and brushless DC motor drives
High voltage DC-DC converter and DC-AC inverter
Induction heating resonant application
UPS-systems
Commercial air-conditioning (CAC)
Server and telecom switched mode power supplies (SMPS)
Solar inverters, e.g. for 1500 V (DC) systems
PG-DSO-8
Product validation
Qualified for industrial applications according to the relevant tests of JEDEC47/20/22.
Device information
Product type
Typical output current and
configuration
UVLO
(VUVLOL2,min)
Certification
(File E311313)
Package
marking
1ED3124MU12F
14.0 A separate source and sink
10.5 V
UL
3124MU12
1ED3125MU12F
10.0 A and 3.0 A clamp
10.5 V
UL
3125MU12
1ED3127MU12F
10.0 A and 3.0 A clamp
12.0 V
UL
3127MU12
Datasheet
Please read the sections "Important notice" and "Warnings" at the end of this document
www.infineon.com/gdisolated
2.10
2022-08-09
EiceDRIVER™ 1ED312xMU12F Compact
Datasheet
Description
Description
The 1ED312xMU12F (1ED-X3 Compact) gate driver ICs are galvanically isolated single channel gate driver ICs for
IGBT, MOSFET and SiC MOSFET in PG-DSO-8 package. They provide a typical output current of up to 14.0 A on
separate source and sink pins or a typical output current of 10.0 A with an additional 3.0 A active Miller clamp.
The input logic pins operate on a wide input voltage range from 3 V to 15 V using CMOS threshold levels to
support 3.3 V microcontrollers.
Data transfer across the isolation barrier is realized by the coreless transformer technology.
All variants have logic input and driver output undervoltage lockout (UVLO), and active shutdown.
The gate drivers are certified according to UL 1577
VCC1
VCC2,H
OUT+
IN+
IN-
EiceDRIVERTM
Single channel
with separate
output
OUT-
GND1
VEE2,H
VCC1
VCC2,L
Control
OUT+
IN+
IN-
EiceDRIVERTM
Single channel
with separate
output
OUT-
GND1
Figure 1
Datasheet
VEE2,L
Typical application using separate output variant
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EiceDRIVER™ 1ED312xMU12F Compact
Datasheet
Table of contents
Table of contents
Table of contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
1
Block diagram reference . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .4
2
Related products . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
3
Pin configuration and description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
4
Functional description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
4.1
4.2
4.2.1
4.2.2
4.2.3
4.2.4
4.3
4.4
Supply . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Protection features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Undervoltage lockout (UVLO) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Active shut-down . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Short circuit clamping . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Active Miller clamp . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Non-inverting and inverting inputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .10
Driver outputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
5
5.1
5.2
5.3
5.3.1
5.3.2
5.3.3
5.3.4
5.3.5
Electrical characteristics and parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .11
Operating parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Power supply . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Logic input . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Gate driver . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Dynamic characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .14
Active shut down . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
6
6.1
Insulation characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .16
Recognized under UL 1577 (File E311313) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .16
7
Package dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .17
Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .17
Disclaimer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Datasheet
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Datasheet
1 Block diagram reference
1
Block diagram reference
UVLO
VCC1
UVLO
VCC2
VCC2
input
filter
IN+
GND1
&
active
filter
&
TX
RX
*1
Shoot
through
protection
input
filter
IN-
OUT+
OUT-
*1) pull-up resistor ensures high-level
detection with unconnected pin
GND1
Figure 2
VEE2
Block diagram separate source and sink output variants
UVLO
VCC1
UVLO
VCC2
&
OUT
input
filter
IN+
GND1
&
active
filter
TX
RX
VEE2
*1
IN-
VCC2
input
filter
2V
CLAMP
&
*1) pull-up resistor ensures high-level
detection with unconnected pin
GND1
Figure 3
Datasheet
VEE2
Block diagram output with CLAMP variants
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Datasheet
2 Related products
2
Related products
Note:
Please consider the gate driver IC power dissipation and insulation requirements for the selected
power switch and operating condition.
Product group
Product name
Description
TRENCHSTOP™
IGBT Discrete
IKQ75N120CS6
High Speed 1200 V, 75 A IGBT with anti-parallel diode in TO247-3
IKW15N120BH6
High Speed 1200 V, 15 A IGBT with anti-parallel diode in TO247
IHW40N120R5
Reverse conducting 1200 V, 40 A IH IGBT with integrated diode in
TO247
CoolSiC™ SiC
IMBF170R650M1
MOSFET Discrete
IMBG120R045M1H
™
CoolSiC SiC
MOSFET Module
TRENCHSTOP™
IGBT Modules
Table 1
1700 V, 650 mΩ SiC MOSFET in TO263-7 package
1200 V, 45 mΩ SiC MOSFET in TO263-7 package
IMZ120R350M1H
1200 V, 350 mΩ SiC MOSFET in TO247-4 package
FS45MR12W1M1_B11
EasyPACK™ 1B 1200 V / 45 mΩ sixpack module
FF23MR12W1M1_B11
EasyDUAL™ 1B 1200 V, 23 mΩ half-bridge module
FF6MR12W2M1_B11
EasyDUAL™ 2B 1200 V, 6 mΩ half-bridge module
F3L11MR12W2M1_B74
EasyPACK™ 2B 1200 V, 11 mΩ 3-Level module in Advanced NPC
(ANPC) topology
F4-23MR12W1M1_B11
EasyPACK™ 1B 1200 V, 23 mΩ fourpack module
F4-100R17N3E4
EconoPACK™ 3 1700 V, 100 A fourpack IGBT module
F4-200R17N3E4
EconoPACK™ 3 1700 V, 200 A fourpack IGBT module
FS150R17N3E4
EconoPACK™ 3 1700 V, 150 A sixpack IGBT module
FF650R17IE4
PrimePACK™ 3 1700 V, 650 A half-bridge dual IGBT module
FF1000R17IE4
PrimePACK™ 3 1700 V, 1000 A half-bridge dual IGBT module
FF1200R17IP5
PrimePACK™ 3+ 1700 V, 1200 A dual IGBT module
FF1500R17IP5
PrimePACK™ 3+ 1700 V, 1500 A dual IGBT module
FF1500R17IP5R
PrimePACK™ 3 1700 V, 1500 A dual IGBT module
FF1800R17IP5
PrimePACK™ 3+ 1700 V, 1800 A dual IGBT module
FP10R12W1T7_B11
EasyPIM™ 1B 1200 V, 10 A three phase input rectifier PIM IGBT
module
FS100R12W2T7_B11
EasyPACK™ 2B 1200 V, 100 A sixpack IGBT module
FP150R12KT4_B11
EconoPIM™ 3 1200V three-phase PIM IGBT module
FS200R12KT4R_B11
EconoPACK™ 3 1200 V, 200 A sixpack IGBT module
Evaluation boards
Part number
Description
EVAL-1ED3121MX12H
Half-bridge evaluation board for 1ED3121MU12H
EVAL-1ED3122MX12H
Half-bridge evaluation board for 1ED3122MU12H
EVAL-1ED3124MX12H
Half-bridge evaluation board for 1ED3124MU12H
Datasheet
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Datasheet
3 Pin configuration and description
3
Pin configuration and description
Pin configuration PG-DSO-8 of 1ED3124MU12F
Table 2
Pin configuration
Pin No.
Name
Function
1
VCC1
Positive logic supply
2
IN+
Non-inverted driver input (active high)
3
IN-
Inverted driver input (active low)
4
GND1
Logic ground
5
VCC2
Positive power supply output side
6
OUT+
Driver source output
7
OUT-
Driver sink output
8
VEE2
Power ground
Figure 4
1
VCC1
VEE2
8
2
IN+
OUT-
7
3
IN-
OUT+
6
4
GND1
VCC2
5
PG-DSO-8 (top view)
Pin configuration PG-DSO-8 of 1ED3125MU12F, 1ED3127MU12F
Table 3
Pin configuration
Pin No.
Name
Function
1
VCC1
Positive logic supply
2
IN+
Non-inverted driver input (active high)
3
IN-
Inverted driver input (active low)
4
GND1
Logic ground
5
VCC2
Positive power supply output side
6
OUT
Driver source and sink output
7
CLAMP
Active Miller clamp output
8
VEE2
Power ground
Datasheet
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Datasheet
3 Pin configuration and description
Figure 5
1
VCC1
VEE2
8
2
IN+
CLAMP
7
3
IN-
OUT
6
4
GND1
VCC2
5
PG-DSO-8 (top view)
Pin description
•
•
•
•
•
•
•
•
•
•
VCC1: Logic input supply voltage of 3.3 V up to 15 V wide operating range
GND1: Ground connection of input circuit.
IN+: Non-inverted control signal for driver output. An internal filter provides robustness against noise at
IN+. An internal weak pull-down resistor favors off-state.
IN-: Inverted control signal for driver output. An internal filter provides robustness against noise at IN-. An
internal weak pull-up resistor favors off-state.
VCC2: Positive power supply pin of output driving circuit. A proper blocking capacitor has to be placed close
to this supply pin.
VEE2: Reference ground of the output driving circuit. In case of a bipolar supply (positive and negative
voltage referred to IGBT emitter) this pin is connected to the negative supply voltage.
OUT+: Driver source output pin to turn on external IGBT. During on-state the driving output is switched to
VCC2. Switching of this output is controlled by IN+ and IN-. This output will also be turned off at an UVLO
event.
OUT-: Driver sink output pin to turn off external IGBT. During off-state the driving output is switched to VEE2.
Switching of this output is controlled by IN+ and IN-. In case of UVLO an active shut down keeps the output
voltage at a low level.
OUT: Combined source and sink output pin to external IGBT. The output voltage will be switched between
VCC2 and VEE2. Switching of this output is controlled by IN+ and IN-. In case of an UVLO event this output
will be switched off and an active shut down keeps the output voltage at a low level.
CLAMP: The clamp function ties its output to VEE2 during off-state. It activates as soon as the gate voltage
has dropped below 2.0 V referred to VEE2 after a turn-off command. Connect this pin directly to the IGBT
gate to avoid parasitic turn-on of the connected IGBT.
Datasheet
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Datasheet
4 Functional description
4
Functional description
The 1ED312xMU12F (1ED-X3 Compact) are general purpose IGBT gate drivers. Basic control and protection
features support fast and easy design of highly reliable systems.
The integrated galvanic isolation between control input logic and driving output stage grants additional
safety. Its input voltage supply range supports the direct connection of various signal sources like DSPs and
microcontrollers.
4.1
Supply
The driver can operate over a wide supply voltage range, either unipolar or bipolar.
10R
+3.3 V
VCC1
OUT+
100n
3R3
OUT-
SGND
GND1
IN
VCC2
IN+
IN-
Figure 6
VEE2
+15 V
4µ7
4µ7
0V
-8 V
Application example bipolar supply
With bipolar supply the driver is typically operated with a positive voltage of 15 V at VCC2 and a negative voltage
of -8 V at VEE2 relative to the emitter of the IGBT. Negative supply can help to prevent a dynamic turn on due to
the additional charge which is generated from IGBT’s input capacitance.
+3.3 V
10R
VCC1
OUT
100n
SGND
IN
Figure 7
CLAMP
GND1
IN+
VCC2
IN-
VEE2
+15 V
4µ7
Application example unipolar supply
For unipolar supply configuration the driver is typically supplied with a positive voltage of 15 V at VCC2. In this
case, careful evaluation for turn off gate resistor selection is recommended to avoid dynamic turn on. Both
supply options are usable with either output configuration separate source and sink as well as output with
active Miller clamp.
Datasheet
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Datasheet
4 Functional description
4.2
Protection features
4.2.1
Undervoltage lockout (UVLO)
IN+
VUVLOH1
VUVLOL1
VCC1
VUVLOH2
VUVLOL2
VCC2
OUT
Figure 8
UVLO behavior
To ensure correct switching of IGBTs the device is equipped with an undervoltage lockout for input and output
independently. Operation starts only after both VCC levels have increased beyond the respective VUVLOH levels.
If the power supply voltage VVCC1 of the input chip drops below VUVLOL1 a turn-off signal is sent to the output
chip before power-down. The IGBT is switched off and the signals at IN+ and IN- are ignored until VVCC1 reaches
the power-up voltage VUVLOH1 again.
If the power supply voltage VVCC2 of the output chip goes down below VUVLOL2 the IGBT is switched off and
signals from the input chip are ignored until VVCC2 reaches the power-up voltage VUVLOH2 again.
Note:
4.2.2
VVCC2 is always referred to VEE2 and does not differentiate between unipolar or bipolar supply.
Active shut-down
The active shut-down feature ensures a safe IGBT off-state in case the output chip is not connected to the
power supply or an undervoltage lockout is in effect. The IGBT gate is clamped at OUT- or CLAMP to VEE2.
4.2.3
Short circuit clamping
During short circuit the IGBTs gate voltage tends to rise because of the feedback via the Miller capacitance.
An internal protection circuit at OUT+ or CLAMP limits this voltage to a value slightly higher than the supply
voltage. A maximum current of 500 mA may be fed back to the supply through this path for 10 μs. If higher
currents are expected or tighter clamping is desired external Schottky diodes may be added.
4.2.4
Active Miller clamp
In a half bridge configuration the switched off IGBT tends to dynamically turn on during turn on phase of the
opposite IGBT. A Miller clamp allows sinking the Miller current across a low impedance path in this high dV/dt
situation. Therefore in many applications, the use of a negative supply voltage can be avoided. During turn-off,
the gate voltage is monitored and the clamp output is activated when the gate voltage drops below typical 2 V
(referred to VEE2). The clamp is designed for a Miller current in the same range as the nominal output current.
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4 Functional description
4.3
Non-inverting and inverting inputs
IN+
IN-
OUT
Figure 9
Logic input to output switching behavior
There are two possible input modes to control the IGBT. At non-inverting mode IN+ controls the driver output
while IN- is set to low. At inverting mode IN- controls the driver output while IN+ is set to high. A minimum input
pulse width is defined to filter occasional glitches.
4.4
Driver outputs
The output driver section uses MOSFETs to provide a rail-to-rail output. This feature permits that tight control
of gate voltage during on-state and short circuit can be maintained as long as the driver’s supply is stable. Due
to the low internal voltage drop, switching behavior of the IGBT is predominantly governed by the gate resistor.
Furthermore, it reduces the power to be dissipated by the driver.
Datasheet
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Datasheet
5 Electrical characteristics and parameters
5
Electrical characteristics and parameters
5.1
Absolute maximum ratings
Absolute maximum ratings are defined as ratings, which when being exceeded may lead to destruction of the
integrated circuit. Unless otherwise noted all parameters refer to GND1.
Table 4
Absolute maximum ratings
Parameter
Symbol
Values
Min.
Unit
Note or test
condition
Max.
Input to output offset voltage
VOFFSET
–
2300
V
VVEE2,max-VVEE2,min
with VVEE2,max ≥ VGND1
≥ VVEE2,min1) 2)
Power supply output side
VVCC2
-0.3
40
V
3)
Gate driver output (OUT+, OUT-, OUT, CLAMP) VOUT
VEE2 - 0.3 VCC2 + 0.3 V
3)
Power supply input side
VVCC1
-0.3
17
V
VCC1 - GND1
Logic input voltages (IN+, IN-)
VIN
-0.3
6.5
V
IN - GND1
Junction temperature
TJ
-40
150
°C
–
Storage temperature
TStg
-55
150
°C
–
Power dissipation (input side)
PD,IN
–
100
mW
TA = 65°C4)
Power dissipation (output side)
PD,OUT
–
500
mW
TA = 65°C5)
Thermal resistance junction to ambient
RthJA,OUT
ΨJtop
–
151
K/W
–
3.3
K/W
TA = 85°C 150 mil,
1s0p, PJ = 500 mW
VESD,HBM
–
4
kV
Human body model6)
ESD,CDM
–
TC 1000
–
Charged device
model7)
Characterization parameter junction to
package top input side
ESD robustness
1)
2)
3)
4)
5)
6)
7)
for functional operation only
See also Chapter 6 on page 16
With respect to VEE2
IC input-side power dissipation is derated linearly with 6.6 mW/°C above 135 °C
IC output-side power dissipation is derated linearly with 6.6 mW/°C above 74 °C
According to ANSI/ESDA/JEDEC-JS-001-2017 (discharging a 100 pF capacitor through a 1.5 kΩ series resistor).
According to ANSI/ESDA/JEDEC-JS-002-2014 (TC = test condition in volt)
Figure 10
Reference layout for thermal data (Copper thickness 35 μm)
This PCB layout represents the reference layout used for the thermal characterization of the 150 mil package.
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5 Electrical characteristics and parameters
5.2
Operating parameters
Within the operating range the IC operates as described in the functional description. Unless otherwise noted
all parameters refer to GND1.
Table 5
Electrical characteristics
Parameter
Symbol
Values
Min.
Unit
Note or test
condition
Max.
Power supply output side
VVCC2
10
35
V
1)
Power supply input side
VVCC1
3.1
15
V
–
Logic input voltages (IN+, IN-)
VIN
-0.3
5.5
V
–
Switching frequency
fSW
–
1
MHz
max PD applies
Ambient temperature
TA
-40
125
°C
–
Common mode transient immunity (CMTI)
CMTI
-200
200
kV/µs
VOFFSET,test = 1500 V
1)
With respect to VEE2
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5 Electrical characteristics and parameters
5.3
Electrical characteristics
Note:
The electrical characteristics include the spread of values in supply voltages, load and junction
temperatures given below. Typical values represent the median values at TA = 25°C. Unless otherwise
noted all voltages are given with respect to their respective GND (GND1 for pins 1 to 3 and VEE2 for
pins 5 to 7).
5.3.1
Power supply
Table 6
Power supply
Parameter
Symbol
Values
Min.
Typ.
Unit
Note or test
condition
Max.
UVLO threshold input side (on)
VUVLOH1
–
–
3.1
V
–
UVLO threshold input side (off)
VUVLOL1
2.5
–
–
V
–
UVLO hysteresis input side
VHYS1
0.1
0.2
–
V
–
UVLO threshold output side (on)
VUVLOH2,1
–
–
12.5
V
UVLO threshold output side (off)
VUVLOL2,1
10.5
–
–
V
1ED3124MU12F,
1ED3125MU12F
UVLO threshold output side (on)
VUVLOH2,2
–
–
14.2
V
UVLO threshold output side (off)
VUVLOL2,2
12.0
–
–
V
UVLO hysteresis output side
VHYS2
0.8
–
–
V
–
Quiescent current input side
IQ1
–
–
1.1
mA
static, output low
Quiescent current output side
IQ2
–
–
2
mA
Start up time
tSTART
–
2.5
20
µs
1)
UVLO detection filter time
tUVLOflt
50
–
–
ns
1)
Unit
Note or test
condition
1)
1ED3127MU12F
Parameter is not subject to production test - verified by design/characterization
5.3.2
Logic input
Table 7
Logic input
Parameter
Symbol
Values
Min.
Typ.
Max.
IN+, IN- logic low input voltage
VIN,L
–
–
1.1
V
–
IN+, IN- logic high input voltage
VIN,H
2.5
–
–
V
–
IN+, IN- low/high hysteresis
VIN,HYS
0.5
0.8
–
V
–
IN+, IN- input current
IIN
–
–
100
µA
VVCC1 = 5 V; VIN ≤ VVCC1
IN+ pull down resistor
RIN,PD
–
75
–
kΩ
to GND1
IN- pull up resistor
RIN,PU
–
75
–
kΩ
ensures high-level
detection with
unconnected pin
Datasheet
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Datasheet
5 Electrical characteristics and parameters
5.3.3
Gate driver
All gate driver output parameters valid for VCC2 = 15 V supply voltage unless specified otherwise.
Table 8
Gate driver
Parameter
Symbol
Values
Min.
Typ.
Unit
Note or test
condition
1) VCC2-OUT = 15 V,
Max.
1ED3125MU12F, 1ED3127MU12F
High level output peak current
IOUT,H
4.0
10.0
–
A
High level output on resistance
RDSON,H
0.26
0.50
0.85
Ω
IOUT,H = 0.1 A
Low level output peak current
IOUT,L
4.0
9.0
–
A
1) OUT-VEE2 = 15 V,
Low level output on resistance
RDSON,L
0.23
0.38
0.65
Ω
IOUT,L = 0.1 A
Low level clamp peak current
ICLAMP,L
2.0
3.0
–
A
1) V
Low level clamp on resistance
RDSON,CLP 0.26
0.45
0.75
Ω
IOUT,L = 0.1 A
CLAMP threshold voltage
VCLAMP
1.6
2.0
2.4
V
CLAMP-VEE2
CLAMP comparator to CLAMP
activation delay time
tCLPDLY
–
–
80
ns
1) V
High level output peak current
IOUT,H
6.0
13.5
–
A
1) VCC2-OUT+ = 15 V,
High level output on resistance
RDSON,H
0.26
0.38
0.65
Ω
IOUT,H = 0.1 A
Low level output peak current
IOUT,L
6.0
14.0
–
A
1) OUT--VEE2 = 15 V,
Low level output on resistance
RDSON,L
0.21
0.28
0.6
Ω
IOUT,L = 0.1 A
all variants
ΔVOUT,H
–
–
0.3
V
VCC2-VOUT,H; IOUT =
20 mA
–
–
0.1
V
VCC2-VOUT,H; IOUT =
20 mA
VCLP
–
–
2.0
V
Output on, IOUT =
500 mA, t < 10 µs
Output on
Output off
CLAMP = 2.0 V
CLAMP ≤ 2.0 V
1ED3124MU12F
High level output voltage
Low level output voltage
Short circuit clamp voltage
between OUT+/CLAMP and VCC2
1)
ΔVOUT,L
Output on
Output off
Parameter is not subject to production test - verified by design/characterization
5.3.4
Dynamic characteristics
Dynamic characteristics are measured with VVCC1 = 5 V and VVCC2 = 15 V.
VIN,H
IN+
VIN,L
80%
90%
OUT
10%
20%
tPDON
Figure 11
Datasheet
tPDOFF
tRISE
tFALL
Propagation delay, rise and fall time
14
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Datasheet
5 Electrical characteristics and parameters
Table 9
Filter and propagation delay characteristics (all other variants)
Parameter
Symbol
Values
Min.
Typ.
Unit
Note or test
condition
Max.
Input to output propagation
delay ON
tPDON
80
90
100
ns
CLOAD = 100 pF, IN
turn-on threshold to
10% output on
Input to output propagation
delay OFF
tPDOFF
80
90
100
ns
CLOAD = 100 pF, IN
turn-off threshold to
90% output off
Input to output propagation
delay distortion
tPDISTO
-5
0
5
ns
tPDOFF - tPDON
Input pulse suppression time
(filter time)
tINFLT
30
–
–
ns
shorter pulses will
not propagate to the
output
Minimum input pulse length
tMININ
–
–
40
ns
–
Input to output propagation
delay variation due to
temperature
tPD,T
–
–
14
ns
1)
Input to output propagation
delay distortion variation due to
temperature
tPDISTO,T
–
–
3
ns
1)
Input to output, part to part
propagation delay ON variation
|tPDon,P2P| –
–
7
ns
1) 2) C
Unit
Note or test
condition
1)
2)
LOAD = 100 pF
Parameter is not subject to production test - verified by design/characterization
Absolute value at same ambient and operating conditions.
Table 10
Dynamic output characteristics
Parameter
Symbol
Values
Min.
Typ.
Max.
Rise time
tRISE
–
–
15
ns
CLOAD = 100 pF
Fall time
tFALL
–
–
15
ns
CLOAD = 100 pF
Rise time
tRISE
–
–
30
ns
CLOAD = 1 nF
Fall time
tFALL
–
–
30
ns
CLOAD = 1 nF
Unit
Note or test
condition
5.3.5
Active shut down
Table 11
Active shut down
Parameter
Symbol
Values
Min.
Typ.
Max.
Active shut down voltage, cold
VACTSD,C
–
–
1.9
V
IOUT = 10 mA; VCC2
unsupplied; TA < 20°C
Active shut down voltage, hot
VACTSD,H
–
–
1.7
V
1) I
1)
OUT- = 10 mA; VCC2
unsupplied; TA ≥ 20°C
Parameter is not subject to production test - verified by design/characterization
Datasheet
15
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Datasheet
6 Insulation characteristics
6
Insulation characteristics
Table 12
Safety limiting values
This coupler is suitable for rated insulation only within the given safety limiting values. Compliance with the
safety limiting values shall be ensured by means of suitable protective circuits.
Description
Symbol
Characteristic
Unit
Maximum ambient safety temperature
TS
150
°C
PSI
100
mW
PSO
717
mW
Maximum input-side power dissipation at TA = 25°C1)
Maximum output-side power dissipation at TA
1)
2)
= 25°C2)
IC input-side power dissipation is derated linearly with 6.6 mW/°C above 135 °C
IC output-side power dissipation is derated linearly with 5.7 mW/°C above 25°C
Table 13
Package specific insulation characteristics
Description
Symbol
Characteristic
Unit
Minimum external clearance
CLR
>4
mm
Minimum external creepage
CPG
>4
mm
Minimum comparative tracking index
CTI
400
–
Insulation capacitance
CIO
0.9
pF
6.1
Recognized under UL 1577 (File E311313)
Table 14
Recognized under UL 1577
Description
Symbol
Characteristic
Unit
Insulation Withstand Voltage / 1 min
VISO
3000
V (rms)
Insulation Test Voltage / 1 s
VISO,TEST
3600
V (rms)
Datasheet
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Datasheet
7 Package dimensions
Package dimensions
1.25 Min.
2)
3.9±0.1
1)
4.9±0.1
+0.10
0.15-0.05
Stand off
0.33 x 45°
ax.
M
7°
0.19 ... 0.25
1.75 Max.
7
+0.55
0.7 -0.3
Seating plane
8
Coplanarity
6±0.2
5
Pin1 marking
4
1
1.27
+0.08
0.41-0.06
1) Does not include plastic or metal protrusion of 0.15 mm max. per side
2) Does not include plastic protrusion of 0.25 mm max. per side.
All dimensions are in units mm
The drawing is in compliance with ISO 128-30, Projection Method 1 [
Drawing according to ISO 8015, general tolerances ISO 2768-mK
Figure 12
]
PG-DSO-8 (Plastic (green) dual small outline package, 150 mil)
Revision history
Revision history
Reference
Description
v2.1
(2022-08-09)
Correction of thermal related parameters
Added new product variant and related electrical characteristics
v2.0
(2021-02-23)
Final datasheet based on 1ED31xxMU12H
(2021-09-01)
New version number schema: Target/Preliminary datasheet: 0.XY; Final datasheet: 1.XY
1.10
(2021-10-11)
Product variant and related electrical characteristics added, related products updated,
package marking added, package rendering updated
Datasheet
17
2.10
2022-08-09
Trademarks
All referenced product or service names and trademarks are the property of their respective owners.
Edition 2022-08-09
Published by
Infineon Technologies AG
81726 Munich, Germany
© 2022 Infineon Technologies AG
All Rights Reserved.
Do you have a question about any
aspect of this document?
Email: erratum@infineon.com
Document reference
IFX-xgd1587538263084
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