1EDCxxI12AH and 1EDCxxH12AH
EiceDRIVER™ 1EDC Compact
Single channel IGBT gate driver IC in wide body package
Features
•
•
•
•
•
•
•
•
Single channel isolated IGBT driver
For 600 V/650 V/1200 V IGBTs, MOSFETs and SiC MOSFETs
Up to 10 A typical peak current at rail-to-rail outputs
Separate source and sink outputs
Galvanically isolated coreless transformer driver
Wide input voltage operating range
Suitable for operation at high ambient temperature
Recognized under UL 1577 with an insulation test voltage of VISO = 3000 V for 1 s
Potential applications
•
•
•
•
AC and brushless DC motor drives
High voltage DC/DC-converter and DC/AC-inverter
Induction heating resonant application
UPS-systems, welding and solar
Product type
Output current configuration
Package
1EDC05I12AH
±0.5 A
PG-DSO-8-59
1EDC20H12AH
±2.0 A
PG-DSO-8-59
1EDC20I12AH
±2.0 A
PG-DSO-8-59
1EDC40I12AH
±4.0 A
PG-DSO-8-59
1EDC60H12AH
±6.0 A
PG-DSO-8-59
1EDC60I12AH
±6.0 A
PG-DSO-8-59
Product validation
Qualified for industrial applications according to the relevant tests of JEDEC47/20/22.
Datasheet
Please read the Important Notice and Warnings at the end of this document
www.infineon.com/eicedriver
2.0
2017-07-17
EiceDRIVER™ 1EDC Compact
Single channel IGBT gate driver IC in wide body package
Description
Description
The 1EDCxxI12AH and 1EDCxxH12AH are galvanically isolated single channel IGBT driver in a PG-DSO-8-59
package that provide output currents up to 10 A at separated output pins.
The input logic pins operate on a wide input voltage range from 3 V to 15 V using scaled CMOS threshold levels
to support even 3.3 V microcontrollers.
Data transfer across the isolation barrier is realized by the coreless transformer technology.
Every driver family member comes with logic input and driver output undervoltage lockout (UVLO) and active
shutdown.
VCC1
VCC2,H
OUT+
IN+
IN-
EiceDRIVERTM
Single channel
with separate
output
OUT-
GND1
GND2,H
VCC1
VCC2,L
Control
OUT+
IN+
IN-
EiceDRIVERTM
Single channel
with separate
output
OUT-
GND1
Figure 1
Datasheet
GND2,L
Typical application
2
2.0
2017-07-17
EiceDRIVER™ 1EDC Compact
Single channel IGBT gate driver IC in wide body package
Table of contents
Table of contents
Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Table of contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
1
Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
2
Pin configuration and functionality . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5
2.1
Pin configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
2.2
Pin functionality . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5
3
3.1
3.2
3.3
3.3.1
3.3.2
3.3.3
3.4
3.5
Functional description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Supply . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Protection features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Undervoltage lockout (UVLO) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Active shut-down . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Short circuit clamping . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .8
Non-inverting and inverting inputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Driver outputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .9
4
4.1
4.2
4.3
4.3.1
4.3.2
4.3.3
4.3.4
4.3.5
4.3.6
Electrical parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Operating parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Voltage supply . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .11
Logic input . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Gate driver . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Short circuit clamping . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .14
Dynamic characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Active shut down . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
5
Recognized under UL 1577 (File E311313) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
6
Package outline . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
7
7.1
7.2
Application notes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .17
Reference layout for thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Printed circuit board guidelines . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .17
Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Trademarks . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Datasheet
3
2.0
2017-07-17
EiceDRIVER™ 1EDC Compact
Single channel IGBT gate driver IC in wide body package
Block diagram
1
Block diagram
VCC1
1
8
OUT-
7
OUT+
&
UVLO
GND2
IN+
2
input
filter
GND1
Shoot
through
protection
&
active
filter
TX
VCC2
RX
VCC1
IN-
GND1
Figure 2
Datasheet
3
input
filter
UVLO
4
6
5
VCC2
GND2
Block diagram
4
2.0
2017-07-17
EiceDRIVER™ 1EDC Compact
Single channel IGBT gate driver IC in wide body package
Pin configuration and functionality
2
Pin configuration and functionality
2.1
Pin configuration
Table 1
Pin configuration
Pin No.
Name
Function
1
VCC1
Positive logic supply
2
IN+
Non-inverted driver input (active high)
3
IN-
Inverted driver input (active low)
4
GND1
Logic ground
5
GND2
Power ground
6
VCC2
Positive power supply output side
7
OUT+
Driver source output
8
OUT-
Driver sink output
Figure 3
2.2
1
VCC1
OUT-
8
2
IN+
OUT+
7
3
IN-
VCC2
6
4
GND1
GND2
5
PG-DSO-8-59 (top view)
Pin functionality
VCC1
Logic input supply voltage of 3.3 V up to 15 V wide operating range.
IN+ non inverting driver input
IN+ non-inverted control signal for driver output if IN- is set to low. (Output sourcing active at IN+ = high and
IN- = low)
Due to internal filtering a minimum pulse width is defined to ensure robustness against noise at IN+. An internal
weak pull-down-resistor favors off-state.
IN- inverting driver input
IN- inverted control signal for driver output if IN+ is set to high. (Output sourcing active at IN- = low and
IN+ = high)
Due to internal filtering a minimum pulse width is defined to ensure robustness against noise at IN-. An internal
weak pull-up-resistor favors off-state.
Datasheet
5
2.0
2017-07-17
EiceDRIVER™ 1EDC Compact
Single channel IGBT gate driver IC in wide body package
Pin configuration and functionality
GND1
Ground connection of input circuit.
GND2 reference ground
Reference ground of the output driving circuit.
In case of a bipolar supply (positive and negative voltage referred to IGBT emitter) this pin is connected to the
negative supply voltage.
VCC2
Positive power supply pin of output driving circuit. A proper blocking capacitor has to be placed close to this
supply pin.
OUT+ driver source output
Driver source output pin to turn on external IGBT. During on-state the driving output is switched to VCC2.
Switching of this output is controlled by IN+ and IN-. This output will also be turned off at an UVLO event.
During turn off the OUT+ terminal is able to sink approx. 100 mA. In case of an unconnected OUT- the complete
gate charge is discharged through this channel resulting in a slow turn off.
OUT- driver sink output
Driver sink output pin to turn off external IGBT. During off-state the driving output is switched to GND2.
Switching of this output is controlled by IN+ and IN-. In case of UVLO an active shut down keeps the output
voltage at a low level.
Datasheet
6
2.0
2017-07-17
EiceDRIVER™ 1EDC Compact
Single channel IGBT gate driver IC in wide body package
Functional description
3
Functional description
3.1
Introduction
The 1EDIxxI12AH and 1EDIxxH12AH are general purpose IGBT gate drivers. Basic control and protection features
support fast and easy design of highly reliable systems.
The integrated galvanic isolation between control input logic and driving output stage grants additional safety.
Its wide input voltage supply range supports the direct connection of various signal sources like DSPs and
microcontrollers.
The separated rail-to-rail driver outputs simplify gate resistor selection, save an external high current bypass
diode and enhance dV/dt control.
3.2
Supply
The driver can operate over a wide supply voltage range, either unipolar or bipolar.
+5V
VCC1
+15V
VCC2
1µ
100n
10R
SGND
GND1
IN
Figure 4
OUT+
3R3
IN+
OUT-
IN-
GND2
1µ
-8V
0V
Application example bipolar supply
With bipolar supply the driver is typically operated with a positive voltage of 15 V at VCC2 and a negative voltage
of -8 V at GND2 relative to the emitter of the IGBT. Negative supply can help to prevent a dynamic turn on due to
the additional charge which is generated from IGBT’s input capacitance.
+5V
VCC1
VCC2
SGND
IN
Figure 5
+15V
1µ
10R
100n
OUT+
GND1
3R3
IN+
OUT-
IN-
GND2
Application example unipolar supply
For unipolar supply configuration the driver is typically supplied with a positive voltage of 15 V at VCC2. In this
case, careful evaluation for turn off gate resistor selection is recommended to avoid dynamic turn on.
Datasheet
7
2.0
2017-07-17
EiceDRIVER™ 1EDC Compact
Single channel IGBT gate driver IC in wide body package
Functional description
3.3
Protection features
3.3.1
Undervoltage lockout (UVLO)
IN+
VUVLOH1
VUVLOL1
VCC1
VUVLOH2
VUVLOL2
VCC2
OUT
Figure 6
UVLO behavior
To ensure correct switching of IGBTs the device is equipped with an undervoltage lockout for input and output
independently. Operation starts only after both VCC levels have increased beyond the respective VUVLOH levels.
If the power supply voltage VVCC1 of the input chip drops below VUVLOL1 a turn-off signal is sent to the output chip
before power-down. The IGBT is switched off and the signals at IN+ and IN- are ignored until VVCC1 reaches the
power-up voltage VUVLOH1 again.
If the power supply voltage VVCC2 of the output chip goes down below VUVLOL2 the IGBT is switched off and
signals from the input chip are ignored until VVCC2 reaches the power-up voltage VUVLOH2 again.
Note:
3.3.2
VVCC2 is always referred to GND2 and does not differentiate between unipolar or bipolar supply.
Active shut-down
The active shut-down feature ensures a safe IGBT off-state in case the output chip is not connected to the power
supply or an undervoltage lockout is in effect. The IGBT gate is clamped at OUT- to GND2.
3.3.3
Short circuit clamping
During short circuit the IGBT’s gate voltage tends to rise because of the feedback via the Miller capacitance. An
additional protection circuit connected to OUT+ limits this voltage to a value slightly higher than the supply
voltage. A maximum current of 500 mA may be fed back to the supply through this path for 10 μs. If higher
currents are expected or tighter clamping is desired external Schottky diodes may be added.
Datasheet
8
2.0
2017-07-17
EiceDRIVER™ 1EDC Compact
Single channel IGBT gate driver IC in wide body package
Functional description
3.4
Non-inverting and inverting inputs
IN+
IN-
OUT
Figure 7
Logic input to output switching behavior
There are two possible input modes to control the IGBT. At non-inverting mode IN+ controls the driver output
while IN- is set to low. At inverting mode IN- controls the driver output while IN+ is set to high. A minimum input
pulse width is defined to filter occasional glitches.
3.5
Driver outputs
The output driver section uses MOSFETs to provide a rail-to-rail output. This feature permits that tight control of
gate voltage during on-state and short circuit can be maintained as long as the driver’s supply is stable. Due to
the low internal voltage drop, switching behavior of the IGBT is predominantly governed by the gate resistor.
Furthermore, it reduces the power to be dissipated by the driver.
Datasheet
9
2.0
2017-07-17
EiceDRIVER™ 1EDC Compact
Single channel IGBT gate driver IC in wide body package
Electrical parameters
4
Electrical parameters
4.1
Absolute maximum ratings
Note:
Absolute maximum ratings are defined as ratings, which when being exceeded may lead to
destruction of the integrated circuit. Unless otherwise noted all parameters refer to GND1.
Table 2
Absolute maximum ratings
Parameter
Symbol
Values
Min.
Max.
40
Unit
Note /
Test Condition
Power supply output side
VVCC2
-0.3
V
1)
Gate driver output
VOUT
VGND2-0.3 VVCC2+0.3 V
1)
Positive power supply input side
VVCC1
-0.3
18.0
V
–
Logic input voltages (IN+,IN-)
VLogicIN
-0.3
18.0
V
–
Input to output isolation voltage (GND2)
VGND2
-1200
1200
V
GND2 - GND1
Junction temperature
TJ
-40
150
°C
–
Storage temperature
TS
-55
150
°C
–
Comparative tracking index
CTI
400
–
Power dissipation (Input side)
PD, IN
–
25
mW
2) @T
Power dissipation (Output side)
PD, OUT
–
400
mW
2) @T
Thermal resistance (Input side)
RTHJA,IN
–
145
K/W
2) @T
Thermal resistance (Output side)
RTHJA,OUT –
165
K/W
2) @T
ESD capability
VESD,HBM
–
2
kV
Human body model3)
VESD,CDM
–
1
kV
Charged device
model4)
1
2
3
4
IEC 60601-1: Material
group II
A = 25°C
A = 25°C
A = 85°C
A = 85°C
With respect to GND2.
See Figure 11 for reference layouts for these thermal data. Thermal performance may change significantly
with layout and heat dissipation of components in close proximity.
According to EIA/JESD22-A114-C (discharging a 100 pF capacitor through a 1.5 kΩ series resistor).
According to EIA/JESD22-C101 (specified waveform characteristics)
Datasheet
10
2.0
2017-07-17
EiceDRIVER™ 1EDC Compact
Single channel IGBT gate driver IC in wide body package
Electrical parameters
4.2
Operating parameters
Note:
Within the operating range the IC operates as described in the functional description. Unless
otherwise noted all parameters refer to GND1.
Table 3
Operating parameters
Parameter
Symbol
Values
Min.
Max.
Unit
Note /
Test Condition
Power supply output side
VVCC2
13
35
V
5)
Power supply input side
VVCC1
3.1
17
V
–
Logic input voltages (IN+,IN-)
VLogicIN
-0.3
17
V
–
Switching frequency
fsw
–
1.0
MHz
6)7)
Ambient temperature
TA
-40
125
°C
–
Thermal coefficient, junction-top
Ψth,jt
–
4.8
K/W
7) at T = 85°C
A
Common mode transient immunity (CMTI)
|dVISO/dt| –
100
kV/μs
7) at 1000 V
4.3
Electrical characteristics
Note:
4.3.1
Table 4
The electrical characteristics include the spread of values in supply voltages, load and junction
temperatures given below. Typical values represent the median values at TA = 25°C. Unless otherwise
noted all voltages are given with respect to their respective GND (GND1 for pins 1 to 3, GND2 for pins 6
to 8).
Voltage supply
Voltage supply
Parameter
Symbol
Values
Min.
UVLO threshold input chip
UVLO hysteresis input chip
(VUVLOH1 - VUVLOL1)
5
7
8
Note or Test
Condition
Max.
VUVLOH1
–
2.85
3.1
V
–
VUVLOL1
2.55
2.75
–
V
–
VHYS1
0.09
0.1
–
V
–
–
12.0
12.7
V
8)
10.5
11.1
–
V
8)
UVLO threshold output chip (IGBT VUVLOH2
supply)
VUVLOL2
6
Typ.
Unit
With respect to GND2.
do not exceed max. power dissipation
Parameter is not subject to production test - verified by design/characterization
With respect to GND2.
Datasheet
11
2.0
2017-07-17
EiceDRIVER™ 1EDC Compact
Single channel IGBT gate driver IC in wide body package
Electrical parameters
Table 4
Voltage supply (continued)
Parameter
Symbol
Values
Min.
Typ.
Unit
Note or Test
Condition
Max.
UVLO hysteresis output chip
(VUVLOH2 - VUVLOL2)
VHYS2
0.7
0.85
–
V
–
Quiescent current input chip
IQ1
–
0.65
1.0
mA
VVCC1 = 5 V
IN+ = High, IN- = Low
=>OUT = High
Quiescent current output chip
IQ2
–
1.2
2.0
mA
VVCC2 = 15 V
IN+ = High, IN- = Low
=>OUT = High
4.3.2
Logic input
VIN+L ,VIN-L
VIN+H ,VIN-H
0.7×15V
np
hI
10
u
e,
ag
olt
V
t
n
mi
ig
-H
,IN
+
IN
5
VVCC1,max
UVLO
No driver
operation
0.3×15V
,m
tage
0.7×5V
IN+,
0.7×3.3V
ow
IN- L
t Vol
Inpu
ax
0.3×5V
0.3×3.3V
3.3
Figure 8
15
10
5
VVCC1
VCC1 scaled input threshold voltage of IN+ and IN-
Beginning from the input undervoltage lockout level, threshold levels for IN+ and IN- are scaled to VVCC1. The
high input threshold is 70% of VVCC1 and the low input threshold is at 30% of VVCC1.
Table 5
Logic input
Parameter
Symbol
Values
Min.
Unit
Typ.
Max.
IN+,IN- low input voltage
VIN+L,
VIN-L
–
–
0.3 ×
VVCC1
IN+,IN- high input voltage
VIN+H,
VIN-H
0.7 ×
VVCC1
–
–
9
Note or Test
Condition
9)3.1 V ≤ V
VCC1 ≤ 17 V
Parameter is not subject to production test - verified by design/characterization
Datasheet
12
2.0
2017-07-17
EiceDRIVER™ 1EDC Compact
Single channel IGBT gate driver IC in wide body package
Electrical parameters
Table 5
Logic input (continued)
Parameter
Symbol
Values
Min.
Typ.
Unit
Note or Test
Condition
VVCC1 = 5.0 V
Max.
IN+,IN- low input voltage
VIN+L,
VIN-L
–
–
1.5
V
IN+,IN- high input voltage
VIN+H,
VIN-H
3.5
–
–
V
IN- input current
IIN-
–
70
200
μA
VVCC1 = 5.0 V, VIN- =
GND1
IN+ input current
IIN+
–
70
200
μA
VVCC1 = 5.0 V, VIN+ =
VVCC1
Unit
Note or Test
Condition
A
10)IN+ = High,
4.3.3
Gate driver
Note:
minimum Peak current rating valid over temperature range!
Table 6
Gate driver
Parameter
Symbol
Values
Min.
High level output peak current
(source)
1EDC05I12AH
1EDC20I12AH
1EDC20H12AH
1EDC40I12AH
1EDC60I12AH
1EDC60H12AH
IOUT+,PEAK
Low level output peak current
(sink)
1EDC05I12AH
1EDC20I12AH
1EDC20H12AH
1EDC40I12AH
1EDC60I12AH
1EDC60H12AH
IOUT-,PEAK
10
Typ.
Max.
–
0.5
2.0
2.0
4.0
6.0
6.0
IN- = Low,
VVCC2 = 15 V
1.3
4.0
4.0
7.5
10.0
10.0
–
0.5
2.0
2.0
4.0
6.0
6.0
0.9
3.5
3.5
6.8
9.4
9.4
A
10)IN+ = Low,
IN- = Low,
VVCC2 = 15 V
specified min. output current is forced; voltage across the device V(VCC2 - OUT+) or V(OUT- - GND2) < VVCC2.
Datasheet
13
2.0
2017-07-17
EiceDRIVER™ 1EDC Compact
Single channel IGBT gate driver IC in wide body package
Electrical parameters
4.3.4
Table 7
Short circuit clamping
Short circuit clamping
Parameter
Symbol
Values
Min.
Clamping voltage (OUT+)
(VOUT+ - VVCC2)
4.3.5
VCLPout
Typ.
–
0.9
Unit
Note or Test
Condition
V
11)IN+ = High, IN- =
Max.
1.3
Low,
OUT = High
IOUT = 500 mA,
(pulse test tCLPmax =
10 μs)
Dynamic characteristics
Dynamic characteristics are measured with VVCC1 = 5 V and VVCC2 = 15 V.
50%
IN+
80%
50%
20%
OUT
TPDON
Figure 9
Propagation delay, rise and fall time
Table 8
Dynamic characteristics
Parameter
TRISE
TPDOFF
Symbol
Values
Min.
Typ.
TFALL
Unit
Note or Test
Condition
CLOAD = 100 pF
VIN+ = 50%,
VOUT=50% @25°C
1EDC05I12AH,
1EDC20I12AH,
1EDC40I12AH,
1EDC60I12AH
Max.
Input IN to output propagation
delay ON
TPDON
270
300
330
ns
Input IN to output propagation
delay OFF
TPDOFF
270
300
330
ns
Input IN to output propagation
delay distortion (TPDOFF - TPDON)
TPDISTO
-30
5
40
ns
Input pulse suppression time IN+, TMININ+,
INTMININ-
230
240
–
ns
11
With respect to GND2.
Datasheet
14
2.0
2017-07-17
EiceDRIVER™ 1EDC Compact
Single channel IGBT gate driver IC in wide body package
Recognized under UL 1577 (File E311313)
Table 8
Dynamic characteristics (continued)
Parameter
Symbol
Values
Min.
Typ.
Unit
Note or Test
Condition
CLOAD = 100 pF
VIN+ = 50%,
VOUT=50% @25°C
1EDC20H12AH,
1EDC60H12AH
Max.
Input IN to output propagation
delay ON
TPDON
95
120
142
ns
Input IN to output propagation
delay OFF
TPDOFF
105
125
150
ns
Input IN to output propagation
delay distortion (TPDOFF - TPDON)
TPDISTO
-35
-5
25
ns
Input Pulse Suppressiontime IN+, TMININ+,
INTMININ-
30
40
–
ns
Input IN to output propagation
delay ON variation due to temp
TPDONt
–
–
14
ns
12)C
Input IN to output propagation
delay OFF variation due to temp
TPDONt
–
–
14
ns
VIN+ = 50%,
VOUT=50%
Input IN to output propagation
delay distortion variation due to
temp (TPDOFF-TPDON)
TPDISTOt
–
–
8
ns
Rise time
TRISE
5
10
20
ns
Fall time
TFALL
4
9
19
ns
4.3.6
Table 9
LOAD = 100 pF
CLOAD = 1 nF
VL20%, VH 80%
Active shut down
Active shut down
Parameter
Symbol
Values
Min.
Active shut down voltage
VACTSD
Typ.
–
2.0
Unit
Note or Test
Condition
V
13)I
Max.
2.3
OUT-/IOUT-,PEAK=0.1,
VCC2 open
5
Recognized under UL 1577 (File E311313)
Table 10
Recognized under UL 1577
Description
Symbol
Characteristic
Unit
Insulation Withstand Voltage / 1 min
VISO
2500
Vrms
Insulation Test Voltage / 1 s
VISO
3000
Vrms
12
13
Parameter is not subject to production test - verified by design/characterization
With respect to GND2.
Datasheet
15
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EiceDRIVER™ 1EDC Compact
Single channel IGBT gate driver IC in wide body package
Package outline
6
Package outline
DOCUMENT NO.
Z8B00179262
A
A1
A2
b
c
D
E
E1
e
N
L
L2
h
MILLIMETERS
MIN
MAX
2.65
0.10
0.20
2.25
2.45
0.30
0.50
0.23
0.32
6.20
6.40
10.00
10.60
7.40
7.60
1.27 BSC
8
0.50
0.90
0.25 BSC
0.25
0.45
ccc
ddd
0.10
0.25
DIM
Figure 10
Datasheet
INCHES
MIN
0.004
0.089
0.012
0.009
0.244
0.394
0.291
SCALE
MAX
0.104
0.008
0.096
0.020
0.013
0.252
0.417
0.299
0
2
0
2
4mm
EUROPEAN PROJECTION
0.050 BSC
8
0.020
0.035
0.010 BSC
0.010
0.018
0.004
0.010
ISSUE DATE
05.11.2015
REVISION
01
PG-DSO-8-59 (Plastic (green) dual small outline package)
16
2.0
2017-07-17
EiceDRIVER™ 1EDC Compact
Single channel IGBT gate driver IC in wide body package
Application notes
7
Application notes
7.1
Reference layout for thermal data
Figure 11
Reference layout for fhermal data (Copper thickness 35 μm)
This PCB layout represents the reference layout used for the thermal characterization.
Pin 4 (GND1) and pin 5 (GND2) require each a ground plane of 100 mm² for achieving maximum power
dissipation. The package is built to dissipate most of the heat generated through these pins.
The thermal coefficient junction-top (Ψth,jt) can be used to calculate the junction temperature at a given top
case temperature and driver power dissipation:
T j = Ψth,jt ⋅ PD + T top
7.2
Printed circuit board guidelines
The following factors should be taken into account for an optimum PCB layout.
•
Sufficient spacing should be kept between high voltage isolated side and low voltage side circuits.
•
The same minimum distance between two adjacent high-side isolated parts of the PCB should be
maintained to increase the effective isolation and to reduce parasitic coupling.
•
In order to ensure low supply ripple and clean switching signals, bypass capacitor trace lengths should be
kept as short as possible.
Revision history
Document
version
Date of
release
Description of changes
2.0
2017-07-17
•
UL file number added
1.0
2017-03-28
•
Comparative tracking index added
0.5
2016-10-04
•
initial version
Datasheet
17
2.0
2017-07-17
Trademarks
All referenced product or service names and trademarks are the property of their respective owners.
Edition 2017-07-17
Published by
Infineon Technologies AG
81726 Munich, Germany
© 2017 Infineon Technologies AG
All Rights Reserved.
Do you have a question about any
aspect of this document?
Email: erratum@infineon.com
Document reference
IFX-acq1467706781217
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