2N7002L6327HTSA1

2N7002 OptiMOS™ Small-Signal-Transistor Product Summary Features 60 V VGS=10 V 3 Ω VGS=4.5 V 4 VDS • N-channel RDS(on),max • Enhancement mode • Logic level • Avalanche rated 0.3 ID • fast switching A PG-SOT23 • Pb-free lead-plating; RoHS compliant 3 • Halogen-free according to IEC61249-2-21 1 2 Type Package Tape and Reel Information Marking HalogenFree Packing 2N7002 PG-SOT-23 H6327: 3000 pcs/reel 72s Yes Non Dry Parameter Symbol Conditions Continuous drain current ID V l Value T A=25 °C 0.30 T A=70 °C 0.24 Pulsed drain current I D,pulse T A=25 °C 1.2 Avalanche energy, single pulse E AS I D=0.3 A, R GS=25 Ω 1.3 Reverse diode dv /dt dv /dt I D=0.3 A, V DS=48 V, di /dt =200 A/µs, T j,max=150 °C 6 Gate source voltage V GS ESD class ±20 JESD22-A114 (HBM) Power dissipation P tot (2) Operating and storage temperature T j, T stg T A=25 °C IEC climatic category; DIN IEC 68-1 (1) Unit A mJ kV/µs V class 0 (2|I D|R DS(on)max, I D=0.24 A 0.2 0.36 - Transconductance g fs S (2) Perfomed on a 40x40mm 2 FR4 PCB with both sided Cu sense-force traces, each 1mm wide, 70 μm thick and 20mm long. Rev. 2.4 page 2 2012-09-04 2N7002 Parameter Values Symbol Conditions Unit min. typ. max. - 13 20 - 4.1 6 Dynamic characteristics pF Input capacitance C iss Output capacitance C oss Reverse transfer capacitance Crss - 2.0 3 Turn-on delay time t d(on) - 3.0 4.5 Rise time tr - 3.3 5 Turn-off delay time t d(off) - 5.5 9 Fall time tf - 3.1 5 Gate to source charge Q gs - 0.05 0.1 Gate to drain charge Q gd - 0.2 0.4 Gate charge total Qg - 0.4 0.6 Gate plateau voltage V plateau - 4.0 - V - - 0.3 A - - 1.2 - 0.96 1.2 V - 8.5 13 ns - 2.4 4 nC V GS=0 V, V DS=25 V, f =1 MHz V DD=30 V, V GS=10 V, I D=0.5 A, R G=6 Ω ns Gate Charge Characteristics V DD=48 V, I D=0.5 A, V GS=0 to 10 V nC Reverse Diode Diode continous forward current IS Diode pulse current I S,pulse Diode forward voltage V SD Reverse recovery time t rr Reverse recovery charge Q rr Rev. 2.4 T A=25 °C V GS=0 V, I F=0.5 A, T j=25 °C V R=30 V, I F=0.5 A, di F/dt =100 A/µs page 3 2012-09-04 2N7002 1 Power dissipation 2 Drain current P tot=f(T A) I D=f(T A); V GS≥10 V 0.35 0.5 0.3 0.25 0.2 0.3 ID [A] Ptot [W] 0.4 0.15 0.2 0.1 0.1 0.05 0 0 0 40 80 120 0 160 40 80 TA [°C] 120 160 TA [°C] 3 Safe operating area 4 Max. transient thermal impedance I D=f(V DS); T A=25 °C; D =0 Z thJA=f(t p) parameter: t p parameter: D =t p/T 101 103 limited by on-state resistance 1 µs 100 0.5 10 µs 102 0.2 ZthJA [K/W] ID [A] 100 µs 1 ms 10-1 10 ms 0.1 0.02 101 single pulse 0.01 DC 10-2 10-3 100 1 10 100 VDS [V] Rev. 2.4 0.05 10-5 10-4 10-3 10-2 10-1 100 101 102 103 tp [s] page 4 2012-09-04 2N7002 5 Typ. output characteristics 6 Typ. drain-source on resistance I D=f(V DS); T j=25 °C R DS(on)=f(I D); T j=25 °C parameter: V GS parameter: V GS 6 0.6 5V 10 V 0.5 3.2 V 2.9 V 7V 4V 3.5 V 5 4.5 V 4V 4 RDS(on) [Ω] ID [A] 0.4 0.3 3.5 V 3 4.5 V 2 0.2 5V 7V 10 V 3.2 V 1 0.1 2.9 V 0 0 0 1 2 3 4 0 5 0.1 0.2 VDS [V] 0.3 0.4 0.5 ID [A] 7 Typ. transfer characteristics 8 Typ. forward transconductance I D=f(V GS); |V DS|>2|I D|R DS(on)max g fs=f(I D); T j=25 °C 0.6 0.5 0.45 0.5 0.4 0.35 0.4 gfs [S] ID [A] 0.3 0.3 0.25 0.2 0.2 0.15 0.1 0.1 0.05 0 0 0 1 2 3 4 5 VGS [V] Rev. 2.4 0.0 0.1 0.2 0.3 0.4 0.5 ID [A] page 5 2012-09-04 2N7002 9 Drain-source on-state resistance 10 Typ. gate threshold voltage R DS(on)=f(T j); I D=0.3 A; V GS=10 V V GS(th)=f(T j); V DS=VGS; I D=250 µA parameter: I D 6.0 3.2 2.8 5.0 98 % 2.4 4.0 VGS(th) [V] RDS(on) [Ω] 2 98 % 3.0 typ 1.6 2% 1.2 2.0 typ 0.8 1.0 0.4 0.0 0 -60 -20 20 60 100 140 -60 -20 20 Tj [°C] 60 100 140 Tj [°C] 11 Typ. capacitances 12 Forward characteristics of reverse diode C =f(V DS); V GS=0 V; f =1 MHz; Tj=25°C I F=f(V SD) parameter: T j 102 101 100 150 °C, 98% 25 °C 25 °C, 98% Ciss IF [A] C [pF] 150 °C 101 10-1 Coss 10-2 Crss 100 0 10 20 30 VDS [V] Rev. 2.4 10-3 0 0.4 0.8 1.2 1.6 VSD [V] page 6 2012-09-04 2N7002 13 Avalanche characteristics 14 Typ. gate charge I AS =f(t AV ); R GS =25 Ω V GS=f(Q gate); I D=0.5 A pulsed parameter: T j(start) parameter: V DD 100 10 9 8 25 °C 30 V 100 °C 7 125 °C 10-1 12 V IAV [A] VGS [V] 6 48 V 5 4 10-2 3 2 1 10-3 0 100 101 102 103 tAV [µs] 0 0.1 0.2 0.3 0.4 0.5 Qgate [nC] 15 Drain-source breakdown voltage V BR(DSS)=f(T j); I D=250 µA 70 VBR(DSS) [V] 65 60 55 50 -40 0 40 80 120 160 Tj [°C] Rev. 2.4 page 7 2012-09-04 2N7002 Package Outline: Footprint: Packing: Dimensions in mm Rev. 2.4 page 8 2012-09-04 2N7002 Published by Infineon Technologies AG 81726 Munich, Germany © 2008 Infineon Technologies AG All Rights Reserved. Legal Disclaimer The information given in this document shall in no event be regarded as a guarantee of conditions or characteristics. With respect to any examples or hints given herein, any typical values stated herein and/or any information regarding the application of the device, Infineon Technologies hereby disclaims any and all warranties and liabilities of any kind, including without limitation, warranties of non-infringement of intellectual property rights of any third party. Information For further information on technology, delivery terms and conditions and prices, please contact the nearest Infineon Technologies Office (www.infineon.com). Warnings Due to technical requirements, components may contain dangerous substances. For information on the types in question, please contact the nearest Infineon Technologies Office. Infineon Technologies components may be used in life-support devices or systems only with the express written approval of Infineon Technologies, if a failure of such components can reasonably be expected to cause the failure of that life-support device or system or to affect the safety or effectiveness of that device or system. Life support devices or systems are intended to be implanted in the human body or to support and/or maintain and sustain and/or protect human life. If they fail, it is reasonable to assume that the health of the user or other persons may be endangered. Rev. 2.4 page 9 2012-09-04