ASP1212-N20NT

Digital Multi-Phase Buck Controller FEATURES DESCRIPTION  Intel VR11.x compliant Digital PWM Controller  Programmable 1-phase to 8-phase operation  Customized Digital Over-Clocking features an easy-to-use SMBus Gamer command and a Gamer VID control up to 2.3V, Gamer Vmax, VID Override or Track, Digital Load-Line Adjust, Gamer OC/OVP, Gamer OFF pin and Gamer OTP  IR Efficiency Shaping features a Variable Gate Drive and Dynamic Phase Control  1-phase to 4-phase PSI for Light Loads  Adaptive Transient Algorithm minimizes capacitors  Designed for use with coupled inductors  Enables Thermal Phase Balancing  SMBus Fault Indicators: OVP, UVP, OCP, OTP  SMBus interface for configuring and monitoring; SMBus commands include monitoring input current and power  Compatible with IR ATL Drivers and tri-state Drivers  9 bytes of NVM storage available for customer use  +3.3V supply voltage; 0ºC to 85ºC Ambient operation APPLICATIONS  Intel® VR11.x CPU VRD and VRM; DDR Memory  High Performance Desktops and Servers  Over-clocking and High-Efficiency Application BASIC APPLICATION PowIR Stage 8 ISEN8 IRTN8 Figure 1: ASP1212 Basic Application Circuit 1 December 16, 2012 | FINAL | V1.06 ISEN7 IRTN7 ISEN6 IRTN6 ISEN5 ISEN4 IRTN5 ISEN3 IRTN4 IRTN3 IRTN2 ISEN2 IRTN1 ISEN1 4 39 VCC PWM8 VRTN 5 38 PWM7 SADDR/ GAMER_OFF 6 37 PWM6 IMON RRES 7 36 PWM5 35 PWM4 VINSEN 9 34 TSEN1 10 TSEN2 11 32 PWM3 PWM2 PWM1 TSEN3 12 31 NC EN 13 VCC V18A 14 30 29 ASP1212 56 Pin 8mmx8mm QFN TOP VIEW 8 33 GND VAR_GATE 15 16 17 18 19 20 21 22 23 24 25 26 27 28 VR_HOT PWM8 40 VR_READY VCC 3.3V 3 VID0 ISEN3 IRTN3 ISEN8 VCC VCPU VID1 PowIR Stage 3 41 VID2 VID7 to VID0 PWM3 IRTN8 2 VID3 VID7 ISEN2 IRTN2 42 RCSM VID4 SALERT# PSI# SALERT# PSI# PWM2 VOUT 1 VID5 SCL PowIR Stage 2 56 55 54 53 52 51 50 49 48 47 46 45 44 43 RCSP VID6 EN PowIR Stage 1 SCL ENABLE ISEN1 IRTN1 PIN DIAGRAM PSI# VR_HOT The 3-pin SMBus interface can be used to monitor a variety of operating parameters on up to seven ASP1212 based VRs. The controller includes a unique sensorless and lossless input current monitoring capability. VID7 VR_HOT ASP1212 supports three NTC temperature sensors to report temperature and trigger VR HOT and OTP faults. Digital thermal balancing allows proportional current imbalance between phases. SDA PWM1 The ASP1212 deploys a number of efficiency shaping features such as variable MOSFET gate drive versus load, programmable PSI modes for optimum light-load along with programmable phase shedding to autonomously add/drop phases versus load. SALERT# VR_RDY The IR ASP1212 includes a customized set of digital overclocking features which require no external components. Gaming applications can use the SMBus interface to place the VRD into “Gamer Mode” to extend VID up to 2.3V with 6.25 mV resolution. 12V ... ASP1212 VR_RDY_L1 The ASP1212 is an 8-phase digital synchronous buck controller for core regulation of high-performance Intel® VR11.1 and VR11.0 platforms. The ASP1212 is fully compliant with VR11.1 including Power Status Indicator (PSI) and for improved light load efficiency and accurate current output (IMON). The ASP1212 provides extensive OVP, UVP, OCP and OTP fault protection. Device and fault configuration parameters are easily defined using the IR Power Designer GUI and stored in on-chip non-volatile memory (NVM).  RoHS Compliant, MSL level 2 package SCL ASP1212 Figure 2: ASP1212 Package Top View Digital Multi-Phase Buck Controller ASP1212 ORDERING INFORMATION ASP1212-     Package QFN Tape & Reel Qty 3000 Part Number ASP1212-N80NT1 T – Tape & Reel QFN 3000 ASP1212-N60NT1 X – Mode ID QFN 3000 ASP1212-N40NT1 XX – Configuration File ID QFN 3000 ASP1212-N20NT ISEN7 IRTN7 ISEN6 IRTN6 ISEN5 IRTN5 ISEN4 ISEN3 IRTN4 IRTN3 Notes: 1. “xx” indicates customer specific configuration file. IRTN2 ISEN2 IRTN1 ISEN1 A – AMD; N – nVidia 56 55 54 53 52 51 50 49 48 47 46 45 44 43 RCSP 1 42 IRTN8 RCSM 2 41 ISEN8 VCC 3 40 VCPU 4 39 VCC PWM8 VRTN 5 38 PWM7 37 PWM6 36 PWM5 35 PWM4 34 32 PWM3 PWM2 PWM1 ASP1212 SADDR/ GAMER_OFF 6 IMON RRES 7 VINSEN 9 TSEN1 10 TSEN2 11 TSEN3 12 31 NC EN 13 VCC V18A 14 30 29 56 Pin 8mmx8mm QFN TOP VIEW 8 33 GND Figure 3: ASP1212 Top View Enlarged 2 December 16, 2012 | FINAL | V1.06 VR_HOT VR_READY VID0 VID1 VID2 VID3 VID4 VID5 VID6 PSI# VID7 SCL SDA SALERT# 15 16 17 18 19 20 21 22 23 24 25 26 27 28 VAR_GATE 1 Digital Multi-Phase Buck Controller ASP1212 12V V TYPICAL APPLICATIONS BLOCK DIAGRAMS RCSP CCS 3 30 40 RCSM VCC V_VGD VCPU 5 VRTN 6 SADDR/ GAMER_OFF PWM 2 33 53 ISEN2 54 IRTN2 7 IMON V_VGD ASP1212 ISEN3 8 RRES +12V IRTN3 34 51 CHL8510 52 12V RVIN_1 9 VINSEN 10 TSEN1 RVIN_2 V_VGD RTh PWM4 TSEN2 ISEN4 RTh IRTN4 12 35 CHL8510 49 50 12V TSEN3 14 V18A IRTN5 36 CHL8510 47 48 12V V_VGD 37 PWM6 45 ISEN6 46 IRTN6 V 21 V 22 23 V V 26 27 To CPU 28 V 12V PSI# VID7 V_VGD VID6 38 PWM7 43 ISEN7 44 IRTN7 VID5 VID4 BOOT HI_GATE Vcc HVCC SWITCH LVCC LO_GATE PWM MODE GND CHL8510 12V VID3 24 VID2 25 CHL8510 V V 20 V V V 19 V From CPU 18 BOOT HI_GATE Vcc HVCC SWITCH LVCC PWM LO_GATE MODE GND V V V 15 SALERT# 16 SDA 17 SCL V SMBus +3.3V V ISEN5 V PWM5 EN V_VGD VID1 V 13 BOOT HI_GATE Vcc HVCC SWITCH LVCC PWM LO_GATE MODE GND 39 PWM8 41 ISEN8 42 IRTN8 VID0 VR_READY CHL8510 12V VR_HOT NC 31 VAR_GATE 29 GND BOOT HI_GATE Vcc HVCC SWITCH LVCC PWM LO_GATE MODE GND V V V_VGD V RTh From System BOOT HI_GATE Vcc HVCC SWITCH LVCC PWM LO_GATE MODE GND V 11 BOOT HI_GATE Vcc HVCC SWITCH LVCC PWM LO_GATE MODE GND V PWM3 V VRTN V C_IMON R_IMON BOOT HI_GATE Vcc HVCC SWITCH LVCC PWM LO_GATE MODE GND CHL8510 12V To CPU L O A D CHL8510 12V 4 V_CPU V 2 +3.3V 32 55 ISEN1 56 IRTN1 PWM1 V RCS Rseries BOOT HI_GATE Vcc HVCC SWITCH LVCC PWM LO_GATE MODE GND V RTh V_VGD V 1 Rseries BOOT HI_GATE Vcc HVCC SWITCH LVCC PWM LO_GATE MODE GND CHL8510 V_VGD Optional Variable Gate Drive Circuit Figure 5: 6-phase VRD using ASP1212 Controller and CHL8510 MOSFET Drivers 4 December 16, 2012 | FINAL | V1.06