AUIRF3808S

AUIRF3808S

  • 厂商:

    EUPEC(英飞凌)

  • 封装:

    SOT404

  • 描述:

    连续漏极电流(Id):106A

  • 详情介绍
  • 数据手册
  • 价格&库存
AUIRF3808S 数据手册
AUTOMOTIVE GRADE   AUIRF3808S HEXFET® Power MOSFET Features  Advanced Planar Technology  Low On-Resistance  Dynamic dV/dT Rating  175°C Operating Temperature  Fast Switching  Fully Avalanche Rated  Repetitive Avalanche Allowed up to Tjmax  Lead-Free, RoHS Compliant  Automotive Qualified *   VDSS 75V RDS(on) typ. 5.9m max. 7.0m 106A ID D S Description Specifically designed for Automotive applications, this Stripe Planar design of HEXFET® Power MOSFETs utilizes the latest processing techniques to achieve low on-resistance per silicon area. This benefit combined with the fast switching speed and ruggedized device design that HEXFET power MOSFETs are well known for, provides the designer with an extremely efficient and reliable device for use in Automotive and a wide variety of other applications. Base part number D2Pak AUIRF3808S G D S Gate Drain Source Standard Pack Form Quantity Tube 50 Tape and Reel Left 800 Package Type D2-Pak AUIRF3808S G Orderable Part Number AUIRF3808S AUIRF3808STRL Absolute Maximum Ratings Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only; and functional operation of the device at these or any other condition beyond those indicated in the specifications is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. The thermal resistance and power dissipation ratings are measured under board mounted and still air conditions. Ambient temperature (TA) is 25°C, unless otherwise specified. Symbol Parameter ID @ TC = 25°C Continuous Drain Current, VGS @ 10V 106 ID @ TC = 100°C IDM PD @TC = 25°C Continuous Drain Current, VGS @ 10V Pulsed Drain Current  Maximum Power Dissipation 75 550 200 VGS EAS IAR EAR dv/dt TJ TSTG Linear Derating Factor Gate-to-Source Voltage Single Pulse Avalanche Energy (Thermally Limited)  Avalanche Current  Repetitive Avalanche Energy  Peak Diode Recovery  Operating Junction and Storage Temperature Range Soldering Temperature, for 10 seconds (1.6mm from case) Thermal Resistance   Symbol RJC RJA Parameter Junction-to-Case Junction-to-Ambient ( PCB Mount, steady state)  Max. Units A W W/°C V mJ A mJ V/ns 1.3 ± 20 430 82 See Fig. 12a, 12b, 15, 16 5.5 -55 to + 175   300   °C  Typ. Max. Units ––– 0.75 40 °C/W HEXFET® is a registered trademark of Infineon. *Qualification standards can be found at www.infineon.com 1 2015-11-13 AUIRF3808S   Static @ TJ = 25°C (unless otherwise specified) V(BR)DSS V(BR)DSS/TJ RDS(on) VGS(th) gfs Parameter Drain-to-Source Breakdown Voltage Breakdown Voltage Temp. Coefficient Static Drain-to-Source On-Resistance Gate Threshold Voltage Forward Transconductance IDSS Drain-to-Source Leakage Current IGSS   Gate-to-Source Forward Leakage Gate-to-Source Reverse Leakage Min. 75 ––– ––– 2.0 100 ––– ––– ––– ––– Typ. ––– 0.086 5.9 ––– ––– ––– ––– ––– ––– Max. Units Conditions ––– V VGS = 0V, ID = 250µA ––– V/°C Reference to 25°C, ID = 1mA 7.0 m VGS = 10V, ID = 82A  4.0 V VDS = VGS, ID = 250µA ––– S VDS = 25V, ID = 82A 25 VDS = 75V, VGS = 0V µA 250 VDS = 60V,VGS = 0V,TJ =150°C 200 VGS = 20V nA   -200 VGS = -20V Dynamic Electrical Characteristics @ TJ = 25°C (unless otherwise specified) Qg Qgs Qgd td(on) tr td(off) tf Total Gate Charge Gate-to-Source Charge Gate-to-Drain Charge Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time ––– ––– ––– ––– ––– ––– ––– 150 31 50 16 140 68 120 220 47 76 ––– ––– ––– ––– LD Internal Drain Inductance ––– 4.5 ––– LS Internal Source Inductance ––– 7.5 ––– Ciss Coss Crss Input Capacitance Output Capacitance Reverse Transfer Capacitance ––– 5310 ––– ––– 890 ––– ––– 130 ––– Coss Coss Coss eff. Output Capacitance Output Capacitance Effective Output Capacitance (Time Related) ––– 6010 ––– ––– 570 ––– ––– 1140 ––– Diode Characteristics   Parameter Continuous Source Current IS (Body Diode) Pulsed Source Current ISM (Body Diode) VSD Diode Forward Voltage trr Reverse Recovery Time Qrr Reverse Recovery Charge ton Forward Turn-On Time ID = 82A nC   VDS = 60V VGS = 10V VDD = 38V ID = 82A ns RG= 2.5 VGS = 10V Between lead, 6mm (0.25in.) nH   from package and center of die contact VGS = 0V VDS = 25V ƒ = 1.0MHz, See Fig.5 pF   VGS = 0V,VDS = 1.0V, ƒ = 1.0MHz VGS = 0V,VDS = 60V, ƒ = 1.0MHz VGS = 0V,VDS = 0V to 60V Min. Typ. Max. Units ––– ––– 106 ––– ––– 550 ––– ––– ––– ––– 93 340 1.3 140 510 Conditions MOSFET symbol showing the A integral reverse p-n junction diode. V TJ = 25°C,IS = 82A,VGS = 0V  ns TJ = 25°C ,IF = 82A nC di/dt = 100A/µs  Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD) Notes: Repetitive rating; pulse width limited by max. junction temperature. (See fig.11) Starting TJ = 25°C, L = 0.130mH, RG = 25, IAS = 82A. (See fig.12) ISD 82A, di/dt 310A/µs, VDD V(BR)DSS, TJ  175°C. Pulse width 400µs; duty cycle  2%. Coss eff. is a fixed capacitance that gives the same charging time as Coss while VDS is rising from 0 to 80% VDSS . Limited by TJmax , see Fig.12a, 12b, 15, 16 for typical repetitive avalanche performance. When mounted on 1" square PCB (FR-4 or G-10 Material). For recommended footprint and soldering techniques refer to application note #AN-994 R is measured at TJ of approximately 90°C        2 2015-11-13 AUIRF3808S   1000 1000 VGS 15V 10V 8.0V 7.0V 6.0V 5.5V 5.0V 4.5V I D , Drain-to-Source Current (A) BOTTOM TOP 100 4.5V 10 20µs PULSE 20µsWIDTH PULSE WIDTH TJ = 25°C °C T J= 25 1 0.1 1 BOTTOM VGS 15V 10V 8.0V 7.0V 6.0V 5.5V 5.0V 4.5V 100 4.5V 10 20µs PULSE WIDTHWIDTH 20µs PULSE TJ = 175°C °C T J= 175 1 10 100 0.1 1 V DS, Drain-to-Source Voltage (V) 10 100 V DS, Drain-to-Source Voltage (V) Fig. 2 Typical Output Characteristics Fig. 1 Typical Output Characteristics 3.0 1000.00 I D = 137A 100.00 T J = 25°C VDS = 15V 20µs PULSE WIDTH 10.00 1.0 3.0 5.0 7.0 9.0 11.0 13.0 VGS, Gate-to-Source Voltage (V) Fig. 3 Typical Transfer Characteristics 3 15.0 2.0 (Normalized) T J = 175°C RDS(on) , Drain-to-Source On Resistance 2.5 ID, Drain-to-Source Current  ) I D , Drain-to-Source Current (A) TOP 1.5 1.0 0.5 V GS = 10V 0.0 -60 -40 -20 0 20 40 60 TJ, Junction Temperature 80 100 120 140 160 180 ( °C) Fig. 4 Normalized On-Resistance vs. Temperature 2015-11-13 AUIRF3808S   12 100000 VGS = 0V, f = 1 MHZ Ciss = Cgs + Cgd , Cds SHORTED Crss = Cgd ID = 82A VDS = 60V VDS = 37V VDS = 15V 10 VGS , Gate-to-Source Voltage (V) C, Capacitance(pF) Coss = Cds + Cgd 10000 Ciss Coss 1000 Crss 8 6 4 2 100 1 10 100 0 VDS , Drain-to-Source Voltage (V) 0 40 80 120 160 QG, Total Gate Charge (nC) Fig 5. Typical Capacitance vs. Drain-to-Source Voltage 10000 ID, Drain-to-Source Current (A) ISD, Reverse Drain Current (A) 1000.00 T J = 175°C 100.00 OPERATION IN THIS AREA LIMITED BY R DS (on) 1000 100 10.00 T J = 25°C 1.00 VGS = 0V 0.0 0.5 1.0 1.5 VSD , Source-toDrain Voltage (V) Fig. 7 Typical Source-to-Drain Diode Forward Voltage 100µsec 1msec 10 Tc = 25°C Tj = 175°C Single Pulse 10msec 1 0.10   4 Fig 6. Typical Gate Charge vs. Gate-to-Source Voltage 2.0 1 10 100 1000 VDS , Drain-toSource Voltage (V) Fig 8. Maximum Safe Operating Area 2015-11-13 AUIRF3808S   120 ID, Drain Current (A) 100 80 60 Fig 10a. Switching Time Test Circuit 40 20 0 25 50 75 100 125 150 175 T C , Case Temperature (°C) Fig 9. Maximum Drain Current vs. Case Temperature Fig 10b. Switching Time Waveforms (Z thJC ) 1 D = 0.50 Thermal Response 0.20 0.1 0.10 P DM 0.05 t1 0.02 0.01 t2 SINGLEPULSE (THERMAL RESPONSE) Notes: 1. Dutyfactor D = 2. PeakT 0.01 0.00001 0.0001 0.001 0.01 0.1 t 1/ t J = P DM x Z 2 +T C thJC 1 10 t 1, Rectangular Pulse Duration (sec) Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case   5 2015-11-13 AUIRF3808S   15V DRIVER L VDS 800 ID TOP + V - DD IAS 20V 640 A 0.01 tp Fig 12a. Unclamped Inductive Test Circuit V(BR)DSS tp EAS , Single Pulse Avalanche Energy (mJ) D.U.T RG BOTTOM 480 320 160 0 25 50 75 100 125 150 ( ° C) Starting Tj, Junction Temperature I AS 34A 58A 82A Fig 12c. Maximum Avalanche Energy vs. Drain Current Fig 12b. Unclamped Inductive Waveforms Id 3.5 Vgs Vgs(th) Qgs1 Qgs2 Qgd Qgodr Fig 13a. Gate Charge Waveform VGS(th) Gate threshold Voltage (V) Vds 3.0 ID = 250µA 2.5 2.0 1.5 1.0 -75 -50 -25 0 25 50 75 100 125 150 175 200 T J , Temperature ( °C ) Fig 14. Threshold Voltage vs. Temperature Fig 13b. Gate Charge Test Circuit 6 2015-11-13 AUIRF3808S   10000 Avalanche Current (A) 1000 Allowed avalanche Current vs avalanche pulsewidth, tav assuming  Tj = 25°C due to avalanche losses. Note: In no case should Tj be allowed to exceed Tjmax Duty Cycle = Single Pulse 100 0.01 0.05 0.10 10 1 0.1 1.0E-07 1.0E-06 1.0E-05 1.0E-04 1.0E-03 1.0E-02 1.0E-01 tav (sec) Fig 15. Typical Avalanche Current vs. Pulse width EAR , Avalanche Energy (mJ) 500 TOP Single Pulse BOTTOM 10% Duty Cycle ID = 140A 400 Notes on Repetitive Avalanche Curves , Figures 15, 16: (For further info, see AN-1005 at www.infineon.com) 1. Avalanche failures assumption: Purely a thermal phenomenon and failure occurs at a temperature far in excess of Tjmax. This is validated for every part type. 2. Safe operation in Avalanche is allowed as long as Tjmax is not exceeded. 3. Equation below based on circuit and waveforms shown in Figures 12a, 12b. 4. PD (ave) = Average power dissipation per single avalanche pulse. 5. BV = Rated breakdown voltage (1.3 factor accounts for voltage increase during avalanche). 6. Iav = Allowable avalanche current. 7. T = Allowable rise in junction temperature, not to exceed Tjmax (assumed as 25°C in Figure 15, 16). tav = Average time in avalanche. D = Duty cycle in avalanche = tav ·f ZthJC(D, tav) = Transient thermal resistance, see Figures 13) 300 200 100 0 25 50 75 100 125 150 Starting T J , Junction Temperature (°C) 175 PD (ave) = 1/2 ( 1.3·BV·Iav) = T/ ZthJC Iav = 2T/ [1.3·BV·Zth] EAS (AR) = PD (ave)·tav Fig 16. Maximum Avalanche Energy vs. Temperature 7 2015-11-13 AUIRF3808S   Fig 17. Peak Diode Recovery dv/dt Test Circuit for N-Channel HEXFET® Power MOSFETs   8 2015-11-13 AUIRF3808S   D2Pak (TO-263AB) Package Outline (Dimensions are shown in millimeters (inches)) D2Pak (TO-263AB) Part Marking Information Part Number AUIRF3808S YWWA IR Logo XX  Date Code Y= Year WW= Work Week XX Lot Code Note: For the most current drawing please refer to IR website at http://www.irf.com/package/   9 2015-11-13 AUIRF3808S   D2Pak (TO-263AB) Tape & Reel Information (Dimensions are shown in millimeters (inches)) TRR 1.60 (.063) 1.50 (.059) 4.10 (.161) 3.90 (.153) FEED DIRECTION 1.85 (.073) 1.65 (.065) 1.60 (.063) 1.50 (.059) 11.60 (.457) 11.40 (.449) 0.368 (.0145) 0.342 (.0135) 15.42 (.609) 15.22 (.601) 24.30 (.957) 23.90 (.941) TRL 10.90 (.429) 10.70 (.421) 1.75 (.069) 1.25 (.049) 4.72 (.136) 4.52 (.178) 16.10 (.634) 15.90 (.626) FEED DIRECTION 13.50 (.532) 12.80 (.504) 27.40 (1.079) 23.90 (.941) 4 330.00 (14.173) MAX. NOTES : 1. COMFORMS TO EIA-418. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSION MEASURED @ HUB. 4. INCLUDES FLANGE DISTORTION @ OUTER EDGE. 60.00 (2.362) MIN. 26.40 (1.039) 24.40 (.961) 3 30.40 (1.197) MAX. 4 Note: For the most current drawing please refer to IR website at http://www.irf.com/package/ 10 2015-11-13 AUIRF3808S   Qualification Information Automotive (per AEC-Q101) Comments: This part number(s) passed Automotive qualification. Infineon’s Industrial and Consumer qualification level is granted by extension of the higher Automotive level. Qualification Level  Moisture Sensitivity Level   D2-Pak Machine Model Human Body Model   ESD Charged Device Model RoHS Compliant MSL1   Class M4 (+/- 800V)† AEC-Q101-002 Class H2 (+/- 4000V)† AEC-Q101-001 Class C5 (+/- 2000V)† AEC-Q101-005 Yes † Highest passing voltage. Revision History Date 11/13/2015 Comments   Updated datasheet with corporate template Corrected ordering table on page 1. Published by Infineon Technologies AG 81726 München, Germany © Infineon Technologies AG 2015 All Rights Reserved. IMPORTANT NOTICE The information given in this document shall in no event be regarded as a guarantee of conditions or characteristics (“Beschaffenheitsgarantie”). With respect to any examples, hints or any typical values stated herein and/or any information regarding the application of the product, Infineon Technologies hereby disclaims any and all warranties and liabilities of any kind, including without limitation warranties of non-infringement of intellectual property rights of any third party. In addition, any information given in this document is subject to customer’s compliance with its obligations stated in this document and any applicable legal requirements, norms and standards concerning customer’s products and any use of the product of Infineon Technologies in customer’s applications. The data contained in this document is exclusively intended for technically trained staff. It is the responsibility of customer’s technical departments to evaluate the suitability of the product for the intended application and the completeness of the product information given in this document with respect to such application. For further information on the product, technology, delivery terms and conditions and prices please contact your nearest Infineon Technologies office (www.infineon.com). WARNINGS Due to technical requirements products may contain dangerous substances. For information on the types in question please contact your nearest Infineon Technologies office. Except as otherwise explicitly approved by Infineon Technologies in a written document signed by authorized representatives of Infineon Technologies, Infineon Technologies’ products may not be used in any applications where a failure of the product or any consequences of the use thereof can reasonably be expected to result in personal injury.   11 2015-11-13
AUIRF3808S
PDF文档中包含以下信息: 1. 物料型号:型号为LM324,是一款四运算放大器集成电路。

2. 器件简介:LM324是一种通用的运算放大器,广泛应用于模拟信号处理。

3. 引脚分配:引脚1为正输入端,引脚2为负输入端,引脚3为输出端,其他引脚包括电源和接地。

4. 参数特性:包括供电电压范围、输入偏置电流、增益带宽积等。

5. 功能详解:LM324可以用于信号放大、滤波器设计、信号整形等。

6. 应用信息:适用于音频放大、传感器信号处理、医疗设备等。

7. 封装信息:提供多种封装形式,如SOIC、DIP等。
AUIRF3808S 价格&库存

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