AUTOMOTIVE GRADE
AUIRFR3504
Features
Advanced Planar Technology
Low On-Resistance
175°C Operating Temperature
Fast Switching
Fully Avalanche Rated
Repetitive Avalanche Allowed up to Tjmax
Lead-Free, RoHS Compliant
Automotive Qualified *
HEXFET® Power MOSFET
VDSS
40V
RDS(on)
typ.
7.8m
max.
9.2m
ID (Silicon Limited)
87A
ID (Package Limited)
56A
D
Description
Specifically designed for Automotive applications, this Stripe Planar
design of HEXFET® Power MOSFETs utilizes the latest
processing techniques to achieve low on-resistance per silicon
area. This benefit combined with the fast switching speed and
ruggedized device design that HEXFET power MOSFETs are well
known for, provides the designer with an extremely efficient and
reliable device for use in Automotive and a wide variety of other
applications.
Base part number
D-Pak
S
D-Pak
AUIRFR3504
G
Gate
D
Drain
Standard Pack
Form
Quantity
Tube
75
Tape and Reel Left
3000
Package Type
AUIRFR3504
G
S
Source
Orderable Part Number
AUIRFR3504
AUIRFR3504TRL
Absolute Maximum Ratings
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress
ratings only; and functional operation of the device at these or any other condition beyond those indicated in the specifications is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. The thermal resistance
and power dissipation ratings are measured under board mounted and still air conditions. Ambient temperature (TA) is 25°C, unless
otherwise specified.
Symbol
Parameter
Max.
ID @ TC = 25°C
Continuous Drain Current, VGS @ 10V (Silicon Limited)
87
ID @ TC = 100°C
Continuous Drain Current, VGS @ 10V (Silicon Limited)
61
ID @ TC = 25°C
IDM
PD @TC = 25°C
Continuous Drain Current, VGS @ 10V (Package Limited)
Pulsed Drain Current
Maximum Power Dissipation
56
350
140
VGS
EAS
EAS (Tested)
IAR
EAR
TJ
TSTG
Linear Derating Factor
Gate-to-Source Voltage
Single Pulse Avalanche Energy (Thermally Limited)
Single Pulse Avalanche Energy Tested Value
Avalanche Current
Repetitive Avalanche Energy
Operating Junction and
Storage Temperature Range
Soldering Temperature, for 10 seconds (1.6mm from case)
Thermal Resistance
Symbol
RJC
RJA
RJA
Parameter
Junction-to-Case
Junction-to-Ambient ( PCB Mount)
Junction-to-Ambient
Units
A
W
0.92
± 20
240
480
See Fig.15,16, 12a, 12b
W/°C
V
mJ
A
mJ
-55 to + 175
300
°C
Typ.
Max.
Units
–––
–––
–––
1.09
50
110
°C/W
HEXFET® is a registered trademark of Infineon.
*Qualification standards can be found at www.infineon.com
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AUIRFR3504
Static @ TJ = 25°C (unless otherwise specified)
V(BR)DSS
V(BR)DSS/TJ
RDS(on)
VGS(th)
gfs
Parameter
Drain-to-Source Breakdown Voltage
Breakdown Voltage Temp. Coefficient
Static Drain-to-Source On-Resistance
Gate Threshold Voltage
Forward Trans conductance
IDSS
Drain-to-Source Leakage Current
IGSS
Gate-to-Source Forward Leakage
Gate-to-Source Reverse Leakage
Min. Typ. Max. Units
Conditions
40
––– –––
V VGS = 0V, ID = 250µA
––– 0.041 ––– V/°C Reference to 25°C, ID = 1mA
–––
7.8
9.2 m VGS = 10V, ID = 30A **
2.0
–––
4.0
V VDS = VGS, ID = 250µA
40
––– –––
S VDS = 10V, ID = 30A **
––– –––
20
VDS = 40V, VGS = 0V
µA
––– ––– 250
VDS = 40V,VGS = 0V,TJ =125°C
––– ––– 200
VGS = 20V
nA
––– ––– -200
VGS = -20V
Dynamic Electrical Characteristics @ TJ = 25°C (unless otherwise specified)
Qg
Qgs
Qgd
td(on)
tr
td(off)
tf
Total Gate Charge
Gate-to-Source Charge
Gate-to-Drain Charge
Turn-On Delay Time
Rise Time
Turn-Off Delay Time
Fall Time
–––
–––
–––
–––
–––
–––
–––
48
12
13
11
53
36
22
71
18
20
–––
–––
–––
–––
LD
Internal Drain Inductance
–––
4.5
–––
LS
Internal Source Inductance
–––
7.5
–––
–––
–––
–––
–––
–––
–––
2150
580
46
2830
510
870
–––
–––
–––
–––
–––
–––
Min.
Typ. Max. Units
–––
–––
87
–––
–––
350
–––
–––
–––
–––
53
86
1.3
80
130
Ciss
Input Capacitance
Coss
Output Capacitance
Crss
Reverse Transfer Capacitance
Coss
Output Capacitance
Output Capacitance
Coss
Effective Output Capacitance
Coss eff.
Diode Characteristics
Parameter
Continuous Source Current
IS
(Body Diode)
Pulsed Source Current
ISM
(Body Diode)
VSD
Diode Forward Voltage
Reverse Recovery Time
trr
Qrr
Reverse Recovery Charge
ton
Forward Turn-On Time
ID = 30A**
nC VDS = 32V
VGS = 10V
VDD = 20V
ID = 30A**
ns
RG = 6.8
VGS = 10V
Between lead,
6mm (0.25in.)
nH
from package
and center of die contact
VGS = 0V
VDS = 25V
ƒ = 1.0MHz, See Fig.5
pF
VGS = 0V, VDS = 1.0V ƒ = 1.0MHz
VGS = 0V, VDS = 32V ƒ = 1.0MHz
VGS = 0V, VDS = 0V to 32V
Conditions
MOSFET symbol
showing the
A
integral reverse
p-n junction diode.
V TJ = 25°C,IS = 30A**,VGS = 0V
ns TJ = 25°C ,IF = 30A**, VDD = 20V
nC di/dt = 100A/µs
Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
Notes:
Repetitive rating; pulse width limited by max. junction temperature. (See fig. 11)
Limited by TJmax , starting TJ = 25°C, L = 0.52mH, RG = 25, IAS = 30A, VGS =10V. Part not recommended for use above this value.
ISD 30A, di/dt 170A/µs, VDD V(BR)DSS, TJ 175°C.
Pulse width 1.0ms; duty cycle 2%.
Coss eff. is a fixed capacitance that gives the same charging time as Coss while VDS is rising from 0 to 80% VDSS
Limited by TJmax , see Fig.12a, 12b, 15, 16 for typical repetitive avalanche performance.
This value determined from sample failure population. 100% tested to this value in production.
Calculated continuous current based on maximum allowable junction temperature. Package limitation current is 56A.
When mounted on 1" square PCB (FR-4 or G-10 Material). For recommended footprint and soldering techniques refer to
application note #AN-994
R is measured at TJ approximately 90°C.
** All AC and DC test conditions based on former package limited current of 30A.
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AUIRFR3504
1000
1000
100
10
BOTTOM
1
4.0V
0.1
0.01
TOP
ID, Drain-to-Source Current (A)
ID, Drain-to-Source Current (A)
TOP
VGS
15V
10V
7.0V
6.0V
5.5V
5.0V
4.5V
4.0V
20µs PULSE WIDTH
Tj = 25°C
0.001
0.1
1
10
100
100
BOTTOM
10
4.0V
1
20µs PULSE WIDTH
Tj = 175°C
0.1
0.1
1000
10
100
1000
Fig. 2 Typical Output Characteristics
Fig. 1 Typical Output Characteristics
80
G fs , Forward Transconductance (S)
1000.00
ID, Drain-to-Source Current )
1
VDS , Drain-to-Source Voltage (V)
VDS, Drain-to-Source Voltage (V)
TJ = 175°C
100.00
10.00
TJ = 25°C
1.00
VDS = 25V
20µs PULSE WIDTH
2.0
4.0
6.0
8.0
10.0
12.0
14.0
70
T J = 25°C
60
50
T J = 175°C
40
30
20
VDS = 25V
10
20µs PULSE WIDTH
0
0.10
16.0
VGS, Gate-to-Source Voltage (V)
Fig. 3 Typical Transfer Characteristics
3
VGS
15V
10V
7.0V
6.0V
5.5V
5.0V
4.5V
4.0V
0
20
40
60
80
100
120
ID,Drain-to-Source Current (A)
Fig. 4 Typical Forward Trans conductance
Vs. Drain Current
2015-11-23
AUIRFR3504
12
100000
VGS = 0V,
f = 1 MHZ
Ciss = Cgs + Cgd, C ds SHORTED
Crss = Cgd
VGS , Gate-to-Source Voltage (V)
C, Capacitance(pF)
Ciss
1000
C oss
100
Crss
8
6
4
2
0
10
1
10
0
100
Fig 5. Typical Capacitance vs.
Drain-to-Source Voltage
1000
ID, Drain-to-Source Current (A)
I SD , Reverse Drain Current (A)
100
TJ = 25 ° C
1
V GS= 0 V
0.1
0.5
30
40
50
OPERATION IN THIS AREA
LIMITED BY R DS (on)
100
°C
10
0.0
20
Fig 6. Typical Gate Charge vs.
Gate-to-Source Voltage
1000
TJ = 175
10
QG, Total Gate Charge (nC)
VDS , Drain-to-Source Voltage (V)
1.0
1.5
2.0
2.5
V SD,Source-to-Drain Voltage (V)
Fig. 7 Typical Source-to-Drain Diode
Forward Voltage
4
VDS = 32V
VDS = 20V
VDS = 8V
10
Coss = Cds + Cgd
10000
ID = 30A
100µsec
10
1msec
Tc = 25°C
Tj = 175°C
Single Pulse
10msec
1
3.0
1
10
100
1000
VDS , Drain-to-Source Voltage (V)
Fig 8. Maximum Safe Operating Area
2015-11-23
AUIRFR3504
2.5
90
80
Limited By Package
RDS(on) , Drain-to-Source On Resistance
60
50
40
30
20
10
(Normalized)
2.0
70
ID, Drain Current (A)
I D = 87A
0
1.5
1.0
0.5
V GS = 10V
0.0
-60
25
50
75
100
125
150
-40
175
-20
0
20
40
60
80
TJ, Junction Temperature
100
120
140
160
180
( ° C)
TC , Case Temperature (°C)
Fig 9. Maximum Drain Current Vs.
Case Temperature
Fig 10. Normalized On-Resistance
Vs. Temperature
(Z thJC )
10
1
Thermal Response
D = 0.50
0.20
P DM
0.10
0.1
0.05
0.02
0.01
t1
SINGLEPULSE
(THERMAL RESPONSE)
t2
Notes:
1. Dutyfactor D =
2. PeakT
0.01
0.00001
0.0001
0.001
0.01
t 1/ t
J = P DM x Z
2
thJC
+T C
0.1
1
t 1, Rectangular Pulse Duration (sec)
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case
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AUIRFR3504
15V
500
VDS
ID
DRIVER
L
TOP
+
V
- DD
IAS
20V
EAS , Single Pulse Avalanche Energy (mJ)
400
D.U.T
RG
A
0.01
tp
Fig 12a. Unclamped Inductive Test Circuit
V(BR)DSS
tp
12A
21A
30A
BOTTOM
300
200
100
0
25
50
75
100
Starting Tj, Junction Temperature
125
150
175
( °C)
Fig 12c. Maximum Avalanche Energy
vs. Drain Current
I AS
Fig 12b. Unclamped Inductive Waveforms
Id
Vds
Vgs
Vgs(th)
Qgs1 Qgs2
Qgd
Qgodr
Fig 13a. Gate Charge Waveform
VGS(th) Gate threshold Voltage (V)
4.0
3.5
3.0
ID = 250µA
2.5
2.0
1.5
-75 -50 -25
0
25
50
75 100 125 150 175 200
T J , Temperature ( °C )
Fig 14. Threshold Voltage Vs. Temperature
Fig 13b. Gate Charge Test Circuit
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AUIRFR3504
10000
Duty Cycle = Single Pulse
Avalanche Current (A)
1000
100
Allowed avalanche Current vs
avalanche pulsewidth, tav
assuming Tj = 25°C due to
avalanche losses
0.01
0.05
10
0.10
1
0.1
1.0E-08
1.0E-07
1.0E-06
1.0E-05
1.0E-04
1.0E-03
1.0E-02
1.0E-01
tav (sec)
Fig 15. Typical Avalanche Current Vs. Pulse width
Notes on Repetitive Avalanche Curves , Figures 15, 16:
EAR , Avalanche Energy (mJ)
250
TOP
Single Pulse
BOTTOM 10% Duty Cycle
ID = 30A
200
(For further info, see AN-1005 at www.infineon.com)
1. Avalanche failures assumption:
Purely a thermal phenomenon and failure occurs at a temperature far in
excess of Tjmax. This is validated for every part type.
2. Safe operation in Avalanche is allowed as long as Tjmax is not exceeded.
3. Equation below based on circuit and waveforms shown in Figures 12a, 12b.
4. PD (ave) = Average power dissipation per single avalanche pulse.
150
100
5. BV = Rated breakdown voltage (1.3 factor accounts for voltage increase
during avalanche).
6. Iav = Allowable avalanche current.
50
7. T = Allowable rise in junction temperature, not to exceed Tjmax (assumed as
0
25
50
75
100
125
150
175
Starting T J , Junction Temperature (°C)
25°C in Figure 15, 16).
tav = Average time in avalanche.
D = Duty cycle in avalanche = tav ·f
ZthJC(D, tav) = Transient thermal resistance, see Figures 13)
PD (ave) = 1/2 ( 1.3·BV·Iav) = T/ ZthJC
Iav = 2T/ [1.3·BV·Zth]
Fig 16. Maximum Avalanche Energy
Vs. Temperature
7
EAS (AR) = PD (ave)·tav
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AUIRFR3504
Fig 17. Peak Diode Recovery dv/dt Test Circuit for N-Channel HEXFET® Power MOSFETs
Fig 18a. Switching Time Test Circuit
8
Fig 18b. Switching Time Waveforms
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AUIRFR3504
D-Pak (TO-252AA) Package Outline (Dimensions are shown in millimeters (inches))
D-Pak (TO-252AA) Part Marking Information
Part Number
AUFR3504
YWWA
IR Logo
XX
Date Code
Y= Year
WW= Work Week
XX
Lot Code
Note: For the most current drawing please refer to IR website at http://www.irf.com/package/
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AUIRFR3504
D-Pak (TO-252AA) Tape & Reel Information (Dimensions are shown in millimeters (inches))
TR
TRR
16.3 ( .641 )
15.7 ( .619 )
12.1 ( .476 )
11.9 ( .469 )
FEED DIRECTION
TRL
16.3 ( .641 )
15.7 ( .619 )
8.1 ( .318 )
7.9 ( .312 )
FEED DIRECTION
NOTES :
1. CONTROLLING DIMENSION : MILLIMETER.
2. ALL DIMENSIONS ARE SHOWN IN MILLIMETERS ( INCHES ).
3. OUTLINE CONFORMS TO EIA-481 & EIA-541.
13 INCH
16 mm
NOTES :
1. OUTLINE CONFORMS TO EIA-481.
Note: For the most current drawing please refer to IR website at http://www.irf.com/package/
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AUIRFR3504
Qualification Information
Qualification Level
Moisture Sensitivity Level
Machine Model
ESD
Human Body Model
Charged Device Model
RoHS Compliant
Automotive
(per AEC-Q101)
Comments: This part number(s) passed Automotive qualification. Infineon’s
Industrial and Consumer qualification level is granted by extension of the higher
Automotive level.
D-Pak
MSL1
Class M4 (+/- 500V)†
AEC-Q101-002
Class H1C (+/- 1500V)†
AEC-Q101-001
Class C5 (+/- 2000V)†
AEC-Q101-005
Yes
† Highest passing voltage.
Revision History
Date
11/23/2015
Comments
Updated datasheet with corporate template
Corrected ordering table on page 1.
Published by
Infineon Technologies AG
81726 München, Germany
© Infineon Technologies AG 2015
All Rights Reserved.
IMPORTANT NOTICE
The information given in this document shall in no event be regarded as a guarantee of conditions or characteristics
(“Beschaffenheitsgarantie”). With respect to any examples, hints or any typical values stated herein and/or any
information regarding the application of the product, Infineon Technologies hereby disclaims any and all warranties and
liabilities of any kind, including without limitation warranties of non-infringement of intellectual property rights of any third
party.
In addition, any information given in this document is subject to customer’s compliance with its obligations stated in this
document and any applicable legal requirements, norms and standards concerning customer’s products and any use of
the product of Infineon Technologies in customer’s applications.
The data contained in this document is exclusively intended for technically trained staff. It is the responsibility of
customer’s technical departments to evaluate the suitability of the product for the intended application and the
completeness of the product information given in this document with respect to such application.
For further information on the product, technology, delivery terms and conditions and prices please contact your nearest
Infineon Technologies office (www.infineon.com).
WARNINGS
Due to technical requirements products may contain dangerous substances. For information on the types in question
please contact your nearest Infineon Technologies office.
Except as otherwise explicitly approved by Infineon Technologies in a written document signed by authorized
representatives of Infineon Technologies, Infineon Technologies’ products may not be used in any applications where a
failure of the product or any consequences of the use thereof can reasonably be expected to result in personal injury.
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