AUTOMOTIVE GRADE
HEXFET® Power MOSFET
Features
Advanced Process Technology
Ultra Low On-Resistance
Dynamic dV/dT Rating
175°C Operating Temperature
Fast Switching
Repetitive Avalanche Allowed up to Tjmax
Lead-Free, RoHS Compliant
Automotive Qualified *
D-Pak
60V
12.6m
15.8m
43A
typ.
max.
ID
D
G
S
D-Pak
AUIRFR3806
G
Gate
D
Drain
Standard Pack
Form
Quantity
Tube
75
Tape and Reel Left
3000
Package Type
AUIRFR3806
VDSS
RDS(on)
Description
Specifically designed for Automotive applications, this HEXFET®
Power MOSFET utilizes the latest processing techniques to
achieve extremely low on-resistance per silicon area. Additional
features of this design are a 175°C junction operating temperature,
fast switching speed and improved repetitive avalanche rating .
These features combine to make this design an extremely efficient
and reliable device for use in Automotive applications and a wide
variety of other applications.
Base part number
AUIRFR3806
S
Source
Orderable Part Number
AUIRFR3806
AUIRFR3806TRL
Absolute Maximum Ratings
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress
ratings only; and functional operation of the device at these or any other condition beyond those indicated in the specifications is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. The thermal resistance
and power dissipation ratings are measured under board mounted and still air conditions. Ambient temperature (TA) is 25°C, unless
otherwise specified.
Symbol
Parameter
ID @ TC = 25°C
Continuous Drain Current, VGS @ 10V
43
ID @ TC = 100°C
IDM
PD @TC = 25°C
Continuous Drain Current, VGS @ 10V
Pulsed Drain Current
Maximum Power Dissipation
31
170
71
VGS
EAS
IAR
EAR
dv/dt
TJ
TSTG
Linear Derating Factor
Gate-to-Source Voltage
Single Pulse Avalanche Energy (Thermally Limited)
Avalanche Current
Repetitive Avalanche Energy
Pead Diode Recovery dv/dt
Operating Junction and
Storage Temperature Range
Soldering Temperature, for 10 seconds (1.6mm from case)
Thermal Resistance
Symbol
RJC
RJA
RJA
Parameter
Junction-to-Case
Junction-to-Ambient ( PCB Mount)
Junction-to-Ambient
Max.
Units
A
W
0.47
± 20
73
25
7.1
24
-55 to + 175
W/°C
V
mJ
A
mJ
V/ns
300
°C
Typ.
Max.
Units
–––
–––
–––
2.12
50
110
°C/W
HEXFET® is a registered trademark of Infineon.
*Qualification standards can be found at www.infineon.com
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AUIRFR3806
Static @ TJ = 25°C (unless otherwise specified)
Parameter
Drain-to-Source Breakdown Voltage
V(BR)DSS
V(BR)DSS/TJ Breakdown Voltage Temp. Coefficient
RDS(on)
Static Drain-to-Source On-Resistance
VGS(th)
Gate Threshold Voltage
gfs
Forward Trans conductance
RG(Int)
Internal Gate Resistance
IDSS
Drain-to-Source Leakage Current
IGSS
Gate-to-Source Forward Leakage
Gate-to-Source Reverse Leakage
Min. Typ. Max. Units
Conditions
60
––– –––
V VGS = 0V, ID = 250µA
––– 0.075 ––– V/°C Reference to 25°C, ID = 5mA
––– 12.6 15.8 mVGS = 10V, ID = 25A
2.0
–––
4.0
V VDS = VGS, ID = 50µA
41
––– –––
S VDS = 10V, ID = 25A
––– 0.79 –––
––– –––
20
VDS = 60V, VGS = 0V
µA
––– ––– 250
VDS = 48V,VGS = 0V,TJ =125°C
––– ––– 100
VGS = 20V
nA
––– ––– -100
VGS = -20V
Dynamic Electrical Characteristics @ TJ = 25°C (unless otherwise specified)
Total Gate Charge
Qg
Qgs
Gate-to-Source Charge
Qgd
Gate-to-Drain Charge
Qsync
Total Gate Charge Sync. (Qg - Qgd)
td(on)
Turn-On Delay Time
Rise Time
tr
td(off)
Turn-Off Delay Time
Fall Time
tf
Ciss
Input Capacitance
Coss
Output Capacitance
Crss
Reverse Transfer Capacitance
Coss eff. (ER) Effective Output Capacitance (Energy Related)
Coss eff. (TR) Effective Output Capacitance (Time Related)
Diode Characteristics
Parameter
Continuous Source Current
IS
(Body Diode)
Pulsed Source Current
ISM
(Body Diode)
VSD
Diode Forward Voltage
trr
Reverse Recovery Time
Qrr
Reverse Recovery Charge
ton
Forward Turn-On Time
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
22
5.0
6.3
28.3
6.3
40
49
47
1150
130
67
190
230
30
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
Min.
Typ. Max. Units
–––
–––
43
–––
–––
170
–––
–––
–––
–––
–––
–––
–––
22
26
17
24
1.4
1.3
33
39
26
36
–––
ID = 25A
V = 30V
nC DS
VGS = 10V
VDD = 39V
ID = 25A
ns
RG = 20
VGS = 10V
VGS = 0V
VDS = 50V
pF ƒ = 1.0MHz
VGS = 0V, VDS = 0V to 48V
VGS = 0V, VDS = 0V to 48V
Conditions
MOSFET symbol
showing the
A
integral reverse
p-n junction diode.
V TJ = 25°C,IS = 25A,VGS = 0V
TJ = 25°C
ns
TJ = 125°C VR = 51V,
TJ = 25°C
IF = 25A
nC
TJ = 125°C di/dt = 100A/µs
A TJ = 25°C
Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
Notes:
Repetitive rating; pulse width limited by max. junction temperature.
Limited by TJmax , starting TJ = 25°C, L = 0.23mH, RG = 25, IAS = 25A, VGS =10V. Part not recommended for use above this value.
ISD 25A, di/dt 1580A/µs, VDD V(BR)DSS, TJ 175°C.
Pulse width 400µs; duty cycle 2%.
Coss eff. (TR) is a fixed capacitance that gives the same charging time as Coss while VDS is rising from 0 to 80% VDSS.
Coss eff. (ER) is a fixed capacitance that gives the same energy as Coss while VDS is rising from 0 to 80% VDSS.
When mounted on 1" square PCB (FR-4 or G-10 Material). For recommended footprint and soldering techniques refer to
application note #AN-994
Ris measured at TJ approximately 90°C.
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2015-11-23
AUIRFR3806
1000
100
BOTTOM
1000
VGS
15V
10V
8.0V
6.0V
5.5V
5.0V
4.8V
4.5V
VGS
15V
10V
8.0V
6.0V
5.5V
5.0V
4.8V
4.5V
TOP
ID, Drain-to-Source Current (A)
ID, Drain-to-Source Current (A)
TOP
100
10
4.5V
60µs PULSE WIDTH
BOTTOM
4.5V
10
60µs PULSE WIDTH
Tj = 25°C
Tj = 175°C
1
0.1
1
10
1
100
0.1
V DS, Drain-to-Source Voltage (V)
1
10
100
V DS, Drain-to-Source Voltage (V)
Fig. 2 Typical Output Characteristics
Fig. 1 Typical Output Characteristics
2.5
100
T J = 175°C
10
T J = 25°C
1
VDS = 25V
60µs PULSE WIDTH
ID = 25A
VGS = 10V
2.0
(Normalized)
R DS(on) , Drain-to-Source On Resistance
ID, Drain-to-Source Current (A)
1000
3
4
5
6
7
8
1.0
0.5
0.1
2
1.5
-60 -40 -20 0 20 40 60 80 100 120 140 160 180
9
T J , Junction Temperature (°C)
VGS , Gate-to-Source Voltage (V)
Fig. 4 Normalized On-Resistance vs. Temperature
Fig. 3 Typical Transfer Characteristics
10000
12.0
VGS = 0V,
f = 1 MHZ
Ciss = Cgs + Cgd, C ds SHORTED
Crss = Cgd
VGS , Gate-to-Source Voltage (V)
ID= 25A
C, Capacitance (pF)
Coss = Cds + Cgd
Ciss
1000
C oss
Crss
100
10
VDS = 48V
VDS = 30V
10.0
VDS = 12V
8.0
6.0
4.0
2.0
0.0
1
10
100
0
5
10
15
20
25
VDS , Drain-to-Source Voltage (V)
Q G , Total Gate Charge (nC)
Fig 5. Typical Capacitance vs. Drain-to-Source Voltage
Fig 6. Typical Gate Charge vs. Gate-to-Source Voltage
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AUIRFR3806
1000
1000
ID, Drain-to-Source Current (A)
ISD, Reverse Drain Current (A)
OPERATION IN THIS AREA
LIMITED BY R DS (on)
100
T J = 175°C
10
T J = 25°C
1
100
100µsec
1msec
10
10msec
1
Tc = 25°C
Tj = 175°C
Single Pulse
VGS = 0V
0.1
0.1
0.0
0.5
1.0
1.5
1
2.0
Fig. 7 Typical Source-to-Drain Diode Forward Voltage
40
ID, Drain Current (A)
35
30
25
20
15
10
5
0
50
75
100
125
150
175
80
Id = 5mA
75
70
65
60
-60 -40 -20 0 20 40 60 80 100 120 140 160 180
T J , Temperature ( °C )
T C , Case Temperature (°C)
Fig. 9 Maximum Drain Current vs. Case Temperature
Fig 10. Drain-to-Source Breakdown Voltage
300
EAS , Single Pulse Avalanche Energy (mJ)
0.4
0.3
0.3
Energy (µJ)
100
Fig 8. Maximum Safe Operating Area
V(BR)DSS , Drain-to-Source Breakdown Voltage (V)
45
25
10
VDS , Drain-to-Source Voltage (V)
VSD , Source-to-Drain Voltage (V)
0.2
0.2
0.1
0.1
0.0
-10
0
10
20
30
40
50
60
70
VDS, Drain-to-Source Voltage (V)
Fig. 11 Typical COSS Stored Energy
4
DC
ID
2.8A
5.1A
BOTTOM 25A
TOP
250
200
150
100
50
0
25
50
75
100
125
150
175
Starting T J , Junction Temperature (°C)
Fig 12. Maximum Avalanche Energy vs. Drain Current
2015-11-23
AUIRFR3806
Thermal Response ( Z thJC ) °C/W
10
D = 0.50
1
0.20
0.10
0.05
0.1
J
0.02
0.01
R1
R1
J
1
R2
R2
R3
R3
Ri (°C/W)
C
2
1
2
Ci= iRi
Ci= iRi
3
3
C
i (sec)
0.6086
0.00026
0.9926
0.001228
0.5203
0.00812
0.01
Notes:
1. Duty Factor D = t1/t2
2. Peak Tj = P dm x Zthjc + Tc
SINGLE PULSE
( THERMAL RESPONSE )
0.001
1E-006
1E-005
0.0001
0.001
0.01
0.1
t1 , Rectangular Pulse Duration (sec)
Fig 13. Maximum Effective Transient Thermal Impedance, Junction-to-Case
100
Duty Cycle = Single Pulse
Allowed avalanche Current vs avalanche
pulsewidth, tav, assuming Tj = 150°C and
Tstart =25°C (Single Pulse)
Avalanche Current (A)
0.01
10
0.05
0.10
1
Allowed avalanche Current vs avalanche
pulsewidth, tav, assuming j = 25°C and
Tstart = 150°C.
0.1
1.0E-06
1.0E-05
1.0E-04
1.0E-03
1.0E-02
1.0E-01
tav (sec)
Fig 14. Typical Avalanche Current Vs. Pulse width
EAR , Avalanche Energy (mJ)
80
TOP
Single Pulse
BOTTOM 1.0% Duty Cycle
ID = 25A
60
40
20
0
25
50
75
100
125
150
Starting T J , Junction Temperature (°C)
175
Notes on Repetitive Avalanche Curves , Figures 14, 15:
(For further info, see AN-1005 at www.infineon.com)
1. Avalanche failures assumption:
Purely a thermal phenomenon and failure occurs at a temperature far in
excess of Tjmax. This is validated for every part type.
2. Safe operation in Avalanche is allowed as long as Tjmax is not exceeded.
3. Equation below based on circuit and waveforms shown in Figures 22a, 22b.
4. PD (ave) = Average power dissipation per single avalanche pulse.
5. BV = Rated breakdown voltage (1.3 factor accounts for voltage increase
during avalanche).
6. Iav = Allowable avalanche current.
7. T = Allowable rise in junction temperature, not to exceed Tjmax (assumed as
25°C in Figure 13, 14).
tav = Average time in avalanche.
D = Duty cycle in avalanche = tav ·f
ZthJC(D, tav) = Transient thermal resistance, see Figures 13)
Fig 15. Maximum Avalanche Energy Vs. Temperature
5
PD (ave) = 1/2 ( 1.3·BV·Iav) = T/ ZthJC
Iav = 2T/ [1.3·BV·Zth]
EAS (AR) = PD (ave)·tav
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AUIRFR3806
14
IF = 17A
V R = 51V
12
3.5
TJ = 25°C
TJ = 125°C
10
3.0
2.5
8
IRR (A)
VGS(th) , Gate threshold Voltage (V)
4.0
ID = 50µA
ID = 250µA
6
ID = 1.0mA
2.0
4
ID = 1.0A
1.5
2
1.0
0
-75 -50 -25 0
25 50 75 100 125 150 175 200
0
200
T J , Temperature ( °C )
600
800
1000
Fig. 17 - Typical Recovery Current vs. dif/dt
Fig 16. Threshold Voltage vs. Temperature
260
14
IF = 25A
V R = 51V
12
IF = 17A
VR = 51V
210
TJ = 25°C
TJ = 125°C
QRR (nC)
10
IRR (A)
400
diF /dt (A/µs)
8
6
TJ = 25°C
TJ = 125°C
160
110
4
60
2
10
0
0
200
400
600
800
0
1000
200
400
600
800
1000
diF /dt (A/µs)
diF /dt (A/µs)
Fig. 19 - Typical Stored Charge vs. dif/dt
Fig. 18 - Typical Recovery Current vs. dif/dt
260
IF = 25A
VR = 51V
QRR (nC)
210
TJ = 25°C
TJ = 125°C
160
110
60
10
0
200
400
600
800
1000
diF /dt (A/µs)
Fig. 20 - Typical Stored Charge vs. dif/dt
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AUIRFR3806
Fig 20. Peak Diode Recovery dv/dt Test Circuit for N-Channel HEXFET® Power MOSFETs
V(BR)DSS
15V
L
VDS
tp
DRIVER
D.U.T
RG
IAS
20V
tp
+
V
- DD
0.01
Fig 21a. Unclamped Inductive Test Circuit
Fig 22a. Switching Time Test Circuit
A
I AS
Fig 21b. Unclamped Inductive Waveforms
Fig 22b. Switching Time Waveforms
Id
Vds
Vgs
Vgs(th)
Qgs1 Qgs2
Fig 23a. Gate Charge Test Circuit
7
Qgd
Qgodr
Fig 23b. Gate Charge Waveform
2015-11-23
AUIRFR3806
D-Pak (TO-252AA) Package Outline (Dimensions are shown in millimeters (inches))
D-Pak (TO-252AA) Part Marking Information
Part Number
AUFR3806
YWWA
IR Logo
XX
Date Code
Y= Year
WW= Work Week
XX
Lot Code
Note: For the most current drawing please refer to IR website at http://www.irf.com/package/
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AUIRFR3806
D-Pak (TO-252AA) Tape & Reel Information (Dimensions are shown in millimeters (inches))
TR
TRR
16.3 ( .641 )
15.7 ( .619 )
12.1 ( .476 )
11.9 ( .469 )
FEED DIRECTION
TRL
16.3 ( .641 )
15.7 ( .619 )
8.1 ( .318 )
7.9 ( .312 )
FEED DIRECTION
NOTES :
1. CONTROLLING DIMENSION : MILLIMETER.
2. ALL DIMENSIONS ARE SHOWN IN MILLIMETERS ( INCHES ).
3. OUTLINE CONFORMS TO EIA-481 & EIA-541.
13 INCH
16 mm
NOTES :
1. OUTLINE CONFORMS TO EIA-481.
Note: For the most current drawing please refer to IR website at http://www.irf.com/package/
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AUIRFR3806
Qualification Information
Qualification Level
Moisture Sensitivity Level
Machine Model
Human Body Model
ESD
Charged Device Model
RoHS Compliant
Automotive
(per AEC-Q101)
Comments: This part number(s) passed Automotive qualification. Infineon’s
Industrial and Consumer qualification level is granted by extension of the higher
Automotive level.
D-Pak
MSL1
Class M3 (+/- 250V)†
AEC-Q101-002
Class H1A (+/- 500V)†
AEC-Q101-001
Class C5 (+/- 2000V)†
AEC-Q101-005
Yes
† Highest passing voltage.
Revision History
Date
11/23/2015
Comments
Updated datasheet with corporate template
Corrected ordering table on page 1.
Corrected typo on test condition Coss eff. VDS from “60V” to “48V” on page 2.
Updated typo on the fig.19 and fig.20, unit of y-axis from "A" to "nC" on page 6.
Corrected typo from Rthcs to RthJA (PCB Mount) on page 1.
Corrected typo RthJA from “62C/W” to “110C/W” on page 1.
Published by
Infineon Technologies AG
81726 München, Germany
© Infineon Technologies AG 2015
All Rights Reserved.
IMPORTANT NOTICE
The information given in this document shall in no event be regarded as a guarantee of conditions or characteristics
(“Beschaffenheitsgarantie”). With respect to any examples, hints or any typical values stated herein and/or any
information regarding the application of the product, Infineon Technologies hereby disclaims any and all warranties and
liabilities of any kind, including without limitation warranties of non-infringement of intellectual property rights of any third
party.
In addition, any information given in this document is subject to customer’s compliance with its obligations stated in this
document and any applicable legal requirements, norms and standards concerning customer’s products and any use of
the product of Infineon Technologies in customer’s applications.
The data contained in this document is exclusively intended for technically trained staff. It is the responsibility of
customer’s technical departments to evaluate the suitability of the product for the intended application and the
completeness of the product information given in this document with respect to such application.
For further information on the product, technology, delivery terms and conditions and prices please contact your nearest
Infineon Technologies office (www.infineon.com).
WARNINGS
Due to technical requirements products may contain dangerous substances. For information on the types in question
please contact your nearest Infineon Technologies office.
Except as otherwise explicitly approved by Infineon Technologies in a written document signed by authorized
representatives of Infineon Technologies, Infineon Technologies’ products may not be used in any applications where a
failure of the product or any consequences of the use thereof can reasonably be expected to result in personal injury.
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