AUIRFR4292
AUIRFU4292
AUTOMOTIVE GRADE
Features
Advanced Process Technology
Low On-Resistance
175°C Operating Temperature
Fast Switching
Repetitive Avalanche Allowed up to Tjmax
Lead-Free, RoHS Compliant
Automotive Qualified *
Description
Specifically designed for Automotive applications, this HEXFET®
Power MOSFET utilizes the latest processing techniques to
achieve extremely low on-resistance per silicon area. Additional
features of this design are a 175°C junction operating temperature,
fast switching speed and improved repetitive avalanche rating .
These features combine to make this design an extremely efficient
and reliable device for use in Automotive applications and a wide
variety of other applications.
Base part number
Package Type
AUIRFU4292
I-Pak
AUIRFR4292
D-Pak
VDSS
RDS(on)
250V
typ.
275m
max.
345m
9.3A
ID
D
D
G
S
G
I-Pak
AUIRFU4292
D-Pak
AUIRFR4292
G
Gate
S
D
D
Drain
S
Source
Standard Pack
Orderable Part Number
Form
Quantity
Tube
75
AUIRFU4292
Tube
75
AUIRFR4292
Tape and Reel Left
3000
AUIRFR4292TRL
Tape and Reel Right
3000
AUIRFR4292TRR
Note
EOL notice # 530
Absolute Maximum Ratings
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress
ratings only; and functional operation of the device at these or any other condition beyond those indicated in the specifications is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. The thermal resistance
and power dissipation ratings are measured under board mounted and still air conditions. Ambient temperature (TA) is 25°C, unless
otherwise specified.
Symbol
Parameter
ID @ TC = 25°C
Continuous Drain Current, VGS @ 10V
9.3
ID @ TC = 100°C
IDM
PD @TC = 25°C
Continuous Drain Current, VGS @ 10V
Pulsed Drain Current
Maximum Power Dissipation
6.6
40
100
VGS
EAS
EAS (Tested)
IAR
EAR
TJ
TSTG
Linear Derating Factor
Gate-to-Source Voltage
Single Pulse Avalanche Energy (Thermally Limited)
Single Pulse Avalanche Energy Tested Value
Avalanche Current
Repetitive Avalanche Energy
Operating Junction and
Storage Temperature Range
Soldering Temperature, for 10 seconds (1.6mm from case)
Thermal Resistance
Symbol
RJC
RJA
RJA
Parameter
Junction-to-Case
Junction-to-Ambient ( PCB Mount)
Junction-to-Ambient
Max.
Units
A
W
0.67
± 20
130
97
See Fig.15,16, 12a, 12b
W/°C
V
mJ
A
mJ
-55 to + 175
300
°C
Typ.
Max.
Units
–––
–––
–––
1.5
50
110
°C/W
HEXFET® is a registered trademark of Infineon.
*Qualification standards can be found at www.infineon.com
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AUIRFR/U4292
Static @ TJ = 25°C (unless otherwise specified)
V(BR)DSS
V(BR)DSS/TJ
RDS(on)
VGS(th)
gfs
Parameter
Drain-to-Source Breakdown Voltage
Breakdown Voltage Temp. Coefficient
Static Drain-to-Source On-Resistance
Gate Threshold Voltage
Forward Trans conductance
IDSS
Drain-to-Source Leakage Current
IGSS
Gate-to-Source Forward Leakage
Gate-to-Source Reverse Leakage
Min.
250
–––
–––
3.0
6.2
–––
–––
–––
–––
Typ. Max. Units
Conditions
––– –––
V VGS = 0V, ID = 250µA
0.31 ––– V/°C Reference to 25°C, ID = 1mA
275 345 m VGS = 10V, ID = 5.6A
–––
5.0
V VDS = VGS, ID = 50µA
––– –––
S VDS = 50V, ID = 5.6A
–––
20
VDS = 250 V, VGS = 0V
µA
––– 250
VDS = 250V,VGS = 0V,TJ =125°C
––– 200
VGS = 20V
nA
––– -200
VGS = -20V
Dynamic Electrical Characteristics @ TJ = 25°C (unless otherwise specified)
Qg
Qgs
Qgd
td(on)
tr
td(off)
tf
Total Gate Charge
Gate-to-Source Charge
Gate-to-Drain Charge
Turn-On Delay Time
Rise Time
Turn-Off Delay Time
Fall Time
–––
–––
–––
–––
–––
–––
–––
13
4.7
4.8
11
15
16
8.4
20
–––
–––
–––
–––
–––
–––
LD
Internal Drain Inductance
–––
4.5
–––
LS
Internal Source Inductance
–––
7.5
–––
–––
–––
–––
–––
–––
–––
705
71
20
600
26
65
–––
–––
–––
–––
–––
–––
Min.
Typ. Max. Units
–––
–––
9.3
–––
–––
40
–––
–––
–––
–––
110
390
1.3
165
585
Ciss
Input Capacitance
Coss
Output Capacitance
Crss
Reverse Transfer Capacitance
Output Capacitance
Coss
Coss
Output Capacitance
Effective Output Capacitance
Coss eff.
Diode Characteristics
Parameter
Continuous Source Current
IS
(Body Diode)
Pulsed Source Current
ISM
(Body Diode)
VSD
Diode Forward Voltage
Reverse Recovery Time
trr
Qrr
Reverse Recovery Charge
ton
Forward Turn-On Time
ID = 5.6A
nC VDS = 125V
VGS = 10V
VDD = 250V
ID = 5.6A
ns
RG = 15
VGS = 10V
Between lead,
6mm (0.25in.)
nH
from package
and center of die contact
VGS = 0V
VDS = 25V
ƒ = 1.0MHz
pF
VGS = 0V, VDS = 1.0V ƒ = 1.0MHz
VGS = 0V, VDS = 200V ƒ = 1.0MHz
VGS = 0V, VDS = 0V to 200V
Conditions
MOSFET symbol
showing the
A
integral reverse
p-n junction diode.
V TJ = 25°C,IS = 5.6A,VGS = 0V
ns TJ = 25°C ,IF = 5.6A, VDD = 125V
nC di/dt = 100A/µs
Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
Notes:
Repetitive rating; pulse width limited by max. junction temperature. (See fig. 11)
Limited by TJmax , starting TJ = 25°C, L = 8.1mH, RG = 50, IAS = 5.6A, VGS =10V. Part not recommended for use above this value.
Pulse width 1.0ms; duty cycle 2%.
Coss eff. is a fixed capacitance that gives the same charging time as Coss while VDS is rising from 0 to 80% VDSS
Limited by TJmax , see Fig.12a, 12b, 15, 16 for typical repetitive avalanche performance.
This value determined from sample failure population. starting TJ = 25°C, L = 8.1mH, RG = 50, IAS = 5.6A, VGS =10V.
When mounted on 1" square PCB (FR-4 or G-10 Material). For recommended footprint and soldering techniques refer to
application note #AN-994
R is measured at TJ approximately 90°C
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100
100
10
BOTTOM
TOP
ID, Drain-to-Source Current (A)
ID, Drain-to-Source Current (A)
TOP
VGS
15V
10V
8.0V
7.5V
7.0V
6.5V
6.0V
5.5V
1
0.1
5.5V
60µs PULSE WIDTH
10
BOTTOM
VGS
15V
10V
8.0V
7.5V
7.0V
6.5V
6.0V
5.5V
5.5V
1
60µs PULSE WIDTH
Tj = 175°C
Tj = 25°C
0.01
0.1
0.1
1
10
100
0.1
V DS, Drain-to-Source Voltage (V)
100
100
16
Gfs, Forward Transconductance (S)
ID, Drain-to-Source Current (A)
10
Fig. 2 Typical Output Characteristics
Fig. 1 Typical Output Characteristics
T J = 175°C
10
T J = 25°C
VDS = 50V
60µs PULSE WIDTH
1.0
4
5
6
7
8
9
10
VGS, Gate-to-Source Voltage (V)
Fig. 3 Typical Transfer Characteristics
3
1
V DS, Drain-to-Source Voltage (V)
14
T J = 25°C
12
10
8
T J = 175°C
6
4
V DS = 10V
2
380µs PULSE WIDTH
0
0
1
2
3
4
5
6
ID,Drain-to-Source Current (A)
Fig. 4 Typical Forward Transconductance
Vs. Drain Current
2015-10-12
AUIRFR/U4292
100000
ID= 5.6A
VGS, Gate-to-Source Voltage (V)
Crss = C gd
10000
C, Capacitance (pF)
14.0
VGS = 0V,
f = 1 MHZ
Ciss = C gs + Cgd, C ds SHORTED
Coss = Cds + Cgd
1000
C iss
C oss
100
Crss
10
1
12.0
VDS = 200V
VDS = 125V
VDS = 50V
10.0
8.0
6.0
4.0
2.0
0.0
1
10
100
1000
0
VDS, Drain-to-Source Voltage (V)
6
8
10
12
14
16
18
Fig 6. Typical Gate Charge vs.
Gate-to-Source Voltage
100
ID, Drain-to-Source Current (A)
100
ISD, Reverse Drain Current (A)
4
QG, Total Gate Charge (nC)
Fig 5. Typical Capacitance vs.
Drain-to-Source Voltage
T J = 175°C
10
T J = 25°C
OPERATION IN THIS AREA
LIMITED BY R DS (on)
100µsec
10
1
1msec
10msec
0.1
Tc = 25°C
Tj = 175°C
Single Pulse
VGS = 0V
DC
0.01
1.0
0.4
0.5
0.6
0.7
0.8
0.9
1.0
VSD , Source-to-Drain Voltage (V)
Fig. 7 Typical Source-to-Drain Diode
Forward Voltage
4
2
1.1
1
10
100
VDS , Drain-to-Source Voltage (V)
Fig 8. Maximum Safe Operating Area
2015-10-12
AUIRFR/U4292
3.5
R DS(on) , Drain-to-Source On Resistance
(Normalized)
10
ID, Drain Current (A)
8
6
4
2
ID = 9.3A
VGS = 10V
3.0
2.5
2.0
1.5
1.0
0.5
0.0
0
25
50
75
100
125
150
-60 -40 -20 0 20 40 60 80 100 120 140160 180
175
T J , Junction Temperature (°C)
T C , Case Temperature (°C)
Fig 9. Maximum Drain Current Vs.
Case Temperature
Fig 10. Normalized On-Resistance
Vs. Temperature
Thermal Response ( Z thJC ) °C/W
10
1
D = 0.50
0.20
0.10
0.05
0.1
0.02
0.01
0.01
Notes:
1. Duty Factor D = t1/t2
2. Peak Tj = P dm x Zthjc + Tc
SINGLE PULSE
( THERMAL RESPONSE )
0.001
1E-006
1E-005
0.0001
0.001
0.01
0.1
t1 , Rectangular Pulse Duration (sec)
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case
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AUIRFR/U4292
15V
+
V
- DD
IAS
20V
0.01
tp
Fig 12a. Unclamped Inductive Test Circuit
V(BR)DSS
tp
A
EAS , Single Pulse Avalanche Energy (mJ)
D.U.T
RG
600
DRIVER
L
VDS
ID
1.0A
2.2A
BOTTOM 5.6A
TOP
500
400
300
200
100
0
25
50
75
100
125
150
175
Starting T J , Junction Temperature (°C)
Fig 12c. Maximum Avalanche Energy
vs. Drain Current
I AS
Fig 12b. Unclamped Inductive Waveforms
5.5
Vds
Vgs
Vgs(th)
Qgs1 Qgs2
Qgd
Qgodr
Fig 13a. Gate Charge Waveform
VGS(th) , Gate threshold Voltage (V)
Id
5.0
4.5
4.0
3.5
3.0
ID = 50µA
ID = 250µA
ID = 1.0mA
ID = 1.0A
2.5
2.0
-75 -50 -25
0
25 50 75 100 125 150 175
T J , Temperature ( °C )
Fig 14. Threshold Voltage Vs. Temperature
Fig 13b. Gate Charge Test Circuit
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AUIRFR/U4292
100
Allowed avalanche Current vs avalanche
pulsewidth, tav, assuming Tj = 150°C and
Tstart =25°C (Single Pulse)
Avalanche Current (A)
Duty Cycle = Single Pulse
10
0.01
0.05
1
0.10
Allowed avalanche Current vs avalanche
pulsewidth, tav, assuming j = 25°C and
Tstart = 150°C.
0.1
1.0E-06
1.0E-05
1.0E-04
1.0E-03
1.0E-02
1.0E-01
tav (sec)
Fig 15. Typical Avalanche Current Vs. Pulse width
Notes on Repetitive Avalanche Curves , Figures 15, 16:
140
120
EAR , Avalanche Energy (mJ)
(For further info, see AN-1005 at www.infineon.com)
TOP
Single Pulse
BOTTOM 1.0% Duty Cycle
ID = 5.6A
1. Avalanche failures assumption:
Purely a thermal phenomenon and failure occurs at a temperature far in
excess of Tjmax. This is validated for every part type.
2. Safe operation in Avalanche is allowed as long as Tjmax is not exceeded.
3. Equation below based on circuit and waveforms shown in Figures 12a, 12b.
4. PD (ave) = Average power dissipation per single avalanche pulse.
100
80
60
5. BV = Rated breakdown voltage (1.3 factor accounts for voltage increase
during avalanche).
6. Iav = Allowable avalanche current.
40
7. T = Allowable rise in junction temperature, not to exceed Tjmax (assumed as
20
0
25
50
75
100
125
150
175
Starting T J , Junction Temperature (°C)
25°C in Figure 15, 16).
tav = Average time in avalanche.
D = Duty cycle in avalanche = tav ·f
ZthJC(D, tav) = Transient thermal resistance, see Figures 13)
PD (ave) = 1/2 ( 1.3·BV·Iav) = T/ ZthJC
Iav = 2T/ [1.3·BV·Zth]
Fig 16. Maximum Avalanche Energy
Vs. Temperature
7
EAS (AR) = PD (ave)·tav
2015-10-12
AUIRFR/U4292
Fig 17. Peak Diode Recovery dv/dt Test Circuit for N-Channel HEXFET® Power MOSFETs
Fig 18a. Switching Time Test Circuit
8
Fig 18b. Switching Time Waveforms
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AUIRFR/U4292
D-Pak (TO-252AA) Package Outline (Dimensions are shown in millimeters (inches))
D-Pak (TO-252AA) Part Marking Information
Part Number
AUFR4292
YWWA
IR Logo
XX
Date Code
Y= Year
WW= Work Week
XX
Lot Code
Note: For the most current drawing please refer to IR website at http://www.irf.com/package/
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2015-10-12
AUIRFR/U4292
I-Pak (TO-251AA) Package Outline (Dimensions are shown in millimeters (inches)
I-Pak (TO-251AA) Part Marking Information
Part Number
AUFU4292
YWWA
IR Logo
XX
Date Code
Y= Year
WW= Work Week
XX
Lot Code
Note: For the most current drawing please refer to IR website at http://www.irf.com/package/
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2015-10-12
AUIRFR/U4292
D-Pak (TO-252AA) Tape & Reel Information (Dimensions are shown in millimeters (inches))
TR
TRR
16.3 ( .641 )
15.7 ( .619 )
12.1 ( .476 )
11.9 ( .469 )
FEED DIRECTION
TRL
16.3 ( .641 )
15.7 ( .619 )
8.1 ( .318 )
7.9 ( .312 )
FEED DIRECTION
NOTES :
1. CONTROLLING DIMENSION : MILLIMETER.
2. ALL DIMENSIONS ARE SHOWN IN MILLIMETERS ( INCHES ).
3. OUTLINE CONFORMS TO EIA-481 & EIA-541.
13 INCH
16 mm
NOTES :
1. OUTLINE CONFORMS TO EIA-481.
Note: For the most current drawing please refer to IR website at http://www.irf.com/package/
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AUIRFR/U4292
Qualification Information
Qualification Level
Moisture Sensitivity Level
Machine Model
Human Body Model
ESD
Charged Device Model
RoHS Compliant
Automotive
(per AEC-Q101)
Comments: This part number(s) passed Automotive qualification. Infineon’s
Industrial and Consumer qualification level is granted by extension of the higher
Automotive level.
D-Pak
MSL1
I-Pak
Class M1B (+/- 100V)†
AEC-Q101-002
Class H1A (+/- 500V)†
AEC-Q101-001
Class C5 (+/- 2000V)†
AEC-Q101-005
Yes
† Highest passing voltage.
Revision History
Date
9/2/2014
10/12/2015
Comments
Updated datasheet with IR corporate tempalte.
Updated SOA curve Fig 8 from "50V" VDS to "250V" on page 4.
Updated Package outline on page 9 & 10
Updated ordering information to reflect the End-Of-life (EOL) of the option (EOL notice #530)
Updated datasheet with corporate template
Corrected ordering table on page 1.
Published by
Infineon Technologies AG
81726 München, Germany
© Infineon Technologies AG 2015
All Rights Reserved.
IMPORTANT NOTICE
The information given in this document shall in no event be regarded as a guarantee of conditions or characteristics
(“Beschaffenheitsgarantie”). With respect to any examples, hints or any typical values stated herein and/or any
information regarding the application of the product, Infineon Technologies hereby disclaims any and all warranties and
liabilities of any kind, including without limitation warranties of non-infringement of intellectual property rights of any third
party.
In addition, any information given in this document is subject to customer’s compliance with its obligations stated in this
document and any applicable legal requirements, norms and standards concerning customer’s products and any use of
the product of Infineon Technologies in customer’s applications.
The data contained in this document is exclusively intended for technically trained staff. It is the responsibility of
customer’s technical departments to evaluate the suitability of the product for the intended application and the
completeness of the product information given in this document with respect to such application.
For further information on the product, technology, delivery terms and conditions and prices please contact your nearest
Infineon Technologies office (www.infineon.com).
WARNINGS
Due to technical requirements products may contain dangerous substances. For information on the types in question
please contact your nearest Infineon Technologies office.
Except as otherwise explicitly approved by Infineon Technologies in a written document signed by authorized
representatives of Infineon Technologies, Infineon Technologies’ products may not be used in any applications where a
failure of the product or any consequences of the use thereof can reasonably be expected to result in personal injury.
12
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