AUIRFS4010-7P

AUTOMOTIVE GRADE   AUIRFS4010-7P HEXFET® Power MOSFET   Features  Advanced Process Technology  Ultra Low On-Resistance  Enhanced dV/dT and dI/dT capability  175°C Operating Temperature  Fast Switching  Repetitive Avalanche Allowed up to Tjmax  Lead-Free, RoHS Compliant  Automotive Qualified * Package Type AUIRFS4010-7P D2Pak 7 Pin 100V RDS(on) typ. 3.3m max. 4.0m 190A ID   Description Specifically designed for Automotive applications, this HEXFET® Power MOSFET utilizes the latest processing techniques to achieve extremely low on-resistance per silicon area. Additional features of this design are a 175°C junction operating temperature, fast switching speed and improved repetitive avalanche rating . These features combine to make this design an extremely efficient and reliable device for use in Automotive applications and a wide variety of other applications. Base Part Number VDSS D2Pak 7 Pin AUIRFS4010-7P G D S Gate Drain Source Standard Pack Form Quantity Tube 50 Tape and Reel Left 800 Orderable Part Number AUIRFS4010-7P AUIRFS4010-7TRL Absolute Maximum Ratings Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only; and functional operation of the device at these or any other condition beyond those indicated in the specifications is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. The thermal resistance and power dissipation ratings are measured under board mounted and still air conditions. Ambient temperature (TA) is 25°C, unless otherwise specified. Symbol Parameter ID @ TC = 25°C Continuous Drain Current, VGS @ 10V 190 ID @ TC = 100°C IDM PD @TC = 25°C Continuous Drain Current, VGS @ 10V Pulsed Drain Current  Maximum Power Dissipation 130 740 380 VGS EAS IAR EAR dv/dt TJ TSTG Linear Derating Factor Gate-to-Source Voltage Single Pulse Avalanche Energy (Thermally Limited)  Avalanche Current  Repetitive Avalanche Energy  Peak Diode Recovery  Operating Junction and Storage Temperature Range Soldering Temperature, for 10 seconds (1.6mm from case) Thermal Resistance   Symbol RJC RJA Parameter Junction-to-Case  Junction-to-Ambient  Max. Units A W 2.5 ± 20 330 See Fig.14,15, 22a, 22b W/°C V mJ A mJ V/ns 26 -55 to + 175   300   °C  Typ. Max. Units ––– ––– 0.40 40 °C/W HEXFET® is a registered trademark of Infineon. *Qualification standards can be found at www.infineon.com 1 2015-10-27 AUIRFS4010-7P   Static @ TJ = 25°C (unless otherwise specified) Parameter Min. Typ. Max. Units 100 ––– ––– V(BR)DSS/TJ Breakdown Voltage Temp. Coefficient ––– 0.11 ––– V/°C Reference to 25°C, ID = 5mA  RDS(on) Static Drain-to-Source On-Resistance ––– 3.3 4.0 m VGS = 10V, ID = 110A  VGS(th) Gate Threshold Voltage 2.0 ––– 4.0 V gfs RG Forward Trans conductance Gate Resistance IDSS Drain-to-Source Leakage Current 210 ––– ––– ––– 2.1 ––– ––– ––– 20 ––– ––– 250 S VDS = 25V, ID = 110A  VDS = 100V, VGS = 0V µA VDS = 100V,VGS = 0V,TJ =125°C IGSS Gate-to-Source Forward Leakage Gate-to-Source Reverse Leakage ––– ––– ––– ––– 100 -100 V(BR)DSS Drain-to-Source Breakdown Voltage V nA Conditions VGS = 0V, ID = 250µA VDS = VGS, ID = 250µA VGS = 20V VGS = -20V Dynamic Electrical Characteristics @ TJ = 25°C (unless otherwise specified) Qg Qgs Qgd Qsync td(on) tr td(off) tf Ciss Coss Total Gate Charge Gate-to-Source Charge Gate-to-Drain Charge Total Gate Charge Sync. (Qg - Qgd) Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Input Capacitance Output Capacitance ––– ––– ––– ––– ––– ––– ––– ––– ––– ––– 150 36 48 102 19 56 100 48 9830 650 230 ––– ––– ––– ––– ––– ––– ––– ––– ––– Crss Reverse Transfer Capacitance ––– 260 ––– Coss eff.(ER) Effective Output Capacitance (Energy Related) ––– 730 ––– VDD = 65V ID = 110A ns RG= 2.7 VGS = 10V VGS = 0V VDS = 50V pF   ƒ = 1.0MHz VGS = 0V, VDS = 0V to 80V Coss eff.(TR) Effective Output Capacitance (Time Related) ––– 740 ––– VGS = 0V, VDS = 0V to 80V Min. Typ. Max. Units ––– ––– 186 ––– ––– 740 ––– ––– ––– ––– ––– ––– ––– 60 67 150 180 4.7 1.3 ––– ––– ––– ––– ––– Diode Characteristics   Parameter Continuous Source Current IS (Body Diode) Pulsed Source Current ISM (Body Diode) VSD Diode Forward Voltage trr Reverse Recovery Time Qrr Reverse Recovery Charge IRRM ton Reverse Recovery Current Forward Turn-On Time ID = 110A VDS = 50V nC   VGS = 10V Conditions MOSFET symbol showing the A integral reverse p-n junction diode. V TJ = 25°C,IS = 110A,VGS = 0V  TJ = 25°C VDD = 85V ns TJ = 125°C IF = 110A, TJ = 25°C di/dt = 100A/µs  nC   TJ = 125°C A TJ = 25°C  Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD) Notes: Repetitive rating; pulse width limited by max. junction temperature. Limited by TJmax, starting TJ = 25°C, L = 0.052mH, RG = 25, IAS = 110A, VGS =10V. Part not recommended for use above this value. ISD 110A, di/dt 1310A/µs, VDD V(BR)DSS, TJ  175°C. Pulse width 400µs; duty cycle  2%. Coss eff. (TR) is a fixed capacitance that gives the same charging time as Coss while VDS is rising from 0 to 80% VDSS. Coss eff. (ER) is a fixed capacitance that gives the same energy as Coss while VDS is rising from 0 to 80% VDSS. When mounted on 1" square PCB (FR-4 or G-10 Material). For recommended footprint and soldering techniques refer to application note #AN-994  R is measured at TJ approximately 90°C. RJC value shown is at time zero        2 2015-10-27 AUIRFS4010-7P   1000 1000 VGS 15V 10V 8.0V 7.0V 5.0V 4.5V 4.3V 4.0V 100 BOTTOM 10 BOTTOM 100 1 60µs PULSE WIDTH Tj = 25°C 4.0V 4.0V 0.1 Tj = 175°C 1 10 100 0.1 V DS, Drain-to-Source Voltage (V) 10 100 Fig. 2 Typical Output Characteristics 2.5 100 T J = 175°C T J = 25°C 10 1 VDS = 50V 60µs PULSE WIDTH 0.1 ID = 110A VGS = 10V 2.0 (Normalized) R DS(on) , Drain-to-Source On Resistance 1000 ID, Drain-to-Source Current (A) 1 V DS, Drain-to-Source Voltage (V) Fig. 1 Typical Output Characteristics 1.5 1.0 0.5 2 3 4 5 6 7 -60 -40 -20 0 20 40 60 80 100 120 140160 180 T J , Junction Temperature (°C) VGS , Gate-to-Source Voltage (V) Fig. 4 Normalized On-Resistance vs. Temperature Fig. 3 Typical Transfer Characteristics 100000 14.0 VGS = 0V, f = 1 MHZ Ciss = Cgs + Cgd, C ds SHORTED Crss = Cgd VGS, Gate-to-Source Voltage (V) ID = 110A Coss = Cds + Cgd C, Capacitance (pF) 60µs PULSE WIDTH 10 0.1 Ciss 10000 Coss 1000 Crss 100 1 10 100 1000 VDS , Drain-to-Source Voltage (V) Fig 5. Typical Capacitance vs. Drain-to-Source Voltage 3 VGS 15V 10V 8.0V 7.0V 5.0V 4.5V 4.3V 4.0V TOP ID, Drain-to-Source Current (A) ID, Drain-to-Source Current (A) TOP 12.0 VDS = 80V VDS = 50V 10.0 8.0 6.0 4.0 2.0 0.0 0 25 50 75 100 125 150 175 200 225 QG, Total Gate Charge (nC) Fig 6. Typical Gate Charge vs. Gate-to-Source Voltage 2015-10-27 AUIRFS4010-7P   ISD, Reverse Drain Current (A) 1000 100 T J = 175°C 10 T J = 25°C 1 VGS = 0V 0.1 0.0 0.5 1.0 1.5 VSD , Source-to-Drain Voltage (V) Fig 8. Maximum Safe Operating Area V(BR)DSS , Drain-to-Source Breakdown Voltage (V) Fig. 7 Typical Source-to-Drain Diode Forward Voltage 200 180 ID, Drain Current (A) 160 140 120 100 80 60 40 20 0 25 50 75 100 125 150 125 Id = 5mA 120 115 110 105 100 95 -60 -40 -20 0 20 40 60 80 100 120 140160 180 175 T J , Temperature ( °C ) T C , Case Temperature (°C) Fig 9. Maximum Drain Current vs. Case Temperature 6.0 EAS , Single Pulse Avalanche Energy (mJ) 1400 1000 4.0 Energy (µJ) ID 21A 38A BOTTOM 110A TOP 1200 5.0 3.0 2.0 1.0 0.0 0 800 600 400 200 0 10 20 30 40 50 60 70 80 90 100 110 25 VDS, Drain-to-Source Voltage (V) 50 75 100 125 150 175 Starting T J , Junction Temperature (°C) Fig 12. Maximum Avalanche Energy vs. Drain Current Fig 11. Typical COSS Stored Energy 4 Fig 10. Drain-to-Source Breakdown Voltage   2015-10-27 AUIRFS4010-7P   Thermal Response ( Z thJC ) °C/W 1 D = 0.50 0.1 0.20 0.10 0.05 J 0.02 0.01 0.01 R1 R1 J 1 R2 R2 R3 R3 Ri (°C/W) R4 R4 C 1 2 2 3 3 4 C 4 Ci= iRi Ci= iRi 0.001 SINGLE PULSE ( THERMAL RESPONSE ) 0.0001 1E-006 I (sec) 0.02001 0.000025 0.05145 0.000094 0.19436 0.002047 0.13433 0.012818 Notes: 1. Duty Factor D = t1/t2 2. Peak Tj = P dm x Zthjc + Tc 1E-005 0.0001 0.001 0.01 0.1 t1 , Rectangular Pulse Duration (sec) Fig 13. Maximum Effective Transient Thermal Impedance, Junction-to-Case 1000 Avalanche Current (A) Duty Cycle = Single Pulse 100 10 Allowed avalanche Current vs avalanche pulsewidth, tav, assuming Tj = 150°C and Tstart =25°C (Single Pulse) 0.01 0.05 0.10 1 Allowed avalanche Current vs avalanche pulsewidth, tav, assuming  j = 25°C and Tstart = 150°C. 0.1 1.0E-06 1.0E-05 1.0E-04 1.0E-03 1.0E-02 1.0E-01 tav (sec) Fig 14. Avalanche Current vs. Pulse width 400 TOP Single Pulse BOTTOM 1.0% Duty Cycle ID = 110A EAR , Avalanche Energy (mJ) 350 300 250 200 150 100 50 0 25 50 75 100 125 150 175 Starting T J , Junction Temperature (°C) Fig 15. Maximum Avalanche Energy vs. Temperature   5 Notes on Repetitive Avalanche Curves , Figures 14, 15: (For further info, see AN-1005 at www.infineon.com) 1. Avalanche failures assumption: Purely a thermal phenomenon and failure occurs at a temperature far in excess of Tjmax. This is validated for every part type. 2. Safe operation in Avalanche is allowed as long as Tjmax is not exceeded. 3. Equation below based on circuit and waveforms shown in Figures 18a, 18b. 4. PD (ave) = Average power dissipation per single avalanche pulse. 5. BV = Rated breakdown voltage (1.3 factor accounts for voltage increase during avalanche). 6. Iav = Allowable avalanche current. 7. T = Allowable rise in junction temperature, not to exceed Tjmax (assumed as 25°C in Figure 13, 14). tav = Average time in avalanche. D = Duty cycle in avalanche = tav ·f ZthJC(D, tav) = Transient thermal resistance, see Figures 13) PD (ave) = 1/2 ( 1.3·BV·Iav) = T/ ZthJC Iav = 2T/ [1.3·BV·Zth] EAS (AR) = PD (ave)·tav 2015-10-27 AUIRFS4010-7P   30 4.0 3.5 3.0 IRR (A) VGS(th) , Gate threshold Voltage (V) 4.5 ID = 250µA ID = 1.0mA 2.5 20 TJ = 25°C TJ = 125°C 15 10 ID = 1.0A 2.0 25 IF = 74A V R = 85V 5 1.5 0 1.0 -75 -50 -25 0 0 25 50 75 100 125 150 175 200 Fig 16. Threshold Voltage vs. Temperature 1000 1000 IF = 74A VR = 85V 900 800 TJ = 25°C TJ = 125°C 700 QRR (nC) IRR (A) 20 TJ = 25°C TJ = 125°C 800 Fig. 17 - Typical Recovery Current vs. dif/dt 30 25 600 diF /dt (A/µs) T J , Temperature ( °C ) IF = 110A V R = 85V 400 15 10 600 500 400 300 5 200 0 0 200 400 600 800 100 1000 0 200 diF /dt (A/µs) 400 600 800 1000 diF /dt (A/µs) Fig. 18 - Typical Recovery Current vs. dif/dt Fig. 19 - Typical Stored Charge vs. dif/dt 1000 IF = 110A VR = 85V 900 TJ = 25°C TJ = 125°C QRR (nC) 800 700 600 500 400 300 200 0 200 400 600 800 1000 diF /dt (A/µs) Fig. 20 - Typical Stored Charge vs. dif/dt   6 2015-10-27 AUIRFS4010-7P   Fig 21. Peak Diode Recovery dv/dt Test Circuit for N-Channel HEXFET® Power MOSFETs V(BR)DSS 15V tp L VDS D.U.T RG IAS 20V tp DRIVER + V - DD A 0.01 Fig 22a. Unclamped Inductive Test Circuit Fig 23a. Switching Time Test Circuit I AS Fig 22b. Unclamped Inductive Waveforms Fig 23b. Switching Time Waveforms Id Vds Vgs Vgs(th) Qgs1 Qgs2 Fig 24a. Gate Charge Test Circuit   7 Qgd Qgodr Fig 24b. Gate Charge Waveform 2015-10-27 AUIRFS4010-7P   D2Pak - 7 Pin Package Outline (Dimensions are shown in millimeters (inches)) D2Pak - 7 Pin Part Marking Information Part Number AUFS4010-7P YWWA IR Logo XX  Date Code Y= Year WW= Work Week XX Lot Code Note: For the most current drawing please refer to IR website at http://www.irf.com/package/   8 2015-10-27 AUIRFS4010-7P   D2Pak - 7 Pin Tape and Reel Note: For the most current drawing please refer to IR website at http://www.irf.com/package/ 9 2015-10-27 AUIRFS4010-7P   Qualification Information Automotive (per AEC-Q101) Comments: This part number(s) passed Automotive qualification. Infineon’s Industrial and Consumer qualification level is granted by extension of the higher Automotive level. Qualification Level  Moisture Sensitivity Level   D2-Pak 7 Pin MSL1 Class M4 (+/- 800V)† AEC-Q101-002 Class H3A (+/- 6000V)† AEC-Q101-001 Class C5 (+/- 2000V)† AEC-Q101-005 Yes Machine Model Human Body Model   ESD Charged Device Model RoHS Compliant † Highest passing voltage. Revision History Date 3/10/2014 10/27/2015 Comments     Updated fig.8 SOA curve on page 5 Updated data sheet with new IR corporate template Updated datasheet with corporate template Corrected ordering table on page 1. Published by Infineon Technologies AG 81726 München, Germany © Infineon Technologies AG 2015 All Rights Reserved. IMPORTANT NOTICE The information given in this document shall in no event be regarded as a guarantee of conditions or characteristics (“Beschaffenheitsgarantie”). With respect to any examples, hints or any typical values stated herein and/or any information regarding the application of the product, Infineon Technologies hereby disclaims any and all warranties and liabilities of any kind, including without limitation warranties of non-infringement of intellectual property rights of any third party. In addition, any information given in this document is subject to customer’s compliance with its obligations stated in this document and any applicable legal requirements, norms and standards concerning customer’s products and any use of the product of Infineon Technologies in customer’s applications. The data contained in this document is exclusively intended for technically trained staff. It is the responsibility of customer’s technical departments to evaluate the suitability of the product for the intended application and the completeness of the product information given in this document with respect to such application. For further information on the product, technology, delivery terms and conditions and prices please contact your nearest Infineon Technologies office (www.infineon.com). WARNINGS Due to technical requirements products may contain dangerous substances. For information on the types in question please contact your nearest Infineon Technologies office. Except as otherwise explicitly approved by Infineon Technologies in a written document signed by authorized representatives of Infineon Technologies, Infineon Technologies’ products may not be used in any applications where a failure of the product or any consequences of the use thereof can reasonably be expected to result in personal injury.   10 2015-10-27