AUTOMOTIVE GRADE
Features
Advanced Process Technology
New Ultra Low On-Resistance
175°C Operating Temperature
Fast Switching
Repetitive Avalanche Allowed up to Tjmax
Lead-Free, RoHS Compliant
Automotive Qualified *
VDSS
Applications
Electric Power Steering (EPS)
Battery Switch
Start/Stop Micro Hybrid
Heavy Loads
DC-DC Applications
Package Type
AUIRFSA8409-7P
D2PAK-7TP
40V
RDS(on) typ.
max.
Description
Specifically designed for Automotive applications, this HEXFET®
Power MOSFET utilizes the latest processing techniques to achieve
extremely low on-resistance per silicon area. Additional features of
this design are a 175°C junction operating temperature, fast
switching speed and improved repetitive avalanche rating. These
features combine to make this design an extremely efficient and
reliable device for use in Automotive applications and wide variety
of other applications.
Base Part Number
AUIRFSA8409-7P
0.50m
ID (Silicon Limited)
0.69m
523A
ID (Package Limited)
360A
D2PAK-7TP
G
D
S
Gate
Drain
Source
Standard Pack
Form
Quantity
Tube
50
Tape and Reel Left
800
Complete Part Number
AUIRFSA8409-7P
AUIRFSA8409-7TRL
Absolute Maximum Ratings
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress
ratings only; and functional operation of the device at these or any other condition beyond those indicated in the specifications is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. The thermal resistance
and power dissipation ratings are measured under board mounted and still air conditions. Ambient temperature (TA) is 25°C, unless
otherwise specified.
Symbol
ID @ TC = 25°C
ID @ TC = 100°C
ID @ TC = 25°C
IDM
PD @TC = 25°C
VGS
TJ
TSTG
Parameter
Continuous Drain Current, VGS @ 10V (Silicon Limited)
Continuous Drain Current, VGS @ 10V (Silicon Limited)
Continuous Drain Current, VGS @ 10V (Wire Bond Limited)
Pulsed Drain Current
Maximum Power Dissipation
Linear Derating Factor
Gate-to-Source Voltage
Operating Junction and
Storage Temperature Range
Soldering Temperature, for 10 seconds (1.6mm from case)
Avalanche Characteristics
Single Pulse Avalanche Energy
EAS (Thermally Limited)
Single Pulse Avalanche Energy
EAS (Thermally Limited)
IAR
Avalanche Current
EAR
Repetitive Avalanche Energy
Max.
523
370
360
1440*
375
2.5
± 20
-55 to + 175
Units
300
A
W
W/°C
V
°C
743
mJ
1450
See Fig. 14, 15, 24a, 24b
A
mJ
HEXFET® is a registered trademark of Infineon.
*Qualification standards can be found at www.infineon.com
1
2016-01-11
AUIRFSA8409-7P
Thermal Resistance
Symbol
Parameter
Typ.
Max.
Units
Junction-to-Case
–––
0.4
RJC
°C/W
Junction-to-Ambient (PCB Mount)
–––
40
RJA
Static Electrical Characteristics @ TJ = 25°C (unless otherwise specified)
Symbol
Parameter
Min. Typ. Max. Units
Conditions
V(BR)DSS
Drain-to-Source Breakdown Voltage
40
–––
–––
V VGS = 0V, ID = 250µA
––– 0.038 ––– V/°C Reference to 25°C, ID = 2.0mA
V(BR)DSS/TJ Breakdown Voltage Temp. Coefficient
––– 0.50 0.69
RDS(on)
Static Drain-to-Source On-Resistance
m VGS = 10V, ID = 100A
VGS(th)
Gate Threshold Voltage
2.2
3.0
3.9
V VDS = VGS, ID = 250µA
–––
–––
1.0
VDS = 40V, VGS = 0V
Drain-to-Source Leakage Current
µA
IDSS
–––
–––
150
VDS = 40V, VGS = 0V, TJ = 125°C
Gate-to-Source Forward Leakage
–––
–––
100
VGS = 20V
IGSS
nA
Gate-to-Source Reverse Leakage
–––
––– -100
VGS = -20V
RG
Internal Gate Resistance
–––
2.3
–––
Dynamic Electrical Characteristics @ TJ = 25°C (unless otherwise specified)
Symbol
Parameter
Min. Typ. Max. Units
Conditions
gfs
Forward Transconductance
180
–––
–––
S VDS = 10V, ID = 100A
Qg
Total Gate Charge
–––
305
460
ID = 100A
VDS = 20V
Qgs
Gate-to-Source Charge
–––
84
–––
nC
VGS = 10V
Qgd
Gate-to-Drain ("Miller") Charge
–––
96
–––
Qsync
Total Gate Charge Sync. (Qg - Qgd)
–––
209
–––
td(on)
Turn-On Delay Time
–––
21
–––
VDD = 20V
ID = 100A
tr
Rise Time
–––
94
–––
ns
td(off)
Turn-Off Delay Time
–––
150
–––
RG = 2.7
VGS = 10V
Fall Time
–––
90
–––
tf
Ciss
Input Capacitance
––– 13975 –––
VGS = 0V
VDS = 25V
Coss
Output Capacitance
––– 2140 –––
Crss
Reverse Transfer Capacitance
––– 1438 –––
pF ƒ = 1.0 MHz
Coss eff. (ER) Effective Output Capacitance (Energy Related) ––– 2620 –––
VGS = 0V, VDS = 0V to 32V
Coss eff. (TR) Effective Output Capacitance (Time Related)
––– 3306 –––
VGS = 0V, VDS = 0V to 32V
Diode Characteristics
Symbol
Parameter
Min. Typ. Max. Units
Conditions
Continuous Source Current
523
MOSFET symbol
IS
–––
–––
A
(Body Diode)
showing the
integral reverse
Pulsed Source Current
1440*
ISM
–––
–––
A
(Body Diode)
p-n junction diode.
VSD
Diode Forward Voltage
–––
0.8
1.3
V TJ = 25°C, IS = 100A, VGS = 0V
dv/dt
Peak Diode Recovery
–––
3.1
––– V/ns TJ = 175°C, IS = 100A, VGS = 40V
–––
59
–––
TJ = 25°C
trr
Reverse Recovery Time
ns
VR = 34V,
–––
60
–––
TJ = 125°C
IF = 100A
–––
96
–––
TJ = 25°C
Qrr
Reverse Recovery Charge
nC
di/dt
= 100A/µs
–––
98
–––
TJ = 125°C
IRRM
Reverse Recovery Current
–––
2.7
–––
A TJ = 25°C
Notes:
Calculated continuous current based on maximum allowable junction
temperature. Bond wire current limit is 360A. Note that current
limitations arising from heating of the device leads may occur with
some lead mounting arrangements. (Refer to AN-1140)
Repetitive rating; pulse width limited by max. junction
temperature.
Limited by TJmax, starting TJ = 25°C, L = 0.15mH
RG = 50, IAS = 100A, VGS =10V.
ISD 100A, di/dt 1070A/µs, VDD V(BR)DSS, TJ 175°C.
Pulse width 400µs; duty cycle 2%.
2
Coss eff. (TR) is a fixed capacitance that gives the same charging time as Coss
while VDS is rising from 0 to 80% VDSS.
Coss eff. (ER) is a fixed capacitance that gives the same energy as Coss while
VDS is rising from 0 to 80% VDSS.
When mounted on 1" square PCB (FR-4 or G-10 Material). For recommended
footprint and soldering techniques refer to application note #AN-994.
R is measured at TJ approximately 90°C.
Limited by TJmax, starting TJ = 25°C, L = 1mH, RG = 50, IAS = 53A, VGS =10V.
* Pulse drain current is limited to 1440A by source bonding technology
2016-01-11
AUIRFSA8409-7P
10000
10000
VGS
15V
10V
8.0V
7.0V
6.0V
5.5V
5.0V
4.5V
1000
BOTTOM
TOP
ID, Drain-to-Source Current (A)
ID, Drain-to-Source Current (A)
TOP
100
4.5V
60µs PULSE WIDTH
1000
BOTTOM
4.5V
100
60µs PULSE WIDTH
Tj = 25°C
Tj = 175°C
10
0.1
1
10
10
100
0.1
V DS, Drain-to-Source Voltage (V)
100
RDS(on) , Drain-to-Source On Resistance
(Normalized)
2.0
1000
T J = 175°C
100
T J = 25°C
10
VDS = 10V
60µs PULSE WIDTH
1.0
ID = 100A
VGS = 10V
1.6
1.2
0.8
0.4
2
3
4
5
6
7
8
-60
-20
VGS, Gate-to-Source Voltage (V)
C oss = C ds + C gd
Ciss
10000
100
140
180
14
VGS = 0V,
f = 1 MHZ
C iss = C gs + C gd, C ds SHORTED
C rss = C gd
100000
60
Fig. 4 Normalized On-Resistance vs. Temperature
Fig. 3 Typical Transfer Characteristics
1000000
20
T J , Junction Temperature (°C)
VGS, Gate-to-Source Voltage (V)
C, Capacitance (pF)
10
Fig. 2 Typical Output Characteristics
10000
ID, Drain-to-Source Current (A)
1
V DS, Drain-to-Source Voltage (V)
Fig. 1 Typical Output Characteristics
Coss
Crss
1000
ID = 100A
12
VDS= 32V
VDS= 20V
10
8
6
4
2
0
100
0.1
1
10
100
VDS, Drain-to-Source Voltage (V)
Fig 5. Typical Capacitance vs. Drain-to-Source Voltage
3
VGS
15V
10V
8.0V
7.0V
6.0V
5.5V
5.0V
4.5V
0
50
100 150 200 250 300 350 400
QG, Total Gate Charge (nC)
Fig 6. Typical Gate Charge vs. Gate-to-Source Voltage
2016-01-11
AUIRFSA8409-7P
10000
ID, Drain-to-Source Current (A)
ISD, Reverse Drain Current (A)
OPERATION IN THIS AREA
LIMITED BY R DS(on)
1000
T J = 175°C
100
T J = 25°C
10
1
1000
1msec
100
LIMITED BY PACKAGE
10
10msec
1
0.1
0.1
0.1
0.4
0.7
1.0
1.3
1.6
0.1
1.9
Fig. 7 Typical Source-to-Drain Diode
Forward Voltage
V(BR)DSS , Drain-to-Source Breakdown Voltage (V)
ID, Drain Current (A)
Limited by package
400
300
200
100
0
25
50
75
100
125
150
10
Fig 8. Maximum Safe Operating Area
600
500
1
VDS , Drain-toSource Voltage (V)
VSD, Source-to-Drain Voltage (V)
175
49
Id = 2.0mA
47
45
43
41
39
37
-60
-20
TC , Case Temperature (°C)
20
60
100
140
180
T J , Temperature ( °C )
Fig 9. Maximum Drain Current vs. Case Temperature
Fig 10. Drain-to-Source Breakdown Voltage
1.8
EAS , Single Pulse Avalanche Energy (mJ)
3500
1.6
TOP
3000
1.4
BOTTOM
2500
1.2
Energy (µJ)
DC
Tc = 25°C
Tj = 175°C
Single Pulse
VGS = 0V
ID
26A
51A
100A
2000
1.0
0.8
1500
0.6
1000
0.4
0.2
0.0
500
0
0
5
10
15
20
25
30
35
40
25
50
75
100
125
150
175
Starting T J , Junction Temperature (°C)
VDS, Drain-to-Source Voltage (V)
Fig 12. Maximum Avalanche Energy vs. Drain Current
Fig 11. Typical COSS Stored Energy
4
100µsec
2016-01-11
AUIRFSA8409-7P
Thermal Response ( Z thJC ) °C/W
1
D = 0.50
0.1
0.20
0.10
0.05
0.01
0.02
0.01
SINGLE PULSE
( THERMAL RESPONSE )
0.001
0.0001
1E-006
1E-005
Notes:
1. Duty Factor D = t1/t2
2. Peak Tj = P dm x Zthjc + Tc
0.0001
0.001
0.01
0.1
1
t1 , Rectangular Pulse Duration (sec)
Fig 13. Maximum Effective Transient Thermal Impedance, Junction-to-Case
1000
Allowed avalanche Current vs avalanche
pulsewidth, tav, assuming Tj = 150°C and
Tstart =25°C (Single Pulse)
Avalanche Current (A)
Duty Cycle = Single Pulse
0.01
100
0.05
0.10
10
Allowed avalanche Current vs avalanche
pulsewidth, tav, assuming j = 25°C and
Tstart = 150°C.
1
1.0E-06
1.0E-05
1.0E-04
1.0E-03
1.0E-02
1.0E-01
tav (sec)
Fig 14. Avalanche Current vs. Pulse width
800
TOP
Single Pulse
BOTTOM 1.0% Duty Cycle
ID = 100A
EAR , Avalanche Energy (mJ)
700
600
500
400
300
200
100
0
25
50
75
100
125
150
175
Starting T J , Junction Temperature (°C)
Fig 15. Maximum Avalanche Energy vs. Temperature
5
Notes on Repetitive Avalanche Curves , Figures 14, 15:
(For further info, see AN-1005 at www.irf.com)
1. Avalanche failures assumption:
Purely a thermal phenomenon and failure occurs at a temperature far in
excess of Tjmax. This is validated for every part type.
2. Safe operation in Avalanche is allowed as long as Tjmax is not exceeded.
3. Equation below based on circuit and waveforms shown in Figures 24a, 24b.
4. PD (ave) = Average power dissipation per single avalanche pulse.
5. BV = Rated breakdown voltage (1.3 factor accounts for voltage increase
during avalanche).
6. Iav = Allowable avalanche current.
7. T = Allowable rise in junction temperature, not to exceed Tjmax (assumed as
25°C in Figure 13, 14).
tav = Average time in avalanche.
D = Duty cycle in avalanche = tav ·f
ZthJC(D, tav) = Transient thermal resistance, see Figures 13.
PD (ave) = 1/2 ( 1.3·BV·Iav) = T/ ZthJC
Iav = 2T/ [1.3·BV·Zth]
EAS (AR) = PD (ave)·tav
2016-01-11
AUIRFSA8409-7P
2.0
4.0
ID = 100A
VGS(th) , Gate threshold Voltage (V)
RDS(on), Drain-to -Source On Resistance (m )
1.6
1.2
T J = 125°C
0.8
0.4
T J = 25°C
0.0
2
4
6
8
10
12
14
16
18
3.5
3.0
2.5
2.0
ID = 250µA
ID = 1.0mA
ID = 1.0A
1.5
1.0
20
-75 -50 -25
VGS, Gate -to -Source Voltage (V)
16
700
IF = 60A
V R = 34V
14
TJ = 25°C
TJ = 125°C
500
QRR (nC)
10
IF = 60A
V R = 34V
600
TJ = 25°C
TJ = 125°C
12
8
6
400
300
200
4
100
2
0
0
0
200
400
600
800
0
200
diF /dt (A/µs)
14
12
TJ = 25°C
TJ = 125°C
800
600
QRR (nC)
10
600
Fig. 19 - Typical Stored Charge vs. dif/dt
16
IF = 100A
V R = 34V
400
diF /dt (A/µs)
Fig. 18 - Typical Recovery Current vs. dif/dt
IRRM (A)
25 50 75 100 125 150 175
Fig 17. Threshold Voltage vs. Temperature
Fig 16. Typical On-Resistance vs. Gate Voltage
IRRM (A)
0
T J , Temperature ( °C )
8
6
500
IF = 100A
V R = 34V
400
TJ = 25°C
TJ = 125°C
300
200
4
100
2
0
0
0
200
400
600
800
0
diF /dt (A/µs)
400
600
800
diF /dt (A/µs)
Fig. 21 - Typical Stored Charge vs. dif/dt
Fig. 20 - Typical Recovery Current vs. dif/dt
6
200
2016-01-11
AUIRFSA8409-7P
RDS(on), Drain-to -Source On Resistance ( m )
1.6
VGS = 5.5V
VGS = 6.0V
VGS = 7.0V
VGS = 8.0V
VGS = 10V
1.4
1.2
1.0
0.8
0.6
0.4
0
50
100
150
200
ID, Drain Current (A)
Fig 22. Typical On-Resistance vs. Drain Current
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2016-01-11
AUIRFSA8409-7P
Fig 23. Peak Diode Recovery dv/dt Test Circuit for N-Channel HEXFET® Power MOSFETs
V(BR)DSS
15V
tp
L
VDS
D.U.T
RG
IAS
20V
tp
DRIVER
+
V
- DD
A
0.01
Fig 24a. Unclamped Inductive Test Circuit
Fig 25a. Switching Time Test Circuit
I AS
Fig 24b. Unclamped Inductive Waveforms
Fig 25b. Switching Time Waveforms
Id
Vds
Vgs
Vgs(th)
Qgs1 Qgs2
Fig 26a. Gate Charge Test Circuit
8
Qgd
Qgodr
Fig 26b. Gate Charge Waveform
2016-01-11
AUIRFSA8409-7P
D2PAK-7TP Package Outline (Dimensions are shown in millimeters (inches))
Note: For the most current drawing please refer to IR website at http://www.irf.com/package/
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2016-01-11
AUIRFSA8409-7P
D2PAK-7TP Part Marking Information
D2PAK-7TP Tape and Reel
Note: For the most current drawing please refer to IR website at http://www.irf.com/package/
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2016-01-11
AUIRFSA8409-7P
Qualification Information†
Qualification Level
Automotive
(per AEC-Q101)
Comments: This part number(s) passed Automotive qualification. IR’s Industrial and Consumer qualification level is granted by extension of the higher
Automotive level.
D2 PAK-7TP
Human Body Model
ESD
Charged Device Model
RoHS Compliant
MSL1
Class H3A (± 8000V) †
AEC-Q101-001
Class C5 (± 2000V) †
AEC-Q101-005
Yes
† Highest passing voltage.
Published by
Infineon Technologies AG
81726 München, Germany
© Infineon Technologies AG 2015
All Rights Reserved.
IMPORTANT NOTICE
The information given in this document shall in no event be regarded as a guarantee of conditions or characteristics
(“Beschaffenheitsgarantie”). With respect to any examples, hints or any typical values stated herein and/or any
information regarding the application of the product, Infineon Technologies hereby disclaims any and all warranties and
liabilities of any kind, including without limitation warranties of non-infringement of intellectual property rights of any third
party.
In addition, any information given in this document is subject to customer’s compliance with its obligations stated in this
document and any applicable legal requirements, norms and standards concerning customer’s products and any use of
the product of Infineon Technologies in customer’s applications.
The data contained in this document is exclusively intended for technically trained staff. It is the responsibility of
customer’s technical departments to evaluate the suitability of the product for the intended application and the
completeness of the product information given in this document with respect to such application.
For further information on the product, technology, delivery terms and conditions and prices please contact your nearest
Infineon Technologies office (www.infineon.com).
WARNINGS
Due to technical requirements products may contain dangerous substances. For information on the types in question
please contact your nearest Infineon Technologies office.
Except as otherwise explicitly approved by Infineon Technologies in a written document signed by authorized
representatives of Infineon Technologies, Infineon Technologies’ products may not be used in any applications where a
failure of the product or any consequences of the use thereof can reasonably be expected to result in personal injury.
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