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AUIRLR3110ZTRL

AUIRLR3110ZTRL

  • 厂商:

    EUPEC(英飞凌)

  • 封装:

    TO252-3

  • 描述:

    MOSFET N-CH 100V 42A DPAK

  • 数据手册
  • 价格&库存
AUIRLR3110ZTRL 数据手册
  AUIRLR3110Z AUIRLU3110Z AUTOMOTIVE GRADE Features  Advanced Process Technology  Ultra Low On-Resistance  Logic Level Gate Drive  175°C Operating Temperature  Fast Switching  Repetitive Avalanche Allowed up to Tjmax  Lead-Free, RoHS Compliant  Automotive Qualified * HEXFET® Power MOSFET ID ID Package Type AUIRLU3110Z I-Pak AUIRLR3110Z D-Pak 100V 11m 14m 63A 42A typ. max. (Silicon Limited) (Package Limited) D D Description Specifically designed for Automotive applications, this HEXFET® Power MOSFET utilizes the latest processing techniques to achieve extremely low on-resistance per silicon area. Additional features of this design are a 175°C junction operating temperature, fast switching speed and improved repetitive avalanche rating . These features combine to make this design an extremely efficient and reliable device for use in Automotive applications and a wide variety of other applications. Base part number VDSS RDS(on)   G S G D-Pak AUIRLR3110Z G Gate I-Pak AUIRLU3110Z D Drain Standard Pack Form Quantity Tube 75 Tube 75 Tape and Reel Left 3000 S D S Source Orderable Part Number AUIRLU3110Z AUIRLR3110Z AUIRLR3110ZTRL Absolute Maximum Ratings Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only; and functional operation of the device at these or any other condition beyond those indicated in the specifications is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. The thermal resistance and power dissipation ratings are measured under board mounted and still air conditions. Ambient temperature (TA) is 25°C, unless otherwise specified. Symbol Parameter Max. ID @ TC = 25°C Continuous Drain Current, VGS @ 10V (Silicon Limited) 63 ID @ TC = 100°C ID @ TC = 25°C IDM PD @TC = 25°C Continuous Drain Current, VGS @ 10V (Silicon Limited) Continuous Drain Current, VGS @ 10V (Package Limited) Pulsed Drain Current  Maximum Power Dissipation 45 42 250 140 VGS EAS EAS (Tested) IAR EAR TJ TSTG Linear Derating Factor Gate-to-Source Voltage Single Pulse Avalanche Energy (Thermally Limited)  Single Pulse Avalanche Energy Tested Value  Avalanche Current  Repetitive Avalanche Energy  Operating Junction and Storage Temperature Range Soldering Temperature, for 10 seconds (1.6mm from case) Thermal Resistance   Symbol RJC RJA RJA Parameter Junction-to-Case Junction-to-Ambient ( PCB Mount)  Junction-to-Ambient Units A W 0.95 ± 16 110 140 See Fig.15,16, 12a, 12b W/°C V mJ A mJ -55 to + 175   300   °C  Typ. Max. Units ––– ––– ––– 1.05 50 110 °C/W HEXFET® is a registered trademark of Infineon. *Qualification standards can be found at www.infineon.com 1 2015-10-29 AUIRLR/U3110Z   Static @ TJ = 25°C (unless otherwise specified) V(BR)DSS V(BR)DSS/TJ Parameter Drain-to-Source Breakdown Voltage Breakdown Voltage Temp. Coefficient RDS(on) Static Drain-to-Source On-Resistance VGS(th) gfs Gate Threshold Voltage Forward Trans conductance IDSS Drain-to-Source Leakage Current IGSS Gate-to-Source Forward Leakage Gate-to-Source Reverse Leakage Min. Typ. Max. Units Conditions 100 ––– ––– V VGS = 0V, ID = 250µA ––– 0.077 ––– V/°C Reference to 25°C, ID = 1mA ––– 11 14 VGS = 10V, ID = 38A  m ––– 12 16 VGS = 4.5V, ID = 32A  1.0 ––– 2.5 V VDS = VGS, ID = 100µA 52 ––– ––– S VDS = 25V, ID = 38A ––– ––– 20 VDS = 100 V, VGS = 0V µA ––– ––– 250 VDS = 100V,VGS = 0V,TJ =125°C ––– ––– 200 VGS = 16V nA ––– ––– -200 VGS = -16V Dynamic Electrical Characteristics @ TJ = 25°C (unless otherwise specified) Qg Qgs Qgd td(on) tr td(off) tf Total Gate Charge Gate-to-Source Charge Gate-to-Drain Charge Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time ––– ––– ––– ––– ––– ––– ––– 34 10 15 24 110 33 48 48 ––– ––– ––– ––– ––– ––– LD Internal Drain Inductance ––– 4.5 ––– LS Internal Source Inductance ––– 7.5 ––– ––– ––– ––– ––– ––– ––– 3980 310 130 1820 170 320 ––– ––– ––– ––– ––– ––– Min. Typ. Max. Units ––– ––– 63 ––– ––– 250 ––– ––– ––– ––– 34 42 1.3 51 63 Ciss Input Capacitance Coss Output Capacitance Crss Reverse Transfer Capacitance Coss Output Capacitance Coss Output Capacitance Effective Output Capacitance Coss eff. Diode Characteristics   Parameter Continuous Source Current IS (Body Diode) Pulsed Source Current ISM (Body Diode) VSD Diode Forward Voltage trr Reverse Recovery Time Qrr Reverse Recovery Charge ton Forward Turn-On Time ID = 38A nC   VDS = 50V VGS = 4.5V VDD = 50V ID = 38A ns RG = 3.7 VGS = 4.5V Between lead, 6mm (0.25in.) nH   from package and center of die contact VGS = 0V VDS = 25V ƒ = 1.0MHz pF   VGS = 0V, VDS = 1.0V ƒ = 1.0MHz VGS = 0V, VDS = 80V ƒ = 1.0MHz VGS = 0V, VDS = 0V to 80V  Conditions MOSFET symbol showing the A integral reverse p-n junction diode. V TJ = 25°C,IS = 38A,VGS = 0V  ns TJ = 25°C ,IF = 38A, VDD = 50V nC di/dt = 100A/µs Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD) Notes:  Repetitive rating; pulse width limited by max. junction temperature. (See fig. 11)  Limited by TJmax , starting TJ = 25°C, L = 0.16mH, RG = 25, IAS = 38A, VGS =10V. Part not recommended for use above this value.  Pulse width 1.0ms; duty cycle  2%. Coss eff. is a fixed capacitance that gives the same charging time as Coss while VDS is rising from 0 to 80% VDSS Limited by TJmax , see Fig.12a, 12b, 15, 16 for typical repetitive avalanche performance. This value determined from sample failure population. 100% tested to this value in production.  When mounted on 1" square PCB (FR-4 or G-10 Material). For recommended footprint and soldering techniques refer to application note #AN-994 .  R is measured at TJ approximately 90°C  Calculated continuous current based on maximum allowable junction temperature. Bond wire current limit is 42A. Note that current limitations arising from heating of the device leads may occur with some lead mounting arrangements. 2 2015-10-29 AUIRLR/U3110Z   1000 1000 VGS 15V 10V 8.0V 4.5V 3.5V 3.0V 2.7V 2.5V 100 BOTTOM 10 TOP ID, Drain-to-Source Current (A) ID, Drain-to-Source Current (A) TOP 100 1 0.1 2.5V BOTTOM 10 2.5V 60µs PULSE WIDTH 60µs PULSE WIDTH Tj = 175°C Tj = 25°C 0.01 0.1 1 10 1 100 0.1 1000 10 100 1000 Fig. 2 Typical Output Characteristics Fig. 1 Typical Output Characteristics 150 Gfs, Forward Transconductance (S) 1000 ID , Drain-to-Source Current ) 1 V DS, Drain-to-Source Voltage (V) V DS, Drain-to-Source Voltage (V) T J = 175°C 100 10 T J = 25°C 1 VDS = 25V 60µs PULSE WIDTH T J = 25°C 125 100 T J = 175°C 75 50 V DS = 10V 25 300µs PULSE WIDTH 0 0.1 0 2 4 6 8 10 12 14 16 VGS, Gate-to-Source Voltage (V) Fig. 3 Typical Transfer Characteristics 3 VGS 15V 10V 8.0V 4.5V 3.5V 3.0V 2.7V 2.5V 0 25 50 75 ID ,Drain-to-Source Current (A) Fig. 4 Typical Forward Trans conductance Vs. Drain Current 2015-10-29 AUIRLR/U3110Z   100000 VGS, Gate-to-Source Voltage (V) ID = 38A C oss = Cds + Cgd 10000 C, Capacitance(pF) 5.0 VGS = 0V, f = 1 MHZ C iss = C gs + Cgd, C ds SHORTED C rss = C gd C iss 1000 Coss C rss 100 4.0 VDS = 80V VDS = 50V 3.0 2.0 1.0 0.0 10 1 10 0 100 Fig 5. Typical Capacitance vs. Drain-to-Source Voltage 1000 T J = 175°C T J = 25°C 1 100µsec 1msec 10msec 10 DC Tc = 25°C Tj = 175°C Single Pulse VGS = 0V 0.1 1 0.0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 VSD , Source-to-Drain Voltage (V) Fig. 7 Typical Source-to-Drain Diode Forward Voltage   4 40 OPERATION IN THIS AREA LIMITED BY R DS (on) 100 10 30 Fig 6. Typical Gate Charge vs. Gate-to-Source Voltage ID, Drain-to-Source Current (A) ISD, Reverse Drain Current (A) 100 20 QG Total Gate Charge (nC) VDS , Drain-to-Source Voltage (V) 1000 10 0 1 10 100 1000 VDS , Drain-to-Source Voltage (V) Fig 8. Maximum Safe Operating Area 2015-10-29 AUIRLR/U3110Z   3.0 ID, Drain Current (A) 60 R DS(on) , Drain-to-Source On Resistance (Normalized) 70 Limited By Package 50 40 30 20 10 ID = 63A VGS = 10V 2.5 2.0 1.5 1.0 0.5 0 25 50 75 100 125 150 -60 -40 -20 0 20 40 60 80 100 120 140160 180 175 T J , Junction Temperature (°C) T C , Case Temperature (°C) Fig 9. Maximum Drain Current Vs. Case Temperature Fig 10. Normalized On-Resistance Vs. Temperature J J 1 1 Ci= C Thermal Response ( Z thJC ) 10 1 D = 0.50 0.20 0.10 0.05 0.1 J 0.02 0.01 0.01 R1 R1 J 1 R2 R2 C 1 2 2 Ci= iRi Ci= iRi C Ri (°C/W) i (sec) 0.383 0.000267 0.667 0.003916 Notes: 1. Duty Factor D = t1/t2 2. Peak Tj = P dm x Zthjc + Tc SINGLE PULSE ( THERMAL RESPONSE ) 0.001 1E-006 1E-005 0.0001 0.001 0.01 0.1 t1 , Rectangular Pulse Duration (sec) Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case 5 2015-10-29 AUIRLR/U3110Z   15V + V - DD IAS 20V 0.01 tp Fig 12a. Unclamped Inductive Test Circuit V(BR)DSS tp A EAS , Single Pulse Avalanche Energy (mJ) D.U.T RG 300 DRIVER L VDS ID TOP 4.4A 6.5A BOTTOM 38A 250 200 150 100 50 0 25 50 75 100 125 150 175 Starting T J , Junction Temperature (°C) Fig 12c. Maximum Avalanche Energy vs. Drain Current I AS Fig 12b. Unclamped Inductive Waveforms 3.0 Vds Vgs Vgs(th) Qgs1 Qgs2 Qgd Qgodr Fig 13a. Gate Charge Waveform VGS(th) Gate threshold Voltage (V) Id 2.5 2.0 1.5 1.0 ID = 100µA ID = 250µA ID = 1.0mA ID = 1.0A 0.5 0.0 -75 -50 -25 0 25 50 75 100 125 150 175 200 T J , Temperature ( °C ) Fig 14. Threshold Voltage Vs. Temperature Fig 13b. Gate Charge Test Circuit   6 2015-10-29 AUIRLR/U3110Z   100 Allowed avalanche Current vs avalanche pulsewidth, tav, assuming  Tj = 150°C and Tstart =25°C (Single Pulse) Avalanche Current (A) Duty Cycle = Single Pulse 0.01 10 0.05 0.10 1 Allowed avalanche Current vs avalanche pulsewidth, tav, assuming  j = 25°C and Tstart = 150°C. 0.1 1.0E-06 1.0E-05 1.0E-04 1.0E-03 1.0E-02 1.0E-01 tav (sec) Fig 15. Typical Avalanche Current Vs. Pulse width Notes on Repetitive Avalanche Curves , Figures 15, 16: (For further info, see AN-1005 at www.infineon.com) EAR , Avalanche Energy (mJ) 150 1. Avalanche failures assumption: Purely a thermal phenomenon and failure occurs at a temperature far in excess of Tjmax. This is validated for every part type. 2. Safe operation in Avalanche is allowed as long as Tjmax is not exceeded. 3. Equation below based on circuit and waveforms shown in Figures 12a, 12b. 4. PD (ave) = Average power dissipation per single avalanche pulse. TOP Single Pulse BOTTOM 1% Duty Cycle ID = 38A 125 100 5. BV = Rated breakdown voltage (1.3 factor accounts for voltage increase during avalanche). 6. Iav = Allowable avalanche current. 75 50 7. T = Allowable rise in junction temperature, not to exceed Tjmax (assumed as 25 0 25 50 75 100 125 150 175 Starting T J , Junction Temperature (°C) 25°C in Figure 15, 16). tav = Average time in avalanche. D = Duty cycle in avalanche = tav ·f ZthJC(D, tav) = Transient thermal resistance, see Figures 13) PD (ave) = 1/2 ( 1.3·BV·Iav) = T/ ZthJC Iav = 2T/ [1.3·BV·Zth] Fig 16. Maximum Avalanche Energy Vs. Temperature 7 EAS (AR) = PD (ave)·tav 2015-10-29 AUIRLR/U3110Z   Fig 17. Peak Diode Recovery dv/dt Test Circuit for N-Channel HEXFET® Power MOSFETs Fig 18a. Switching Time Test Circuit   8 Fig 18b. Switching Time Waveforms 2015-10-29 AUIRLR/U3110Z   D-Pak (TO-252AA) Package Outline (Dimensions are shown in millimeters (inches)) D-Pak (TO-252AA) Part Marking Information Part Number AULR3110Z YWWA IR Logo XX  Date Code Y= Year WW= Work Week XX Lot Code Note: For the most current drawing please refer to IR website at http://www.irf.com/package/ 9 2015-10-29 AUIRLR/U3110Z   I-Pak (TO-251AA) Package Outline (Dimensions are shown in millimeters (inches) I-Pak (TO-251AA) Part Marking Information Part Number AULU3110Z YWWA IR Logo XX  Date Code Y= Year WW= Work Week XX Lot Code Note: For the most current drawing please refer to IR website at http://www.irf.com/package/   10 2015-10-29 AUIRLR/U3110Z   D-Pak (TO-252AA) Tape & Reel Information (Dimensions are shown in millimeters (inches)) TR TRR 16.3 ( .641 ) 15.7 ( .619 ) 12.1 ( .476 ) 11.9 ( .469 ) FEED DIRECTION TRL 16.3 ( .641 ) 15.7 ( .619 ) 8.1 ( .318 ) 7.9 ( .312 ) FEED DIRECTION NOTES : 1. CONTROLLING DIMENSION : MILLIMETER. 2. ALL DIMENSIONS ARE SHOWN IN MILLIMETERS ( INCHES ). 3. OUTLINE CONFORMS TO EIA-481 & EIA-541. 13 INCH 16 mm NOTES : 1. OUTLINE CONFORMS TO EIA-481. Note: For the most current drawing please refer to IR website at http://www.irf.com/package/ 11 2015-10-29 AUIRLR/U3110Z   Qualification Information Qualification Level Moisture Sensitivity Level   Machine Model Human Body Model   ESD Charged Device Model RoHS Compliant Automotive (per AEC-Q101) Comments: This part number(s) passed Automotive qualification. Infineon’s Industrial and Consumer qualification level is granted by extension of the higher Automotive level. D-Pak MSL1 I-Pak Class M4 (+/- 700V)† AEC-Q101-002 Class H1C (+/- 2000V)† AEC-Q101-001 Class C5 (+/- 2000V)† AEC-Q101-005 Yes † Highest passing voltage. Revision History Date 2/28/2014 4/9/2014 10/29/2015 Comments       Added "Logic Level Gate Drive" bullet in the features section on page 1 Updated data sheet with new IR corporate template Updated package outline on page 9 & page 10 Updated qualification table- I-pak from "N/A" to "MSL1" on page 12 Updated datasheet with corporate template Corrected ordering table on page 1. Published by Infineon Technologies AG 81726 München, Germany © Infineon Technologies AG 2015 All Rights Reserved. IMPORTANT NOTICE The information given in this document shall in no event be regarded as a guarantee of conditions or characteristics (“Beschaffenheitsgarantie”). With respect to any examples, hints or any typical values stated herein and/or any information regarding the application of the product, Infineon Technologies hereby disclaims any and all warranties and liabilities of any kind, including without limitation warranties of non-infringement of intellectual property rights of any third party. In addition, any information given in this document is subject to customer’s compliance with its obligations stated in this document and any applicable legal requirements, norms and standards concerning customer’s products and any use of the product of Infineon Technologies in customer’s applications. The data contained in this document is exclusively intended for technically trained staff. It is the responsibility of customer’s technical departments to evaluate the suitability of the product for the intended application and the completeness of the product information given in this document with respect to such application. For further information on the product, technology, delivery terms and conditions and prices please contact your nearest Infineon Technologies office (www.infineon.com). WARNINGS Due to technical requirements products may contain dangerous substances. For information on the types in question please contact your nearest Infineon Technologies office. Except as otherwise explicitly approved by Infineon Technologies in a written document signed by authorized representatives of Infineon Technologies, Infineon Technologies’ products may not be used in any applications where a failure of the product or any consequences of the use thereof can reasonably be expected to result in personal injury.   12 2015-10-29
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