AUTOMOTIVE GRADE
AUIRLR3410
Features
Advanced Planar Technology
Low On-Resistance
Logic Level Gate Drive
Dynamic dV/dT Rating
175°C Operating Temperature
Fast Switching
Fully Avalanche Rated
Repetitive Avalanche Allowed up to Tjmax
Lead-Free, RoHS Compliant
Automotive Qualified *
HEXFET® Power MOSFET
D-Pak
max.
105m
ID
17A
D
G
S
D-Pak
AUIRLR3410
G
Gate
D
Drain
Standard Pack
Form
Quantity
Tube
75
Tape and Reel Left
3000
Package Type
AUIRLR3410
100V
RDS(on)
Description
Specifically designed for Automotive applications, this Stripe Planar
design of HEXFET® Power MOSFETs utilizes the latest
processing techniques to achieve low on-resistance per silicon
area. This benefit combined with the fast switching speed and
ruggedized device design that HEXFET power MOSFETs are well
known for, provides the designer with an extremely efficient and
reliable device for use in Automotive and a wide variety of other
applications.
Base part number
VDSS
S
Source
Orderable Part Number
AUIRLR3410
AUIRLR3410TRL
Absolute Maximum Ratings
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress
ratings only; and functional operation of the device at these or any other condition beyond those indicated in the specifications is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. The thermal resistance
and power dissipation ratings are measured under board mounted and still air conditions. Ambient temperature (TA) is 25°C, unless
otherwise specified.
Symbol
Parameter
ID @ TC = 25°C
Continuous Drain Current, VGS @ 10V
17
ID @ TC = 100°C
IDM
PD @TC = 25°C
Continuous Drain Current, VGS @ 10V
Pulsed Drain Current
Maximum Power Dissipation
12
60
79
VGS
EAS
IAR
EAR
dv/dt
TJ
TSTG
Linear Derating Factor
Gate-to-Source Voltage
Single Pulse Avalanche Energy (Thermally Limited)
Avalanche Current
Repetitive Avalanche Energy
Pead Diode Recovery dv/dt
Operating Junction and
Storage Temperature Range
Soldering Temperature, for 10 seconds (1.6mm from case)
Thermal Resistance
Symbol
RJC
RJA
RJA
Parameter
Junction-to-Case
Junction-to-Ambient ( PCB Mount)
Junction-to-Ambient
Max.
Units
A
W
0.53
± 16
150
9.0
7.9
5.0
-55 to + 175
W/°C
V
mJ
A
mJ
V/ns
300
°C
Typ.
Max.
Units
–––
–––
–––
1.9
50
110
°C/W
HEXFET® is a registered trademark of Infineon.
*Qualification standards can be found at www.infineon.com
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AUIRLR3410
Static @ TJ = 25°C (unless otherwise specified)
V(BR)DSS
V(BR)DSS/TJ
Parameter
Drain-to-Source Breakdown Voltage
Breakdown Voltage Temp. Coefficient
RDS(on)
Static Drain-to-Source On-Resistance
VGS(th)
gfs
Gate Threshold Voltage
Forward Trans conductance
IDSS
Drain-to-Source Leakage Current
IGSS
Gate-to-Source Forward Leakage
Gate-to-Source Reverse Leakage
Min. Typ. Max. Units
Conditions
100 ––– –––
V VGS = 0V, ID = 250µA
––– 0.122 ––– V/°C Reference to 25°C, ID = 1mA
––– ––– 0.105
VGS = 10V, ID = 10A
––– ––– 0.125 VGS = 5.0V, ID = 10A
––– ––– 0.155
VGS = 4.0V, ID = 9.0A
1.0
–––
2.0
V VDS = VGS, ID = 250µA
7.7
––– –––
S VDS = 25V, ID = 9.0A
––– –––
25
VDS = 100 V, VGS = 0V
µA
––– ––– 250
VDS = 80V,VGS = 0V,TJ =150°C
––– ––– 100
VGS = 16V
nA
––– ––– -100
VGS = -16V
Dynamic Electrical Characteristics @ TJ = 25°C (unless otherwise specified)
Qg
Qgs
Qgd
td(on)
tr
td(off)
tf
Total Gate Charge
Gate-to-Source Charge
Gate-to-Drain Charge
Turn-On Delay Time
Rise Time
Turn-Off Delay Time
Fall Time
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
7.2
53
30
26
34
4.8
20
–––
–––
–––
–––
LD
Internal Drain Inductance
–––
4.5
–––
LS
Internal Source Inductance
–––
7.5
–––
–––
–––
–––
800
160
90
–––
–––
–––
Min.
Typ. Max. Units
–––
–––
17
–––
–––
60
–––
–––
–––
–––
140
740
1.3
210
1100
Ciss
Input Capacitance
Coss
Output Capacitance
Crss
Reverse Transfer Capacitance
Diode Characteristics
Parameter
Continuous Source Current
IS
(Body Diode)
Pulsed Source Current
ISM
(Body Diode)
VSD
Diode Forward Voltage
Reverse Recovery Time
trr
Qrr
Reverse Recovery Charge
ton
Forward Turn-On Time
ID = 9.0A
nC VDS = 80V
VGS = 5.0V
VDD = 50V
ID = 9.0A
ns
RG = 6.0
VGS = 5.0V
Between lead,
6mm (0.25in.)
nH
from package
and center of die contact
VGS = 0V
pF VDS = 25V
ƒ = 1.0MHz
Conditions
MOSFET symbol
showing the
A
integral reverse
p-n junction diode.
V TJ = 25°C,IS = 9.0A,VGS = 0V
ns TJ = 25°C ,IF = 9.0A
nC di/dt = 100A/µs
Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
Notes:
Repetitive rating; pulse width limited by max. junction temperature. (See fig. 11)
VDD = 25V, starting TJ = 25°C, L = 3.1mH, RG = 25, IAS = 9.0A, VGS =10V. (See fig. 12)
ISD 9.0A, di/dt 540A/µs, VDD V(BR)DSS, TJ 175°C.
Pulse width 300µs; duty cycle 2%.
Uses IRL530N data and test conditions.
This is applied for LS of D-PAK is measured between lead and center of die contact.
When mounted on 1" square PCB (FR-4 or G-10 Material). For recommended footprint and soldering techniques refer to
application note #AN-994 .
R is measured at TJ approximately 90°C.
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AUIRLR3410
100
100
VGS
15V
12V
10V
8.0V
6.0V
4.0V
3.0V
BOTTOM 2.5V
ID , Drain-to-Source Current (A)
ID , Drain-to-Source Current (A)
10
1
2.5V
20µs PULSE WIDTH
T J = 25°C
0.1
0.1
1
10
10
2.5V
1
R DS(on) , Drain-to-Source On Resistance
(Normalized)
3.0
I D , Drain-to-Source Current (A)
TJ = 25°C
TJ = 175°C
10
1
V DS = 50V
20µs PULSE WIDTH
4
5
6
7
8
9
10
VGS , Gate-to-Source Voltage (V)
Fig. 3 Typical Transfer Characteristics
3
10
A
100
Fig. 2 Typical Output Characteristics
100
3
1
VDS , Drain-to-Source Voltage (V)
Fig. 1 Typical Output Characteristics
0.1
20µs PULSE WIDTH
T J = 175°C
0.1
0.1
A
100
VDS , Drain-to-Source Voltage (V)
2
VGS
15V
12V
10V
8.0V
6.0V
4.0V
3.0V
BOTTOM 2.5V
TOP
TOP
A
I D = 15A
2.5
2.0
1.5
1.0
0.5
VGS = 10V
0.0
-60 -40 -20
0
20
40
60
A
80 100 120 140 160 180
TJ , Junction Temperature (°C)
Fig. 4 Normalized On-Resistance
Vs. Temperature
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AUIRLR3410
1400
V GS , Gate-to-Source Voltage (V)
1200
C, Capacitance (pF)
15
V GS = 0V,
f = 1MHz
C iss = Cgs + C gd , Cds SHORTED
C rss = C gd
C oss = C ds + C gd
Ciss
1000
800
600
Coss
400
Crss
200
0
1
10
100
I D = 9.0A
V DS = 80V
V DS = 50V
V DS = 20V
12
9
6
3
FOR TEST CIRCUIT
SEE FIGURE 13
0
A
0
VDS , Drain-to-Source Voltage (V)
20
30
40
50
A
Q G , Total Gate Charge (nC)
Fig 5. Typical Capacitance vs.
Drain-to-Source Voltage
Fig 6. Typical Gate Charge vs.
Gate-to-Source Voltage
1000
100
OPERATION IN THIS AREA LIMITED
BY R DS(on)
I D , Drain Current (A)
ISD , Reverse Drain Current (A)
10
TJ = 175°C
10
TJ = 25°C
VGS = 0V
1
0.4
0.6
0.8
1.0
1.2
VSD , Source-to-Drain Voltage (V)
Fig. 7 Typical Source-to-Drain Diode
Forward Voltage
4
A
1.4
100
10µs
10
100µs
1ms
TC = 25°C
TJ = 175°C
Single Pulse
1
1
10ms
10
A
100
1000
VDS , Drain-to-Source Voltage (V)
Fig 8. Maximum Safe Operating Area
2015-10-29
AUIRLR3410
ID , Drain Current (A)
20
15
10
5
Fig 10a. Switching Time Test Circuit
0
25
50
75
100
125
150
175
TC , Case Temperature ( °C)
Fig 9. Maximum Drain Current Vs.
Case Temperature
Fig 10b. Switching Time Waveforms
Thermal Response (Z thJC)
10
1 D = 0.50
0.20
0.10
PDM
0.05
0.1
0.01
0.00001
0.02
0.01
SINGLE PULSE
(THERMAL RESPONSE)
t1
t2
Notes:
1. Duty factor D = t 1 / t 2
2. Peak T J = P DM x ZthJC + TC
0.0001
0.001
0.01
0.1
1
t1 , Rectangular Pulse Duration (sec)
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case
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AUIRLR3410
15V
DRIVER
L
VDS
D.U.T
RG
+
V
- DD
IAS
20V
0.01
tp
Fig 12a. Unclamped Inductive Test Circuit
A
EAS , Single Pulse Avalanche Energy (mJ)
350
TOP
300
BOTTOM
ID
3.7A
6.4A
9.0A
250
200
150
100
50
0
VDD = 25V
25
50
75
100
125
150
A
175
Starting TJ , Junction Temperature (°C)
V(BR)DSS
tp
Fig 12c. Maximum Avalanche Energy
vs. Drain Current
I AS
Fig 12b. Unclamped Inductive Waveforms
Id
Vds
Vgs
Vgs(th)
Qgs1 Qgs2
Qgd
Qgodr
Fig 13a. Gate Charge Waveform
6
Fig 13b. Gate Charge Test Circuit
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AUIRLR3410
Fig 14. Peak Diode Recovery dv/dt Test Circuit for N-Channel HEXFET® Power MOSFETs
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AUIRLR3410
D-Pak (TO-252AA) Package Outline (Dimensions are shown in millimeters (inches))
D-Pak (TO-252AA) Part Marking Information
Part Number
AUIRLR3410
YWWA
IR Logo
XX
Date Code
Y= Year
WW= Work Week
XX
Lot Code
Note: For the most current drawing please refer to IR website at http://www.irf.com/package/
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AUIRLR3410
D-Pak (TO-252AA) Tape & Reel Information (Dimensions are shown in millimeters (inches))
TR
TRR
16.3 ( .641 )
15.7 ( .619 )
12.1 ( .476 )
11.9 ( .469 )
FEED DIRECTION
TRL
16.3 ( .641 )
15.7 ( .619 )
8.1 ( .318 )
7.9 ( .312 )
FEED DIRECTION
NOTES :
1. CONTROLLING DIMENSION : MILLIMETER.
2. ALL DIMENSIONS ARE SHOWN IN MILLIMETERS ( INCHES ).
3. OUTLINE CONFORMS TO EIA-481 & EIA-541.
13 INCH
16 mm
NOTES :
1. OUTLINE CONFORMS TO EIA-481.
Note: For the most current drawing please refer to IR website at http://www.irf.com/package/
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AUIRLR3410
Qualification Information
Qualification Level
Moisture Sensitivity Level
Machine Model
Human Body Model
ESD
Charged Device Model
RoHS Compliant
Automotive
(per AEC-Q101)
Comments: This part number(s) passed Automotive qualification. Infineon’s
Industrial and Consumer qualification level is granted by extension of the higher
Automotive level.
D-Pak
MSL1
Class M4†
AEC-Q101-002
Class H1C†
AEC-Q101-001
Class C5†
AEC-Q101-005
Yes
† Highest passing voltage.
Revision History
Date
3/17/2014
10/29/2015
Comments
Added "Logic Level Gate Drive" bullet in the features section on page 1.
Updated data sheet with new IR corporate template.
Updated datasheet with corporate template
Corrected ordering table on page 1.
Published by
Infineon Technologies AG
81726 München, Germany
© Infineon Technologies AG 2015
All Rights Reserved.
IMPORTANT NOTICE
The information given in this document shall in no event be regarded as a guarantee of conditions or characteristics
(“Beschaffenheitsgarantie”). With respect to any examples, hints or any typical values stated herein and/or any
information regarding the application of the product, Infineon Technologies hereby disclaims any and all warranties and
liabilities of any kind, including without limitation warranties of non-infringement of intellectual property rights of any third
party.
In addition, any information given in this document is subject to customer’s compliance with its obligations stated in this
document and any applicable legal requirements, norms and standards concerning customer’s products and any use of
the product of Infineon Technologies in customer’s applications.
The data contained in this document is exclusively intended for technically trained staff. It is the responsibility of
customer’s technical departments to evaluate the suitability of the product for the intended application and the
completeness of the product information given in this document with respect to such application.
For further information on the product, technology, delivery terms and conditions and prices please contact your nearest
Infineon Technologies office (www.infineon.com).
WARNINGS
Due to technical requirements products may contain dangerous substances. For information on the types in question
please contact your nearest Infineon Technologies office.
Except as otherwise explicitly approved by Infineon Technologies in a written document signed by authorized
representatives of Infineon Technologies, Infineon Technologies’ products may not be used in any applications where a
failure of the product or any consequences of the use thereof can reasonably be expected to result in personal injury.
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