AUTOMOTIVE GRADE
HEXFET® Power MOSFET
Features
Advanced Process Technology
Ultra Low On-Resistance
Logic Level Gate Drive
175°C Operating Temperature
Fast Switching
Repetitive Avalanche Allowed up to Tjmax
Lead-Free, RoHS Compliant
Automotive Qualified *
D-Pak
60V
5.4m
6.8m
99A
50A
typ.
max.
ID (Silicon Limited)
ID (Package Limited)
D
G
S
D-Pak
AUIRLR3636
G
Gate
D
Drain
Standard Pack
Form
Quantity
Tube
75
Tape and Reel Left
3000
Package Type
AUIRLR3636
VDSS
RDS(on)
Description
Specifically designed for Automotive applications, this HEXFET®
Power MOSFET utilizes the latest processing techniques to
achieve extremely low on-resistance per silicon area. Additional
features of this design are a 175°C junction operating temperature,
fast switching speed and improved repetitive avalanche rating .
These features combine to make this design an extremely efficient
and reliable device for use in Automotive applications and a wide
variety of other applications.
Base part number
AUIRLR3636
S
Source
Orderable Part Number
AUIRLR3636
AUIRLR3636TRL
Absolute Maximum Ratings
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress
ratings only; and functional operation of the device at these or any other condition beyond those indicated in the specifications is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. The thermal resistance
and power dissipation ratings are measured under board mounted and still air conditions. Ambient temperature (TA) is 25°C, unless
otherwise specified.
Symbol
Parameter
Max.
ID @ TC = 25°C
Continuous Drain Current, VGS @ 10V (Silicon Limited)
99
ID @ TC = 100°C
ID @ TC = 25°C
IDM
PD @TC = 25°C
Continuous Drain Current, VGS @ 10V (Silicon Limited)
Continuous Drain Current, VGS @ 10V (Package Limited)
Pulsed Drain Current
Maximum Power Dissipation
70
50
396
143
VGS
EAS
IAR
EAR
dv/dt
TJ
TSTG
Linear Derating Factor
Gate-to-Source Voltage
Single Pulse Avalanche Energy (Thermally Limited)
Avalanche Current
Repetitive Avalanche Energy
Peak Diode Recovery
Operating Junction and
Storage Temperature Range
Soldering Temperature, for 10 seconds (1.6mm from case)
Thermal Resistance
Symbol
RJC
RJA
RJA
Parameter
Junction-to-Case
Junction-to-Ambient ( PCB Mount)
Junction-to-Ambient
Units
A
W
0.95
± 16
170
See Fig. 14, 15, 22a, 22b
W/°C
V
mJ
A
mJ
V/ns
22
-55 to + 175
300
°C
Typ.
Max.
Units
–––
–––
–––
1.05
50
110
°C/W
HEXFET® is a registered trademark of Infineon.
*Qualification standards can be found at www.infineon.com
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AUIRLR3636
Static @ TJ = 25°C (unless otherwise specified)
Parameter
Drain-to-Source Breakdown Voltage
V(BR)DSS
V(BR)DSS/TJ Breakdown Voltage Temp. Coefficient
RDS(on)
Static Drain-to-Source On-Resistance
VGS(th)
gfs
RG(Int)
Gate Threshold Voltage
Forward Trans conductance
Internal Gate Resistance
IDSS
Drain-to-Source Leakage Current
IGSS
Gate-to-Source Forward Leakage
Gate-to-Source Reverse Leakage
Min.
60
–––
–––
–––
1.0
31
–––
–––
–––
–––
–––
Typ. Max. Units
Conditions
––– –––
V VGS = 0V, ID = 250µA
0.07 ––– V/°C Reference to 25°C, ID = 5mA
5.4
6.8
VGS = 10V, ID = 50A
m
6.6
8.3
VGS = 4.5V, ID = 50A
–––
2.5
V VDS = VGS, ID = 100µA
––– –––
S VDS = 25V, ID = 50A
0.6
–––
–––
20
VDS = 60V, VGS = 0V
µA
––– 250
VDS = 60V,VGS = 0V,TJ =125°C
––– 100
VGS = 16V
nA
––– -100
VGS = -16V
Dynamic Electrical Characteristics @ TJ = 25°C (unless otherwise specified)
Total Gate Charge
Qg
Qgs
Gate-to-Source Charge
Qgd
Gate-to-Drain Charge
Total Gate Charge Sync. (Qg - Qgd)
Qsync
td(on)
Turn-On Delay Time
Rise Time
tr
td(off)
Turn-Off Delay Time
Fall Time
tf
Ciss
Input Capacitance
Coss
Output Capacitance
Crss
Reverse Transfer Capacitance
Coss eff. (ER) Effective Output Capacitance (Energy Related)
Coss eff. (TR) Effective Output Capacitance (Time Related)
Diode Characteristics
Parameter
Continuous Source Current
IS
(Body Diode)
Pulsed Source Current
ISM
(Body Diode)
VSD
Diode Forward Voltage
trr
Reverse Recovery Time
Qrr
Reverse Recovery Charge
ton
Forward Turn-On Time
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
33
11
15
18
45
216
43
69
3779
332
163
437
636
49
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
Min.
Typ. Max. Units
–––
–––
99
–––
–––
396
–––
–––
–––
–––
–––
–––
–––
27
32
31
43
2.1
1.3
–––
–––
–––
–––
–––
ID = 50A
VDS = 30V
nC
VGS = 4.5V
VDD = 39V
ID = 50A
ns
RG = 7.5
VGS = 4.5V
VGS = 0V
VDS = 50V
pF ƒ = 1.0MHz
VGS = 0V, VDS = 0V to 48V
VGS = 0V, VDS = 0V to 48V
Conditions
MOSFET symbol
showing the
A
integral reverse
p-n junction diode.
V TJ = 25°C,IS = 50A,VGS = 0V
TJ = 25°C
ns
VR = 51V,
TJ = 125°C
I
F = 50A
TJ = 25°C
nC
di/dt = 100A/µs
TJ = 125°C
A TJ = 25°C
Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
Notes:
Calculated continuous current based on maximum allowable junction temperature. Bond wire current limit is 50A. Note that current
limitations arising from heating of the device leads may occur with some lead mounting arrangements.
Repetitive rating; pulse width limited by max. junction temperature. (See fig. 11)
Limited by TJmax , starting TJ = 25°C, L = 0.136mH, RG = 25, IAS = 50A, VGS =10V. Part not recommended for use above this value.
ISD 50A, di/dt 1109A/µs, VDD V(BR)DSS, TJ 175°C.
Pulse width 400µs; duty cycle 2%.
Coss eff. (TR) is a fixed capacitance that gives the same charging time as Coss while VDS is rising from 0 to 80% VDSS.
Coss eff. (ER) is a fixed capacitance that gives the same energy as Coss while VDS is rising from 0 to 80% VDSS.
When mounted on 1" square PCB (FR-4 or G-10 Material). For recommended footprint and soldering techniques refer to
application note #AN-994
Ris measured at TJ approximately 90°C.
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AUIRLR3636
1000
1000
VGS
15V
10V
4.5V
4.0V
3.5V
3.3V
3.0V
2.7V
100
BOTTOM
TOP
ID, Drain-to-Source Current (A)
ID, Drain-to-Source Current (A)
TOP
10
2.7V
1
100
BOTTOM
VGS
15V
10V
4.5V
4.0V
3.5V
3.3V
3.0V
2.7V
2.7V
10
60µs PULSE WIDTH
Tj = 175°C
60µs PULSE WIDTH
Tj = 25°C
1
0.1
0.1
1
10
0.1
100
100
Fig. 2 Typical Output Characteristics
Fig. 1 Typical Output Characteristics
1000
R DS(on) , Drain-to-Source On Resistance
(Normalized)
2.5
100
T J = 175°C
T J = 25°C
10
1
VDS = 25V
60µs PULSE WIDTH
0.1
1
2
3
4
5
6
ID = 50A
VGS = 10V
2.0
1.5
1.0
0.5
7
-60 -40 -20 0 20 40 60 80 100 120 140160 180
T J , Junction Temperature (°C)
VGS, Gate-to-Source Voltage (V)
Fig. 4 Normalized On-Resistance vs. Temperature
Fig. 3 Typical Transfer Characteristics
VGS = 0V,
f = 1 MHZ
C iss = C gs + Cgd, C ds SHORTED
Crss = C gd
Coss = Cds + Cgd
10000
C iss
1000
C oss
C rss
5.0
ID= 50A
4.5
VGS, Gate-to-Source Voltage (V)
100000
C, Capacitance (pF)
10
V DS, Drain-to-Source Voltage (V)
V DS, Drain-to-Source Voltage (V)
ID, Drain-to-Source Current (A)
1
VDS = 48V
VDS= 30V
VDS = 12V
4.0
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0.0
100
1
10
100
VDS , Drain-to-Source Voltage (V)
Fig 5. Typical Capacitance vs. Drain-to-Source Voltage
3
0
5
10
15
20
25
30
35
40
QG, Total Gate Charge (nC)
Fig 6. Typical Gate Charge vs. Gate-to-Source Voltage
2015-11-4
AUIRLR3636
1000
1000
ID, Drain-to-Source Current (A)
ISD, Reverse Drain Current (A)
OPERATION IN THIS AREA LIMITED BY R (on)
DS
T J = 175°C
100
T J = 25°C
10
1
100µsec
100
LIMITED BY PACKAGE
10
1msec
10msec
1
VGS = 0V
0.1
0.1
0.1
0.4
0.7
1
1.3
1.6
1.9
0.1
VSD , Source-to-Drain Voltage (V)
Limited By Package
ID, Drain Current (A)
90
80
70
60
50
40
30
20
10
0
25
50
75
100
125
150
100
80
Id = 5mA
75
70
65
60
55
50
-60 -40 -20 0 20 40 60 80 100 120 140160 180
175
T J , Temperature ( °C )
TC , Case Temperature (°C)
Fig. 9 Maximum Drain Current vs. Case Temperature
Fig 10. Drain-to-Source Breakdown Voltage
800
EAS , Single Pulse Avalanche Energy (mJ)
0.8
0.6
Energy (µJ)
10
Fig 8. Maximum Safe Operating Area
V(BR)DSS , Drain-to-Source Breakdown Voltage (V)
110
100
1
VDS , Drain-to-Source Voltage (V)
Fig. 7 Typical Source-to-Drain Diode Forward Voltage
0.4
0.2
0.0
ID
TOP
5.69A
10.64A
BOTTOM 50A
700
600
500
400
300
200
100
0
0
5 10 15 20 25 30 35 40 45 50 55 60 65
VDS, Drain-to-Source Voltage (V)
Fig. 11 Typical COSS Stored Energy
4
DC
Tc = 25°C
Tj = 175°C
Single Pulse
25
50
75
100
125
150
175
Starting T J , Junction Temperature (°C)
Fig 12. Maximum Avalanche Energy vs. Drain Current
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AUIRLR3636
Thermal Response ( Z thJC ) °C/W
10
1
D = 0.50
0.20
0.10
0.05
0.02
0.01
0.1
J
R1
R1
J
1
R2
R2
R3
R3
C
2
1
2
3
3
Ci= iRi
Ci= iRi
0.01
1E-005
0.0001
4
C
4
Ri (°C/W)
i (sec)
0.02028
0.000011
0.29406
0.000158
0.49179
0.001393
0.24336
0.00725
Notes:
1. Duty Factor D = t1/t2
2. Peak Tj = P dm x Zthjc + Tc
SINGLE PULSE
( THERMAL RESPONSE )
0.001
1E-006
R4
R4
0.001
0.01
0.1
t1 , Rectangular Pulse Duration (sec)
Fig 13. Maximum Effective Transient Thermal Impedance, Junction-to-Case
1000
Avalanche Current (A)
Duty Cycle = Single Pulse
Allowed avalanche Current vs avalanche
pulsewidth, tav, assuming Tj = 150°C and
Tstart =25°C (Single Pulse)
100
0.01
0.05
10
0.10
1
Allowed avalanche Current vs avalanche
pulsewidth, tav, assuming j = 25°C and
Tstart = 150°C.
0.1
1.0E-06
1.0E-05
1.0E-04
1.0E-03
1.0E-02
1.0E-01
tav (sec)
Fig 14. Typical Avalanche Current Vs. Pulse width
EAR , Avalanche Energy (mJ)
200
TOP
Single Pulse
BOTTOM 1.0% Duty Cycle
ID = 50A
150
100
50
0
25
50
75
100
125
150
175
Notes on Repetitive Avalanche Curves , Figures 14, 15:
(For further info, see AN-1005 at www.infineon.com)
1. Avalanche failures assumption:
Purely a thermal phenomenon and failure occurs at a temperature far in
excess of Tjmax. This is validated for every part type.
2. Safe operation in Avalanche is allowed as long as Tjmax is not exceeded.
3. Equation below based on circuit and waveforms shown in Figures 22a, 22b.
4. PD (ave) = Average power dissipation per single avalanche pulse.
5. BV = Rated breakdown voltage (1.3 factor accounts for voltage increase
during avalanche).
6. Iav = Allowable avalanche current.
7. T = Allowable rise in junction temperature, not to exceed Tjmax (assumed as
25°C in Figure 13, 14).
tav = Average time in avalanche.
D = Duty cycle in avalanche = tav ·f
ZthJC(D, tav) = Transient thermal resistance, see Figures 13)
Starting T J , Junction Temperature (°C)
Fig 15. Maximum Avalanche Energy Vs. Temperature
5
PD (ave) = 1/2 ( 1.3·BV·Iav) = T/ ZthJC
Iav = 2T/ [1.3·BV·Zth]
EAS (AR) = PD (ave)·tav
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AUIRLR3636
14
IF = 20A
V R = 51V
12
2.5
TJ = 25°C
TJ = 125°C
10
2.0
IRRM (A)
VGS(th) , Gate threshold Voltage (V)
3.0
1.5
ID = 100µA
ID = 250µA
ID = 1.0mA
1.0
8
6
4
ID = 1.0A
0.5
2
0.0
0
-75 -50 -25
0
25 50 75 100 125 150 175
0
200
T J , Temperature ( °C )
600
800
1000
diF /dt (A/µs)
Fig. 17 - Typical Recovery Current vs. dif/dt
Fig 16. Threshold Voltage vs. Temperature
350
16
14
12
10
IF = 30A
V R = 51V
300
IF = 20A
VR = 51V
TJ = 25°C
TJ = 125°C
250
TJ = 25°C
TJ = 125°C
QRR (nC)
IRRM (A)
400
8
200
150
6
100
4
50
2
0
0
0
200
400
600
800
0
1000
200
400
600
800
1000
diF /dt (A/µs)
diF /dt (A/µs)
Fig. 19 - Typical Stored Charge vs. dif/dt
Fig. 18 - Typical Recovery Current vs. dif/dt
QRR (nC)
350
300
IF = 30A
VR = 51V
250
TJ = 25°C
TJ = 125°C
200
150
100
50
0
0
200
400
600
800
1000
diF /dt (A/µs)
Fig. 20 - Typical Stored Charge vs. dif/dt
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AUIRLR3636
Fig 21. Peak Diode Recovery dv/dt Test Circuit for N-Channel HEXFET® Power MOSFETs
V(BR)DSS
15V
L
VDS
tp
DRIVER
D.U.T
RG
IAS
20V
tp
+
V
- DD
0.01
Fig 22a. Unclamped Inductive Test Circuit
Fig 23a. Switching Time Test Circuit
A
I AS
Fig 22b. Unclamped Inductive Waveforms
Fig 23b. Switching Time Waveforms
Id
Vds
Vgs
Vgs(th)
Qgs1 Qgs2
Fig 24a. Gate Charge Test Circuit
7
Qgd
Qgodr
Fig 24b. Gate Charge Waveform
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AUIRLR3636
D-Pak (TO-252AA) Package Outline (Dimensions are shown in millimeters (inches))
D-Pak (TO-252AA) Part Marking Information
Part Number
AULR3636
YWWA
IR Logo
XX
Date Code
Y= Year
WW= Work Week
XX
Lot Code
Note: For the most current drawing please refer to IR website at http://www.irf.com/package/
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AUIRLR3636
D-Pak (TO-252AA) Tape & Reel Information (Dimensions are shown in millimeters (inches))
TR
TRR
16.3 ( .641 )
15.7 ( .619 )
12.1 ( .476 )
11.9 ( .469 )
FEED DIRECTION
TRL
16.3 ( .641 )
15.7 ( .619 )
8.1 ( .318 )
7.9 ( .312 )
FEED DIRECTION
NOTES :
1. CONTROLLING DIMENSION : MILLIMETER.
2. ALL DIMENSIONS ARE SHOWN IN MILLIMETERS ( INCHES ).
3. OUTLINE CONFORMS TO EIA-481 & EIA-541.
13 INCH
16 mm
NOTES :
1. OUTLINE CONFORMS TO EIA-481.
Note: For the most current drawing please refer to IR website at http://www.irf.com/package/
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AUIRLR3636
Qualification Information
Qualification Level
Moisture Sensitivity Level
Machine Model
Human Body Model
ESD
Charged Device Model
RoHS Compliant
Automotive
(per AEC-Q101)
Comments: This part number(s) passed Automotive qualification. Infineon’s
Industrial and Consumer qualification level is granted by extension of the higher
Automotive level.
D-Pak
MSL1
Class M4 (+/- 600V)†
AEC-Q101-002
Class H1C (+/- 2000V)†
AEC-Q101-001
Class C5 (+/- 2000V)†
AEC-Q101-005
Yes
† Highest passing voltage.
Revision History
Date
3/18/2014
4/9/2014
11/4/2015
Comments
Added "Logic Level Gate Drive" bullet in the features section on page 1
Updated data sheet with new IR corporate template
Updated package outline on page 8.
Updated typo on the fig.19 and fig.20, unit of y-axis from "A" to "nC" on page 6.
Updated datasheet with corporate template
Corrected ordering table on page 1.
Published by
Infineon Technologies AG
81726 München, Germany
© Infineon Technologies AG 2015
All Rights Reserved.
IMPORTANT NOTICE
The information given in this document shall in no event be regarded as a guarantee of conditions or characteristics
(“Beschaffenheitsgarantie”). With respect to any examples, hints or any typical values stated herein and/or any
information regarding the application of the product, Infineon Technologies hereby disclaims any and all warranties and
liabilities of any kind, including without limitation warranties of non-infringement of intellectual property rights of any third
party.
In addition, any information given in this document is subject to customer’s compliance with its obligations stated in this
document and any applicable legal requirements, norms and standards concerning customer’s products and any use of
the product of Infineon Technologies in customer’s applications.
The data contained in this document is exclusively intended for technically trained staff. It is the responsibility of
customer’s technical departments to evaluate the suitability of the product for the intended application and the
completeness of the product information given in this document with respect to such application.
For further information on the product, technology, delivery terms and conditions and prices please contact your nearest
Infineon Technologies office (www.infineon.com).
WARNINGS
Due to technical requirements products may contain dangerous substances. For information on the types in question
please contact your nearest Infineon Technologies office.
Except as otherwise explicitly approved by Infineon Technologies in a written document signed by authorized
representatives of Infineon Technologies, Infineon Technologies’ products may not be used in any applications where a
failure of the product or any consequences of the use thereof can reasonably be expected to result in personal injury.
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2015-11-4