AUIRS2181STR

AUIRS2181(4)S Features • • • • • • • • • • • • Product Summary Floating channel designed for bootstrap operation Fully operational to +600 V Tolerant to negative transient voltage, dV/dt immune Gate drive supply range from 10 V to 20 V Undervoltage lockout for both channels 3.3 V and 5 V input logic compatible Matched propagation delay for both channels Logic and power ground +/- 5 V offset Lower di/dt gate driver for better noise immunity Output source/sink current capability (typical) 1.9 A /2.3 A Leadfree, RoHS compliant Automotive qualified* Topology High and Low Side Driver ≤ 600 V VOFFSET VOUT 10 V – 20 V Io+ & I o- (typical) 1.9 A &2.3 A tON & tOFF (typical) 160 ns & 200 ns Package Options Typical Applications • • • • Piezo/ common rail Injection Starter/Alternator Electric Power Steering Fan and compressor 8-Lead SOIC AUIRS2181S 14-Lead SOIC Narrow Body AUIRS21814S Typical Connection Up to 600V Vcc Vcc HIN LIN COM HIN LIN VB HO VS LO TO LOAD AUIRS2181 (Refer to Lead Assignments for correct pin configuration). This/These diagram(s) show electrical connections only. Please refer to our Application Notes and Design Tips for proper circuit board layout. 1 www.irf.com Up to 600V Vcc HIN LIN Vcc HIN LIN Vss Vss © 2014 International Rectifier HO VB VS AUIRS21814 TO LOAD COM LO Submit Datasheet Feedback January 10, 2014 AUIRS2181(4)S Ordering Information Standard Pack Base Part Number AUIRS2181S AUIRS21814S 2 www.irf.com Package Type SOIC8 SOIC14N Complete Part Number Form Quantity Tube/Bulk 95 AUIRS2181S Tape and Reel 2500 AUIRS2181STR Tube/Bulk 55 AUIRS21814S Tape and Reel 2500 AUIRS21814STR © 2014 International Rectifier Submit Datasheet Feedback January 10, 2014 AUIRS2181(4)S Description The AUIRS2181(4)(S) are high voltage, high speed power MOSFET and IGBT drivers with independent high and low-side referenced output channels. Proprietary HVIC and latch immune CMOS technologies enable ruggedized monolithic construction. The logic input is compatible with standard CMOS or LSTTL output, down to 3.3 V logic. The output drivers feature a high pulse current buffer stage designed for minimum driver cross-conduction. The floating channel can be used to drive an N-channel power MOSFET or IGBT in the high-side configuration which operates up to 600 V. Feature Comparison: AUIRS2181/AUIRS2183/AUIRS2184 Part 2181 21814 2183 21834 2184 21844 3 Input Logic CrossConduction Prevention logic HIN/LIN no HIN/LIN yes IN/SD yes www.irf.com Dead-Time Ground Pins none Internal 500ns Programmable 0.4 – 5 us Internal 500ns Programmable 0.4 – 5 us © 2014 International Rectifier COM VSS/COM COM VSS/COM COM VSS/COM Ton/Toff 160/200 ns 160/200 ns 600/230 ns Submit Datasheet Feedback January 10, 2014 AUIRS2181(4)S Absolute Maximum Ratings Absolute Maximum Ratings indicate sustained limits beyond which damage to the device may occur. All voltage parameters are absolute voltages referenced to COM lead. Stresses beyond those listed under " Absolute Maximum Ratings" may cause permanent damage to the device. These are stress ratings only; and functional operation of the device at these or any other condition beyond those indicated in the “Recommended Operating Conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. The thermal resistance and power dissipation ratings are measured under board mounted and still air conditions. Ambient temperature (TA) is 25°C, unless otherwise specified. Symbol Definition Min Max Units VB High-side floating absolute voltage -0.3 625 VS VHO VCC VLO VIN VSS dVS/dt PD RthJA High-side floating supply offset voltage High-side floating output voltage Low-side and logic fixed supply voltage Low-side output voltage Logic input voltage (HIN &LIN) Logic ground (AUIRS21814(S) only) Allowable offset supply voltage transient Package power dissipation @ TA ≤ 25°C Thermal resistance, junction to ambient VB - 25 VS - 0.3 -0.3 -0.3 VSS -0.3 VCC - 20 — VB + 0.3 VB + 0.3 †) 20 ( VCC + 0.3 VCC + 0.3 VCC + 0.3 50 (8 lead SOIC) — 0.625 (14 lead SOIC) — 1.0 (8 lead SOIC) — 200 (14 lead SOIC) — 120 TJ Junction temperature — TS Storage temperature -50 TL Lead temperature (soldering, 10 seconds) — † All supplies are fully tested at 25 V and an internal 20 V clamp exists for each supply. 150 150 300 V V/ns W °C/W °C Recommended Operating Conditions The input/output logic timing diagram is shown in figure 1. For proper operation the device should be used within the recommended conditions. The VS and VSS offset rating are tested with all supplies biased at 15 V differential. Symbol Definition Min Max Units VB High-side floating supply absolute voltage VS +10 VS +20 (††) VS High-side floating supply offset voltage 600 VHO High-side floating output voltage VS VB VCC Low-side and logic fixed supply voltage 10 20 V VLO Low-side output voltage 0 VCC VIN Logic input voltage VSS VCC DT Programmable deadtime pin voltage VSS VCC VSS Logic ground -5 5 TA Ambient temperature -40 125 °C †† Logic operational for VS of -5 V to +600 V. Logic state held for VS of -5 V to –VBS. (Please refer to the Design Tip DT97-3 for more details). 4 www.irf.com © 2014 International Rectifier Submit Datasheet Feedback January 10, 2014 AUIRS2181(4)S Dynamic Electrical Characteristics Unless otherwise noted, these specifications apply for an operating junction temperature range of -40°C ≤ Tj ≤ 125°C with bias conditions of VBIAS (VCC, VBS) = 15 V, VSS = COM, CL = 1000 pF. Symbol ton toff MT tr tf Definition Turn-on propagation delay Turn-off propagation delay Delay matching, HS & LS turn-on/off Turn-on rise time Turn-off fall time Min Typ Max Units Test Conditions — 160 270 VS = 0 V VS = 0 V or 600 V — 200 330 ns — — 35 — 15 60 VS = 0 V — 15 35 Static Electrical Characteristics Unless otherwise noted, these specifications apply for an operating junction temperature range of -40°C ≤ Tj ≤ 125°C with bias conditions of VBIAS (VCC, VBS) = 15 V, VSS = COM. The VIL, VIH and IIN parameters are referenced to VSS/COM and are applicable to the respective input leads: HIN and LIN. The VO, IO and Ron parameters are referenced to COM and are applicable to the respective output leads: HO and LO. Symbol VIH VIL VOH VOL ILK IQBS IQCC IIN+ IINVCCUV+ VBSUV+ VCCUVVBSUVVCCUVH VBSUVH Definition Min Typ Max Units Test Conditions Logic “1” input voltage Logic “0” input voltage High level output voltage, VBIAS - VO Low level output voltage, VO Offset supply leakage current Quiescent VBS supply current Quiescent VCC supply current Logic “1” input bias current Logic “0” input bias current VCC and VBS supply undervoltage positive going threshold VCC and VBS supply undervoltage negative going threshold 2.5 — — — — 0.8 — — 1.4 — — 0.2 — — 50 15 60 150 15 120 240 — 25 60 — — 5.0 8.0 8.9 9.8 7.4 8.2 9.0 VCC and VBS supply undervoltage Hysteresis 0.3 0.7 — †) Output high short circuit pulsed current 1.4 1.9 — †) Output low short circuit pulsed current 1.8 2.3 — †)(††) Output high short circuit pulsed current 1.2 — — †)(††) Output low short circuit pulsed current 1.5 — — IO25+( IO25-( IO+( IO-( V µA VCC = 10 V to 20 V VCC = 10 V to 20 V IO = 0 mA IO = 20 mA VB = VS = 600 V VIN = 0 V or 5 V VIN = 5 V VIN = 0 V V A VO = 0V, PW ≤ 10us, TJ = 25°C VO = 15V, PW ≤ 10us, TJ = 25°C VO = 0 V, PW ≤ 10 us VO = 15 V, PW ≤ 10 us (†) Guaranteed by design (††) IO+ and IO- decrease with rising temperature 5 www.irf.com © 2014 International Rectifier Submit Datasheet Feedback January 10, 2014 AUIRS2181(4)S Functional Block Diagrams: AUIRS2181, AUIRS21814 6 www.irf.com © 2014 International Rectifier Submit Datasheet Feedback January 10, 2014 AUIRS2181(4)S Input/Output Pin Equivalent Circuit Diagrams: AUIRS2181S VB VCC ESD Diode HIN LIN ESD Diode RESD RPD 20V HO ESD Diode VS ESD Diode 600V VCC ESD Diode VSS LO 20V ESD Diode COM/VSS 7 www.irf.com © 2014 International Rectifier Submit Datasheet Feedback January 10, 2014 AUIRS2181(4)S Input/Output Pin Equivalent Circuit Diagrams: AUIRS21814S VB ESD Diode VCC 20V HO ESD Diode HIN LIN ESD Diode VS RESD RPD ESD Diode 600V VCC ESD Diode VSS LO 20V 20V ESD Diode COM VSS 8 www.irf.com © 2014 International Rectifier Submit Datasheet Feedback January 10, 2014 AUIRS2181(4)S Lead Definitions: AUIRS2181(4)S Symbol HIN LIN VSS VB HO VS VCC LO COM Description Logic input for high-side gate driver output (HO), in phase Logic input for low-side driver output (LO), in phase Logic ground (AUIRS21814 only) High-side floating supply High-side gate drive output High-side floating supply return Low-side and logic fixed supply Low-side gate drive output Low-side return Lead Assignments: AUIRS2181(4)S 1 HIN VB 8 2 LIN HO 7 3 COM VS 6 4 LO VCC 5 1 HIN 2 LIN VB 13 3 VSS HO 12 VS 11 4 14 5 COM 10 6 LO 9 7 VCC 8 8 Lead SOIC 14 Lead SOIC Narrow Body AUIRS2181S 9 www.irf.com © 2014 International Rectifier AUIRS21814S Submit Datasheet Feedback January 10, 2014 AUIRS2181(4)S Application Information and Additional Details HIN LIN HO LO Figure 1. Input/Output Timing Diagram 50% HIN LIN ton 50% toff tr tf 90% 90% HO LO 10% 10% Figure 2. Switching Time Waveform Definitions 50% HIN LIN LO 50% HO 10% MT MT 90% LO HO Figure 3. Delay Matching Waveform Definitions 10 www.irf.com © 2014 International Rectifier Submit Datasheet Feedback January 10, 2014 AUIRS2181(4)S Parameter Trends vs. Temperature and vs. Supply Voltage Figures of this chapter provide information on the experimental performance of the AUIRS2181(4)S HVIC. The line plotted in each figure is generated from actual lab data. A large number of individual samples were tested at three temperatures (-40 ºC, 25 ºC, and 125 ºC) in order to generate the experimental curve. The line consists of three data points (one data point at each of the tested temperatures) that have been connected together to illustrate the understood trend. The individual data points on the Typ. curve were determined by calculating the averaged experimental value of the parameter (for a given temperature). Turn-on Propagation Delay (ns) A different set of individual samples was used to generate curves of parameter trends vs. supply voltage. 240 210 180 Max. 150 Typ. Min. 120 -50 -25 0 25 50 75 100 125 Temperature (oC) Turn-off Propagation Delay (ns) Figure 1A. Turn-On Propagation Delay vs. Temperature Figure 1B. Turn-On Propagation Delay vs. Supply Voltage 310 270 230 Max. 190 Typ. Min. 150 -50 -25 0 25 50 75 100 125 o Temperature ( C) Figure 2A. Turn-Off Propagation Delay vs. Temperature 11 www.irf.com © 2014 International Rectifier Figure 2B. Turn-Off Propagation Delay vs. Supply Voltage Submit Datasheet Feedback January 10, 2014 AUIRS2181(4)S Max. 18 Typ. 16 Min. 14 12 -50 -25 0 25 50 75 100 125 o Temperature ( C) Figure 3B. Turn-Off Fall Time vs. Supply Voltage Figure 3A. Turn-Off Fall Time vs. Temperature 1.5 High Level Output (V) Max. 1.2 Typ. 0.9 Min. 0.6 0.3 -50 -25 0 25 50 75 100 125 o Temperature ( C) Figure 5. High Level Output Voltage vs. Temperature (Io = 0mA) Figure 4. Turn-On Rise Time vs. Temperature 65 Low Level Output (mV) Turn-Off fall Time (ns) - 20 60 55 50 Max. Typ. 45 Min. 40 -50 -25 0 25 50 75 100 125 o Temperature ( C) Figure 6. Low Level Output vs. Temperature 12 www.irf.com © 2014 International Rectifier Figure 7. Offset Supply Leakage Current vs. Temperature Submit Datasheet Feedback January 10, 2014 AUIRS2181(4)S Figure 8B VBS Supply Current vs. VBS Floating Supply Voltage Figure 8A VBS Supply Current vs. Temperature Figure 9B VCC Supply Current vs. VCC Supply Voltage Figure 9A VCC Supply Current vs Temperature -0.15 30 25 20 Max. Typ. Min. 15 -50 -25 0 25 50 75 100 125 o Temperature ( C) Figure 10. Logic “1” Input Bias vs Temperature 13 www.irf.com © 2014 International Rectifier Logic "0" Input Bias Current (uA). Logic "1" Input Bias Current (uA) 35 -0.17 Max. -0.19 -0.21 Typ. -0.23 Min. -0.25 -50 -25 0 25 50 75 100 125 Temperature (oC) Figure 11. Logic “0” Input Bias vs Temperature Submit Datasheet Feedback January 10, 2014 AUIRS2181(4)S Figure 12. VCC and VBS Undervoltage Threshold(+) vs Temperature Figure 14A. Output Source Current vs Temperature Figure 15A. Output Sink Current vs Temperature 14 www.irf.com © 2014 International Rectifier Figure 13. VCC and VBS Undervoltage Threshold(-) vs Temperature Figure 14B. Output Source Current vs Supply Voltage Figure 15B. Output Sink Current vs Supply Voltage Submit Datasheet Feedback January 10, 2014 AUIRS2181(4)S Negative Vs Safety Operating Area (negVs SOA) There could be conditions in which Vs node falls below (i.e. negative) VSS/COM nodes (e.g. because of wrong system layout). This condition should be avoided because it could bring to uncontrolled behavior of the driver. The negVs SOA identifies the energy of negative Vs pulses at which the driver can withstand; pulse energy is identified as the product of pulse duration by its amplitude. Fig. 16 shows the negVs SOA of AUIRS2181(4)S at both ambient and over temperature conditions. Test conditions were VCC=VBS=15V referenced to VSS=COM. Even though the AUIRS2181(4)S has been designed and tested to handle these negative VS transient conditions, it is highly recommended that the circuit designer always limit the negative VS transients as much as possible by careful PCB layout and component use. Fig. 16 Negative Vs SOA of AUIRS2181(4)S. 15 www.irf.com © 2014 International Rectifier Submit Datasheet Feedback January 10, 2014 AUIRS2181(4)S Package Details: SOIC8 Package Details: SOIC14N 16 www.irf.com © 2014 International Rectifier Submit Datasheet Feedback January 10, 2014 AUIRS2181(4)S Tape and Reel Details: SOIC8 LOADED TAPE FEED DIRECTION A B H D F C NOTE : CONTROLLING DIM ENSION IN M M E G CARRIER TAPE DIMENSION FOR Metric Code Min Max A 7.90 8.10 B 3.90 4.10 C 11.70 12.30 D 5.45 5.55 E 6.30 6.50 F 5.10 5.30 G 1.50 n/a H 1.50 1.60 8SOICN Imperial Min Max 0.311 0.318 0.153 0.161 0.46 0.484 0.214 0.218 0.248 0.255 0.200 0.208 n/a 0.059 0.059 0.062 F D C B A E G H REEL DIMENSIONS FOR 8SOICN Metric Code Min Max A 329.60 330.25 B 20.95 21.45 C 12.80 13.20 D 1.95 2.45 E 98.00 102.00 F n/a 18.40 G 14.50 17.10 H 12.40 14.40 17 www.irf.com © 2014 International Rectifier Imperial Min Max 12.976 13.001 0.824 0.844 0.503 0.519 0.767 0.096 3.858 4.015 n/a 0.724 0.570 0.673 0.488 0.566 Submit Datasheet Feedback January 10, 2014 AUIRS2181(4)S Tape and Reel Details: SOIC14N LOADED TAPE FEED DIRECTION A B H D F C NOTE : CONTROLLING DIMENSION IN MM E G CARRIER TAPE DIMENSION FOR 14SOICN Metric Imperial Code Min Max Min Max A 7.90 8.10 0.311 0.318 B 3.90 4.10 0.153 0.161 C 15.70 16.30 0.618 0.641 D 7.40 7.60 0.291 0.299 E 6.40 6.60 0.252 0.260 F 9.40 9.60 0.370 0.378 G 1.50 n/a 0.059 n/a H 1.50 1.60 0.059 0.062 F D C B A E G H REEL DIMENSIONS FOR 14SOICN Metric Imperial Code Min Max Min Max A 329.60 330.25 12.976 13.001 B 20.95 21.45 0.824 0.844 C 12.80 13.20 0.503 0.519 D 1.95 2.45 0.767 0.096 E 98.00 102.00 3.858 4.015 F n/a 22.40 n/a 0.881 G 18.50 21.10 0.728 0.830 H 16.40 18.40 0.645 0.724 18 www.irf.com © 2014 International Rectifier Submit Datasheet Feedback January 10, 2014 AUIRS2181(4)S Part Marking Information SOIC8: Part number AS2181 Date code AYWW ? Pin 1 Identifier IR logo ? XXXX ? MARKING CODE P Lead Free Released Lot Code (Prod mode – 4 digit SPN code) Assembly site code Per SCOP 200-002 Non-Lead Free Released SOIC14N: AUIRS21814S Part number AYWW ? Date code Pin 1 Identifier ? XXXX ? MARKING CODE P Lead Free Released Non-Lead Free Released 19 www.irf.com IR logo © 2014 International Rectifier Lot Code (Prod mode – 4 digit SPN code) Assembly site code Per SCOP 200-002 Submit Datasheet Feedback January 10, 2014 AUIRS2181(4)S † Qualification Information Automotive (per AEC-Q100††) Comments: This family of ICs has passed an Automotive qualification. IR’s Industrial and Consumer qualification level is granted by extension of the higher Automotive level. Qualification Level SOIC8 MSL3††† 260°C (per IPC/JEDEC J-STD-020) SOIC14N MSL3††† 260°C (per IPC/JEDEC J-STD-020) Moisture Sensitivity Level Machine Model Human Body Model ESD Charged Device Model IC Latch-Up Test Class M2 (Pass +/-150V) (per AEC-Q100-003) Class H1B (Pass +/-1000V) (per AEC-Q100-002) Class C4 (Pass +/-1000V) (per AEC-Q100-011) Class II, Level A†††† (per AEC-Q100-004) Yes RoHS Compliant † †† ††† Qualification standards can be found at International Rectifier’s web site http://www.irf.com/ Exceptions to AEC-Q100 requirements are noted in the qualification report. Higher MSL ratings may be available for the specific package types listed here. Please contact your International Rectifier sales representative for further information. †††† HIN, LIN Class II Level B at 80mA per JESD78. 20 www.irf.com © 2014 International Rectifier Submit Datasheet Feedback January 10, 2014 AUIRS2181(4)S IMPORTANT NOTICE Unless specifically designated for the automotive market, International Rectifier Corporation and its subsidiaries (IR) reserve the right to make corrections, modifications, enhancements, improvements, and other changes to its products and services at any time and to discontinue any product or services without notice. Part numbers designated with the “AU” prefix follow automotive industry and / or customer specific requirements with regards to product discontinuance and process change notification. All products are sold subject to IR’s terms and conditions of sale supplied at the time of order acknowledgment. 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For technical support, please contact IR’s Technical Assistance Center http://www.irf.com/technical-info/ WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245 Tel: (310) 252-7105 21 www.irf.com © 2014 International Rectifier Submit Datasheet Feedback January 10, 2014 AUIRS2181(4)S Revision History Date Comment 04/29/08 5/6/08 9/30/08 10/01/08 th Feb, 10 , 2009 Feb. 11, 2009 Aug. 4, 2009 Aug. 11, 2009 Aug. 13, 2009 Draft Converted to new automotive format Reviewed and updated various missing information Inserted Input/Output Pin Equivalent Circuit Diagram Typ application list and other minor changes Removed PDIP package versions from datasheet Updated qualification information, characterization curves Updated plot, removed characterization graphs, changes package type info Updated VIH/VIL graphs Typ appl. Section update; Rearranged graphs with temperature and supply characteristic, rd Sep 23 , 2009 updated marking detail with p/n; added ESD passing voltage; update LU test passing current from 40mA to 80mA. Changed Iqcc/Iqbs min to 15uA; added Important Notice page; changed ton typ=160ns; toff Dec. 16, 09 typ=200ns; tr typ=15ns; tf typ=15ns Feb. 24, 2010 Page 6: Added IO25+ and IO25- specification and the notes Jul. 27, 2010 clamp diode values changed from 25V into 20V (in-out pin eq. circ. diagrams) Mar 07, 2012 Input zener clamp note deleted in recommended op cond th Sept. 30 , 2013 Added negVs SOA th Oct. 04 , 2013 Adapted to new format Jan. 10, 2014 Updated datasheet to display respective page number on bottom left corner of every page 22 www.irf.com © 2014 International Rectifier Submit Datasheet Feedback January 10, 2014