BGF148E6327XTSA1

BGF148 7 line ESD and EMI interface protection device BGF148 Datasheet Revision 1.9.2, 2014-04-02 Final Power Management & Multimarket Edition 2014-04-02 Published by Infineon Technologies AG 81726 Munich, Germany © 2014 Infineon Technologies AG All Rights Reserved. Information For further information on technology, delivery terms and conditions and prices, please contact the nearest Infineon Technologies Office (www.infineon.com) Warnings Due to technical requirements, components may contain dangerous substances. For information on the types in question, please contact the nearest Infineon Technologies Office. Infineon Technologies components may be used in life-support devices or systems only with the express written approval of Infineon Technologies, if a failure of such components can reasonably be expected to cause the failure of that life-support device or system or to affect the safety or effectiveness of that device or system. Life support devices or systems are intended to be implanted in the human body or to support and/or maintain and sustain and/or protect human life. If they fail, it is reasonable to assume that the health of the user or other persons may be endangered. BGF148 Revision History Rev. 1.9.1, 2014-01-17 Page or Item Subjects (major changes since previous revision) Revision 1.9.2, 2014-04-02 5 Table 2-1) updated Trademarks of Infineon Technologies AG AURIX™, C166™, CanPAK™, CIPOS™, CIPURSE™, EconoPACK™, CoolMOS™, CoolSET™, CORECONTROL™, CROSSAVE™, DAVE™, DI-POL™, EasyPIM™, EconoBRIDGE™, EconoDUAL™, EconoPIM™, EconoPACK™, EiceDRIVER™, eupec™, FCOS™, HITFET™, HybridPACK™, I²RF™, ISOFACE™, IsoPACK™, MIPAQ™, ModSTACK™, my-d™, NovalithIC™, OptiMOS™, ORIGA™, POWERCODE™; PRIMARION™, PrimePACK™, PrimeSTACK™, PRO-SIL™, PROFET™, RASIC™, ReverSave™, SatRIC™, SIEGET™, SINDRION™, SIPMOS™, SmartLEWIS™, SOLID FLASH™, TEMPFET™, thinQ!™, TRENCHSTOP™, TriCore™. Other Trademarks Advance Design System™ (ADS) of Agilent Technologies, AMBA™, ARM™, MULTI-ICE™, KEIL™, PRIMECELL™, REALVIEW™, THUMB™, µVision™ of ARM Limited, UK. AUTOSAR™ is licensed by AUTOSAR development partnership. Bluetooth™ of Bluetooth SIG Inc. CAT-iq™ of DECT Forum. COLOSSUS™, FirstGPS™ of Trimble Navigation Ltd. EMV™ of EMVCo, LLC (Visa Holdings Inc.). EPCOS™ of Epcos AG. FLEXGO™ of Microsoft Corporation. FlexRay™ is licensed by FlexRay Consortium. HYPERTERMINAL™ of Hilgraeve Incorporated. IEC™ of Commission Electrotechnique Internationale. IrDA™ of Infrared Data Association Corporation. ISO™ of INTERNATIONAL ORGANIZATION FOR STANDARDIZATION. MATLAB™ of MathWorks, Inc. MAXIM™ of Maxim Integrated Products, Inc. MICROTEC™, NUCLEUS™ of Mentor Graphics Corporation. MIPI™ of MIPI Alliance, Inc. MIPS™ of MIPS Technologies, Inc., USA. muRata™ of MURATA MANUFACTURING CO., MICROWAVE OFFICE™ (MWO) of Applied Wave Research Inc., OmniVision™ of OmniVision Technologies, Inc. Openwave™ Openwave Systems Inc. RED HAT™ Red Hat, Inc. RFMD™ RF Micro Devices, Inc. SIRIUS™ of Sirius Satellite Radio Inc. SOLARIS™ of Sun Microsystems, Inc. SPANSION™ of Spansion LLC Ltd. Symbian™ of Symbian Software Limited. TAIYO YUDEN™ of Taiyo Yuden Co. TEAKLITE™ of CEVA, Inc. TEKTRONIX™ of Tektronix Inc. TOKO™ of TOKO KABUSHIKI KAISHA TA. UNIX™ of X/Open Company Limited. VERILOG™, PALLADIUM™ of Cadence Design Systems, Inc. VLYNQ™ of Texas Instruments Incorporated. VXWORKS™, WIND RIVER™ of WIND RIVER SYSTEMS, INC. ZETEX™ of Diodes Zetex Limited. Last Trademarks Update 2011-11-11 Final Datasheet 3 Revision 1.9.2, 2014-04-02 BGF148 7 line ESD and EMI interface protection device 1 7 line ESD and EMI interface protection device 1.1 Features • • • • • • • • • • • 7 line bidirectional ESD protection ESD protection according to IEC61000-4-2 for ±15 kV contact discharge on all external IOs ESD protection according to IEC61000-4-2 for ±8 kV contact discharge on all internal IOs 6 line pi-type EMI filter for superior EMI filtering and very low cross-talk due to low parasitics Suitable for high speed applications due to low line capacitance of typical 1.2 pF Very low voltage dependency of line capacitance Very low leakage currents Application requires very small PCB area using an optimized I/O arrangement Small sized Plastic Package with 400 μm pitch Pb-free (RoHS compliant) and halogen free package Complies with following standards: SD Card Specification V4.1 including UHS104 mode 1.2 • • Application High-Speed Mini-/Micro- SD Card ESD protection and EMI filter SD3.0 card Interface (Mini, Micro), down compatible to SD2.0 and lower – feature phones, smart phones, tablets, digital still cameras, digital video cameras, computers and other devices using SD card interfaces Final Datasheet 4 Revision 1.9.2, 2014-04-02 BGF148 Electrical Characteristics Product Description + − Int. PINs + − 8kV ESD VCC IO R1: 20 Ω SDclk cmd R2: 20 Ω SDcmd dat 0 R3: 20 Ω SDdat 0 dat1 R4: 20 Ω SDdat 1 dat 2 R5: 20 Ω SDdat 2 Dat3/ CD R6: 20 Ω SDdat 3/CD clk HOST Ext. PIN 15kV ESD CARD 1.3 SD dat3 /CD 8 SD CMD 9 SD dat2 dat 2 7 6 5 4 dat3 /CD CMD GND 10 3 SD clk 11 2 clk SD dat0 12 1 dat0 GND GND 13 14 SD dat1 dat1 Vcc Top view BGF148 _schematic_pin _diagram.vsd Figure 1-1 Schematic Type Package Marking Chip BGF148 TSNP-14-2 48 N0756 2 Electrical Characteristics 2.1 Maximum Ratings Table 2-1 Maximum Ratings at TA = 25 °C, unless otherwise specified Parameter Symbol Values Unit Min. Typ. Max. Voltage at all pins to GND VF 0 - 5.5 V Operating temperature range TOP -40 - +85 °C Storage temperature range TSTG -65 - +150 °C 1) ESD contact discharge External IOs Internal IOs 1) VESD according to IEC61000-4-2 - VESD -15 -8 Note / Test Condition kV 15 8 Attention: Stresses above the max. values listed here may cause permanent damage to the device. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Maximum ratings are absolute ratings; exceeding only one of these values may cause irreversible damage to the integrated circuit. Final Datasheet 5 Revision 1.9.2, 2014-04-02 BGF148 Electrical Characteristics 2.2 Electrical Characteristics Table 2-2 DC Characteristics at TA = 25 °C, unless otherwise specified Parameter Symbol Values Unit Min. Typ. Max. Note / Test Condition Resistor R1...R6 R1...R6 18 20 22 Ω Reverse current of ESD diodes IR - 5 100 nA VR = 5.5 V Breakdown voltage of ESD diodes VBR - 6.5 - V IBR = 1 mA Table 2-3 RF Characteristics at TA = 25 °C, unless otherwise specified Parameter Symbol Values Min. Line capacitance (Capacitance of each line to GND) Table 2-4 Typ. Note / Test Condition pF VR = 0 V, f = 1 MHz Max. 1.2 CL Unit ESD Characteristics at TA = 25 °C, unless otherwise specified Parameter Symbol 1)2) Clamping voltage Dynamic resistance1)2) Values Unit Min. Typ. Max. - 8.5 9 - - 0.03 - Note / Test Condition VCL RDYN ITLP = 1 A ITLP = 16 A Ω 1) Pulse at external pins, measurements at related internal pins 2) ANSI / ESDSTM5.5.1-Electrostatistic Discharge Sensitivity Testing using Transmission Line Pulse (TLP) Model. TLP conditions: Z0 = 50 Ω, tp = 100 ns, tr = 0.6 ns, ITLP and VTLP average window: t1 = 30 ns to t2 = 60 ns, extraction of dynamic resistance using squares fit to TLP characteristics between ITLP1 = 2 A and ITLP2 = 15 A. Please refer to Application Note AN210[1] Final Datasheet 6 Revision 1.9.2, 2014-04-02 BGF148 Typical Characteristics 3 Typical Characteristics Curves specified at TA = 25 °C, unless otherwise specified -3 10 -4 10 10-5 IR [A] 10-6 10-7 -8 10 -9 10 -10 10 10-11 -12 10 0 1 2 3 4 5 VR [V] 6 7 8 9 4.5 5 Figure 3-1 Reverse current: IR = f(VR) 1.6 1.4 1.2 CL [pF] 1 0.8 0.6 0.4 0.2 0 0 0.5 1 1.5 2 2.5 VR [V] 3 3.5 4 Figure 3-2 Line capacitance of line A1 - A4: CL = f(VR), f = 1 MHz Final Datasheet 7 Revision 1.9.2, 2014-04-02 BGF148 Typical Characteristics BGF148 clamping voltage measurement clk_“SD“ R_ESD/EMI clk_“host“ ESD current into external pin clamping voltage @ internal pin BGF148 _VCL.vsd Figure 3-3 Measurement setup for clamping voltage 24 BGF148 RDYN 22 20 18 ITLP [A] 16 14 RDYN = 0.03 Ω 12 10 8 6 4 2 0 0 2 4 6 8 10 12 14 VTLP [V] Figure 3-4 Clamping voltage (TLP): ITLP = f(VTLP) according ANSI/ESDSTM5.5.1-Electrostatistic Discharge Sensitivity Testing using Transmission Line Pulse (TLP) Model. TLP conditions: Z0 = 50 Ω, tp = 100 ns, tr = 0.6 ns, ITLP and VTLP average window: t1 = 30 ns to t2 = 60 ns, extraction of dynamic resistance using squares fit to TLP characteristics between ITLP1 = 2 A and ITLP2 = 15 A. Please refer to Application Note AN210[1] Final Datasheet 8 Revision 1.9.2, 2014-04-02 BGF148 Application Hints 4 Application Hints Top layer Second layer DAT2 dat 2 DAT3 dat 3 CMD cmd Vcc Vcc CLK GND clk uSD‐Card ‐ Top view ‐ 14 DAT0 ESD @ card side: 15kV DAT1 uSD Card contact spring 1 uSD-Host BGF148 Top View through the device dat 0 dat 1 ESD @ host side: 8kV BGF 148_Application .vsd Figure 4-1 Application Final Datasheet 9 Revision 1.9.2, 2014-04-02 BGF148 Package 5 Package SD dat3 /CD SD CMD 8 SD dat2 dat2 7 6 9 5 dat3 /CD 4 CMD GND 10 3 Vcc GND SD clk SD dat0 11 12 13 14 SD dat1 dat1 2 clk 1 dat0 BGF148_ top_ view.vsd Figure 5-1 Top view through the device Table 5-1 Pin and Function Pin # Function 1 Dat0 Int. PIN ±8 kV 2 Clk Int. PIN ±8 kV 3 VccIO Ext. PIN ±15 kV 4 CDM Int. PIN ±8 kV 5 Dat3/CD Int. PIN ±8 kV 6 Dat2 Int. PIN ±8 kV 7 SDdat2 Ext. PIN ±15 kV 8 SDdat3/CD Ext. PIN ±15 kV 9 SDCMD Ext. PIN ±15 kV 10 GND 11 SDclk Ext. PIN ±15 kV 12 SDdat0 Ext. PIN ±15 kV 13 SDdat1 Ext. PIN ±15 kV 14 Dat1 Int. PIN ±8 kV Center GND Final Datasheet ESD (IEC61000-4-2, contact discharge) 10 Revision 1.9.2, 2014-04-02 BGF148 Package Top view Bottom view 1.09 ±0.051) 0.4 ±0.05 1.57 ±0.05 0.94 ±0.05 1) 0.02 MAX. 14 14x 0.2 ±0.05 1) 1.8 ±0.05 0.375 +0.025 -0.015 14x 0.23 ±0.05 1) 1.95 ±0.05 1.72 ±0.05 1.6 ±0.05 0.8 ±0.05 1 1) Dimension applies to plated terminals TSNP-14-2-PO V02 Figure 5-2 Package outline for TSNP-14-2 (dimension in mm) 0.45 0.4 0.25 0.28 0.4 0.28 0.28 0.2 0.25 0.4 0.45 0.2 0.79 0.25 0.4 0.95 0.79 0.2 0.25 0.2 0.28 0.4 0.86 0.95 Copper 0.86 (stencil thickness 100 µm) Stencil apertures Solder mask TSNP-14-2-FP V01 Figure 5-3 Footprint and stencil recommendation for TSNP-14-2 4 0.5 2 8 Pin 1 marking 2.15 TSNP-14-2-TP V01 Figure 5-4 Tape (dimension in mm) for TSNP-14-2 Final Datasheet 11 Revision 1.9.2, 2014-04-02 BGF148 Package 12 Type code Date code (YYWW) Pin 1 marking TSNP-14-2-MK V02 Figure 5-5 Marking example Final Datasheet 12 Revision 1.9.2, 2014-04-02 BGF148 References References [1] Infineon AG - Application Note AN210: Effective ESD Protection design at System Level Using VF-TLP Characterization Methodology Final Datasheet 13 Revision 1.9.2, 2014-04-02 w w w . i n f i n e o n . c o m Published by Infineon Technologies AG