BGT24AT2
Silicon Germanium 24 GHz Transmitter MMIC
Features
•
•
•
•
•
•
•
•
•
•
•
•
•
24 GHz signal source with 2 transmitter outputs and 1 local oscillator
output
External / internal phase inversion and RF pulsing capability
Programmable gain amplifiers (PGA) with 6 bit resolution
Fully integrated low phase noise VCO
Frequency divider with 23.5 MHz output
On chip RF level and temperature sensors
Muliplexed output of analog sensor signals
Single ended RF terminals
Single supply voltage: 3.3 V typ.
Low power consumption: 775 mW typ.
200 GHz bipolar SiGe:C technology b7hf200
Fully ESD protected device
VQFN-32-9 leadless plastic package including lead-tip-inspection (LTI)
feature
Description
The BGT24AT2 is a low phase noise 24 GHz ISM band multifunction signal source, manufactured in a monolithic
Silicon Germanium semiconductor process technology.
It accommodates a 24 GHz fundamental voltage controlled oscillator and a frequency divider with a division
ratio of 1024. The frequency divider output is differential.
The three individual RF outputs generate a typical output power of +10 dBm, adjustable via SPI-programmable
6 bit DAC’s. Fast pulsing and phase inversion of the transmit signal is provided either using dedicated control
inputs or the 64 bit SPI. Automatic configuration of the LO-output is possible using a dedicated logic.
RF output level sensors as well as a temperature sensor are implemented for monitoring purposes. The analog
sensor signals along with an additional optional analog input are multiplexed to one common output.
The MMIC is manufactured in a 200 GHz, 0.18μm SiGe:C technology and is packaged in a 32 pin leadless RoHS
compliant VQFN package with LTI feature.
Product Validation
Qualified for Automotive Applications. Product Validation according to AEC-Q100/101.
Product Name
Package
Chip
Marking
BGT24AT2
VQFN32-9
T1824
BGT24AT2
Data Sheet
www.infineon.com
Please read the Important Notice and Warnings at the end of this document
3.4
2019-12-05
BGT24AT2
Silicon Germanium 24 GHz Transmitter MMIC
ANA_IN
AMUX
Temp .
Sensor
PGA
LO
DAC
6bit
Balun
PGA
TX2
LO_ON
SPI
64bit
Balun
PH_TX2
TX2_ON
TX2
PH_LO
LO
ANA_OUT
Revision History
DAC
6bit
PH_TX1
TX1_ON
DAC
6bit
0/180°
0/180°
LO
Logic
SPI_DI
SPI_CLK
SPI_EN
SPI_DO
0/180°
BUF2
PGA
TX1
Balun
TX1
BUF1
f-Div
VCC
/1024
VTUNE_C
VTUNE_F
DIVX
DIV
DIV_DIS_OUT
Figure 1
VCC_VCO
DAC
6bit
VEE
VEE_VCO
Block Diagram BGT24AT2.vsd
BGT24AT2 Block Diagram
Revision History
Revision History: 2019-12-05, Revision 3.4
Previous Revision:2019-10-31, Revision 3.3
Page
Subjects (major changes since last revision)
7
VCO frequency range extended typ. and max. value
11
Output match (S22) max. value added
Data Sheet
2
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2019-12-05
BGT24AT2
Silicon Germanium 24 GHz Transmitter MMIC
Table of contents
Table of contents
Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Revision History . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
Table of contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
List of tables . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
List of figures . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5
1
1.1
1.2
1.3
1.4
1.5
1.6
1.7
1.8
1.9
Electrical Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .6
Absolute Maximum Ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .6
ESD Integrity . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Power Supply . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
VCO . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Frequency Divider . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
TX and LO PGA . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Temperature Sensor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Output Level Detector . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Sensor Multiplexer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .14
2
Pin Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
3
SPI . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .19
4
Sensor Multiplexer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
5
LO Logic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .23
6
Package Dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
Disclaimer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
Data Sheet
3
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BGT24AT2
Silicon Germanium 24 GHz Transmitter MMIC
List of tables
List of tables
Table 1
Table 2
Table 3
Table 4
Table 5
Table 6
Table 7
Table 8
Table 9
Table 10
Table 11
Table 12
Table 13
Table 14
Table 15
Table 16
Table 17
Data Sheet
Absolute Maximum Ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .6
ESD Integrity . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Electrical Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Electrical Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Frequency Divider Truth Table8)9) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Electrical Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Electrical Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Electrical Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Electrical Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Electrical Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Pin Definition and Function . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .15
I/O internal circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
SPI Data Bit Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
SPI Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Specification for SPI pins . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
Truth Table AMUX1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
Truth Table LO Logic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
4
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BGT24AT2
Silicon Germanium 24 GHz Transmitter MMIC
List of figures
List of figures
Figure 1
Figure 2
Figure 3
Figure 4
Figure 5
Figure 6
Data Sheet
BGT24AT2 Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2
Block Diagram Frequency Divider . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Timing Diagram of the SPI . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Package Outline (Top, Side and Bottom View) of VQFN32-9 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
Marking Layout VQFN32-9 (example) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
Tape of VQFN32-9, Ø Reel: 330 mm, Pieces / Reel: 3000, Reels / Box: 1 . . . . . . . . . . . . . . . . . . . . . . . . 24
5
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BGT24AT2
Silicon Germanium 24 GHz Transmitter MMIC
1 Electrical Characteristics
1
Electrical Characteristics
1.1
Absolute Maximum Ratings
Table 1
Absolute Maximum Ratings
TA = -40 °C to 125 °C; all voltages with respect to ground, positive current flowing into pin (unless otherwise
specified)
Parameter
Symbol
Values
Min.
Typ.
Unit
Test Note or Test Condition
Max.
Supply voltage
VCC
-0.3
–
VCC
+0.3
V
■
–
Voltage applied to none-RF
pins(1)
VIO
-0.3
–
VCC
+0.3
V
■
–
DC voltage at RF pins
VDCRF
–
–
0
V
■
MMIC provides short
circuit to GND for TX1,
TX2 and LO pins
DC voltage at pins VTUNE_F,
VTUNE_C
VTUNE
-0.3
–
VCC
+0.3
V
■
–
DC voltage at pins DIV, DIVX
VDIVIDER
2
–
VCC
+0.3
V
■
–
Total power dissipation
PDISS
–
–
1000
mW
■
–
Junction temperature
TJ
-40
–
170
°C
■
–
Ambient temperature range
TA
-40
–
125
°C
■
TA = temperature at
package soldering point
Storage temperature range
TSTG
-50
–
125
°C
■
–
(1)
For SPI_EN, SPI_DI, SPI_CLK the applied voltage may exceed given ratings als long as current into these
pins is limited to ISPI = 1 mA
Attention: Stresses exceeding the maximum values listed here may cause permanent damage to the device.
Exposure to absolute maximum rating conditions for extended periods of time may affect device
reliability. Maximum ratings are absolute ratings; exceeding only one of these values may cause
irreversible damage to the integrated circuit.
Attention: Integrated protection functions are designed to prevent IC destruction under fault conditions as
described in the data sheet. Fault conditions are considered as “outside” normal operating
range. Protection functions are not designed for continuous repetitive operation.
Attention: Test ■ means that the parameter is not subject to production test. It was verified by design /
characterization.
Note:
Data Sheet
No permanent damage of the device is possible due to an undefined SPI state
6
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BGT24AT2
Silicon Germanium 24 GHz Transmitter MMIC
1 Electrical Characteristics
1.2
ESD Integrity
Table 2
ESD Integrity
Parameter
Symbol
Values
Min.
Typ.
Unit
Test Note or Test Condition
Max.
ESD robustness HBM(1)
VESD-HBM
-1
–
1
kV
■
All pins
ESD robustness, CDM(2)
VESD-CDM
-500
–
500
V
■
All pins
-750
–
750
■
Package corner pins
(1)
(2)
According to ANSI/ESDA/JEDEC JS-001 (R = 1.5kOhm, C = 100pF) for Electrostatic Discharge Sensitivity
Testing, Human Body Model (HBM)-Component Level
According to JEDEC JESD22-C101 Field-Induced Charged Device Model (CDM), Test Method for
Electrostatic-Discharge-Withstand Thresholds of Microelectronic Components
Please note that this result is subject to:
•
lot variations within the manufacturing process as specified by Infineon
•
changes in the specific test setup
Attention: Test ■ means that the parameter is not subject to production test. It was verified by design /
characterization.
1.3
Power Supply
Table 3
Electrical Characteristics
TA = -40 °C ... 125 °C, positive current flowing into pin (unless otherwise specified).
Parameter
Symbol
Values
Min.
Typ.
Unit
Test Note or Test Condition
Max.
Supply voltage
VCC
3.135
3.3
3.465
V
–
Supply current nominal
operation mode
ICC,ON
–
235
280
mA
nom. operation mode,
SPI-state: 9F7F 2903
9F7C 10FF Hex
Supply current standby
mode
ICC,STDBY
–
65
85
mA
all functional blocks
disabled, SPI-state: 0000
0000 0000 0000 Hex
Data Sheet
7
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BGT24AT2
Silicon Germanium 24 GHz Transmitter MMIC
1 Electrical Characteristics
1.4
VCO
Table 4
Electrical Characteristics
VCC = 3.135 V to 3.465 V, TA = -40 °C to 125 °C, PGA output power = Pmax, all voltages with respect to ground,
positive current flowing into pin (unless otherwise specified), parameters specified in the frequency range from
24 GHz to 24.3 GHz including matching structure and a package footprint provided by Infineon using the high
frequency laminate Rogers 4350B (see AN359)
Parameter
Symbol
Values
Min.
Typ.
Unit
Test Note or Test Condition
Max.
VCO frequency range
fVCO
24.00
24.15
24.3
GHz
–(1) (2)
VCO tuning voltage for VCO
frequency range
VTUNE_F
0.1
–
0.9
V
–
Number of usable VCO
coarse tune DAC states
n
2
–
–
–
VTUNE_F applied via
series resistor ≥ 1 kΩ
VCO phase noise @ 1 kHz
PN,P 1kHz
–
-30
-18
dBc/Hz
■
–
VCO phase noise @ 10 kHz
PN,P 10kHz
–
-59
-50
dBc/Hz
■
–
VCO phase noise @ 100 kHz
PN,P 100kHz
–
-82
-76.4
dBc/Hz
VCO phase noise @ 1 MHz
PN,P 1MHz
–
-103
-97.4
dBc/Hz
■
–
VCO phase noise @ 10 MHz
PN,P 10MHz
–
-123
-117.4 dBc/Hz
■
–
VCO amplitude noise @ 10
kHz
PN,A 10kHz
–
–
-125
dBc/Hz
■
measured at +4 dBm
output power
VCO amplitude noise @ 100
kHz
PN,A 100kHz
–
–
-135
dBc/Hz
■
measured at +4 dBm
output power
VCO amplitude noise @ 1
MHz
PN,A 1MHz
–
-150
-145
dBc/Hz
■
measured at +4 dBm
output power
VTUNE_F input resistance
RVTUNE_F
100
–
–
kΩ
■
nonlinear, see leakage
current specification
Leakage current at pin
VTUNE_F
IVTUNE_F
-40
–
–
µA
VTUNE_F input capacitance
CVTUNE_F
–
–
10
pF
■
–
VTUNE_C input resistance
RVTUNE_C
1440
1800
2160
Ω
■
–
VTUNE_C DAC current for
PGA state 63
IVTUNE_C,DAC
1.2
–
–
mA
■
–
-1
–
+1
MHz
■
at all TX ports, 10 dB
mismatch, all phases
Static pulling fVCO change vs. Δfsp
load
–
at min. tuning voltage
Dynamic pulling phase and
TX switch change
Δfdp1
-1
–
+1
MHz
■
at all TX ports, 10 dB
mismatch, all phases
Dynamic pulling TX1 to TX2
switch change
Δfdp2
-1
–
+1
MHz
■
at all TX ports, 10 dB
mismatch, all phases
VCO pushing
Δf / ΔVCC
-20
-60
–
–
+20
+60
MHz/V
■
VCC ≥ 3.2 V,TA ≥ -20 °C(3)
Data Sheet
8
(3)
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BGT24AT2
Silicon Germanium 24 GHz Transmitter MMIC
1 Electrical Characteristics
Table 4
Electrical Characteristics (continued)
VCC = 3.135 V to 3.465 V, TA = -40 °C to 125 °C, PGA output power = Pmax, all voltages with respect to ground,
positive current flowing into pin (unless otherwise specified), parameters specified in the frequency range from
24 GHz to 24.3 GHz including matching structure and a package footprint provided by Infineon using the high
frequency laminate Rogers 4350B (see AN359)
Parameter
Symbol
Values
Min.
Typ.
Unit
Test Note or Test Condition
Max.
Spurious level harmonics
aharm
–
–
-32
dBc
■
at max. output power;
H2 measured at SWM
connector(3)
Spurious level non
harmonics
anharm
–
–
-48
dBm
■
–
VCO tuning speed
Δf/ΔVt
70
–
–
MHz/µs ■
–
VCO tuning sensitivity
Δf/ΔfTUNE_F
–
–
2800
2200
MHz/V
■
differential sensitivity
lin. between f1 24.05 GHz
and f2 = 24.14 GHz
VCO frequency drift(4)
fDRIFT
–
10
–
kHz
■
–
(1)
(2)
(3)
(4)
Proper adjustment of VTUNE_C required to cover frequency band with specified VTUNE_F
Montonic increasing frequency vs. VTUNE_F
Within 50ms and under following conditions:
• Ambient temperature - stable
• Supply voltage - stable
• RF ports at least 50 μs after ON/OFF or OFF/ON and phase transitions
• Divider in ON/OFF at least 50 μs after OFF/ON transitions
Attention: Test ■ means that the parameter is not subject to production test. It was verified by design /
characterization.
1.5
Frequency Divider
The block diagram of the frequency divider is shown in Figure 2, a compatible truth table is given in Table 5
Data Sheet
9
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BGT24AT2
Silicon Germanium 24 GHz Transmitter MMIC
1 Electrical Characteristics
SEL_DIVBUF
/16
EN_DIV
DIV
/256
Buffer
DIVX
MUX
IN
/16
/16
/4
/1024
DIV_DIS_OUT
*) constant power dissipation in both states
SEL_DIV
DIS_DIVOUT *)
BGT24AT2_Freq_Div_16_256_1024.vsd
Figure 2
Block Diagram Frequency Divider
Table 5
Frequency Divider Truth Table(1) (2)
EN_DIV
SEL_DIV
SEL_DIVBUF
DIS_DIVOUT
MODE
1
X
1
X
/16
1
1
0
0
/256
1
0
0
0
/1024
1
X
0
1
output disabled
0
X
X
X
shutdown
(1)
(2)
deviating states not allowed, undefined divider output
modes /16 and /256 for information only!
Table 6
Electrical Characteristics
VCC = 3.135 V to 3.465 V, TA = -40 °C to 125 °C, VCO frequency = 24.0 to 24.3 GHz, divider division ratio = 1024, all
voltages with respect to ground (unless otherwise specified).
Parameter
Symbol
Values
Min.
Typ.
Unit
Max.
Dividing factor
DDIV
–
256
1024
–
–
Divider output impedance
ZOUT
240
300
360
Ω
Output voltage
VDIV,1024
900
1150
1400
mVpp
Data Sheet
10
Test Note or Test Condition
–
■
Into MMIC1(1)
Into 300 Ω load(2)
3.4
2019-12-05
BGT24AT2
Silicon Germanium 24 GHz Transmitter MMIC
1 Electrical Characteristics
Table 6
Electrical Characteristics (continued)
VCC = 3.135 V to 3.465 V, TA = -40 °C to 125 °C, VCO frequency = 24.0 to 24.3 GHz, divider division ratio = 1024, all
voltages with respect to ground (unless otherwise specified).
Parameter
Symbol
Values
Min.
Common mode output
voltage
Duty cycle
(1)
(2)
Typ.
Unit
Test Note or Test Condition
Max.
Output enabled(2)
VDIV,CM,EN
2.35
2.75
3.15
V
VDIVX,CM,EN
2.35
2.75
3.15
Output enabled(2)
VDIV,CM,DIS
–
VCC
–
Output enabled(2)
VDIVX,CM,DIS
1.6
2.15
2.60
Output enabled(2)
VDIV,CM,OFF
–
VCC
–
■
Shutdown(2)
VDIVX,CM,OFF
–
VCC
–
■
Shutdown(2)
DC
–
0.5
–
■
–
–
Divider output stable for VSWR < 20:1
Measured using T-pad-attenuator on reference PCB as provided by Infineon (see Application Note AN359)
Attention: Test ■ means that the parameter is not subject to production test. It was verified by design /
characterization.
1.6
TX and LO PGA
Table 7
Electrical Characteristics
VCC = 3.135 V to 3.465 V, TA = -40 °C to 125 °C , PGA output power = Pmax, positive current flowing into pin (unless
otherwise specified), parameters specified in the frequency range from 24 GHz to 24.3 GHz include matching
structures and a package footprint provided by Infineon using the high frequency laminate Rogers 4350B (see
AN358).
Reference board losses and 2.92 mm connector loss deembedded to outer trafo edge (reference plane).
Parameter
Symbol
Values
Min.
Typ.
Unit
Test Note or Test Condition
Max.
Output power PGAmin
Pmin
–
–
-26
dBm
–
Output power PGAmax
Pmax
7
10
13
dBm
–
PGA coarse resolution
interval
RC
–
–
8
dB/bit ■
Pout ≥ -26 dBm
PGA mid resolution interval
RM
–
–
3
dB/bit
Pout ≥ -13 dBm
PGA fine resolution interval
RF
–
–
0.6
dB/Bit
Pout ≥ +1 dBm
Output power variation in
temp. range
ΔPTXtemp
-1.25
–
0.75
dB
Data Sheet
11
■
–
3.4
2019-12-05
BGT24AT2
Silicon Germanium 24 GHz Transmitter MMIC
1 Electrical Characteristics
Table 7
Electrical Characteristics (continued)
VCC = 3.135 V to 3.465 V, TA = -40 °C to 125 °C , PGA output power = Pmax, positive current flowing into pin (unless
otherwise specified), parameters specified in the frequency range from 24 GHz to 24.3 GHz include matching
structures and a package footprint provided by Infineon using the high frequency laminate Rogers 4350B (see
AN358).
Reference board losses and 2.92 mm connector loss deembedded to outer trafo edge (reference plane).
Parameter
Symbol
Values
Min.
Typ.
Unit
Test Note or Test Condition
Max.
■
■
■
VCC = 3.3 V, TA = 25 °C(1)
PGA state ≥ 47
PGA state ≥ 23
PGA state ≥ 0
Ω
■
Single ended
–
dB
■
Pout ≥ -1 dBm
–
–
dB
■
Pout ≥ -1 dBm
–
–
2
ns
■
–
εp
175
180
185
deg
■
–
Phase shifter amplitude
imbalance
εA
-0.5
0
0.5
dB
Phase shifter switching time
tPHASE
–
–
100
ns
Output match
S22
Output impedance
–
–
–
–
–
–
-8
-5.5
0
ZTX
–
50
–
TX on/off isolation
ITXon/off
30
–
TX1/TX2 isolation
ITX1/TX2
30
TX on/off switching time
tON/OFF
Phase shifter phase
imbalance
dB
–
■
–
Following parameter for pins: PH_TX1, PH_LO, PH_TX2, TX1_ON, LO_ON, TX2_ON
High-level input voltage
VI_high
2.0
–
–
V
■
–
Low-level input voltage
VI_low
–
–
0.8
V
■
–
Input capacitance
Cin
–
–
2
pF
■
–
Pull Up resitor
RPL
27.2
34
40.8
kΩ
■
TA = 25 °C
Leakage current into pins
ILeakage
-100
–
75
µA
(1)
–
SOLT calibration, reference plane at SWM connector
Attention: Test ■ means that the parameter is not subject to production test. It was verified by design /
characterization.
Data Sheet
12
3.4
2019-12-05
BGT24AT2
Silicon Germanium 24 GHz Transmitter MMIC
1 Electrical Characteristics
1.7
Temperature Sensor
Table 8
Electrical Characteristics
VCC = 3.3 V, TA = -40 °C to 125 °C, application and MMIC external circuit acc. to Application Note AN359, all
voltages with respect to ground (unless otherwise specified).
Parameter
Symbol
Values
Min.
Typ.
Unit
Test Note or Test Condition
■
Max.
Temperature sensor
operating range
TTSENS
-40
–
125
°C
–
Output voltage
VTSENSE25
1.4
1.5
1.6
V
Sensitivity
STSENS
4.3
4.7
5.1
mV/K
■
–
Setup time
tTSENS
–
–
20
µs
■
CLoad ≤ 2.2 nF and RLoad ≥
10 kΩ at ANA_OUT
Power supply rejection ratio
PSRR
16
24
–
dB
at TSi = 25 °C
measured at TSi = 25°C
and VCC,MIN/VCC,MAX
Attention: Test ■ means that the parameter is not subject to production test. It was verified by design /
characterization.
1.8
Output Level Detector
Table 9
Electrical Characteristics
VCC = 3.3 V to 3.465 V, TA = -40 °C to 125 °C, application and MMIC external circuit acc. to Application Note AN359,
all voltages with respect to ground (unless otherwise specified).
Parameter
Symbol
Values
Min.
Typ.
Unit
Test Note or Test Condition
Max.
Output voltage
VOUT
1.17
–
1.29
V
■
PGA state = 0, all
channels RF off
Detector TX1 and TX2
absolute error
ETX1, TX2
-2
–
+2
dB
■
at POUT > -1 dBm,
calculation based on
equation in App. Note
AN359
Detector LO absolute error
ELO
-2
–
+2
dB
■
at POUT > -1 dBm,
calculation based on
equation in App. Note
AN359
Setup time
tSENS
–
–
20
µs
■
CLOAD ≤ 2.2 nF and RLOAD
≥ 10 kΩ at ANA_OUT
Attention: Test ■ means that the parameter is not subject to production test. It was verified by design /
characterization.
Data Sheet
13
3.4
2019-12-05
BGT24AT2
Silicon Germanium 24 GHz Transmitter MMIC
1 Electrical Characteristics
1.9
Sensor Multiplexer
Table 10
Electrical Characteristics
VCC = 3.135 V to 3.465 V, TA = -40 °C to 125 °C, application and MMIC external circuit acc. to Application Note
AN359, all voltages with respect to ground (unless otherwise specified)
Parameter
Symbol
Values
Min.
Typ.
Unit
Test Note or Test Condition
Max.
Input voltage range
VIN
1
–
2
V
■
–
Input current
IIN
–
–
1
µA
■
–
Output impedance
ROUT
–
20
40
Ω
■
–
Offset voltage
VOFFSET
-10
–
10
mV
■
At 10kΩ load resistance
Attention: Test ■ means that the parameter is not subject to production test. It was verified by design /
characterization.
For more information on the sensor multiplexer refer to Chapter 4 and to application note AN359.
Data Sheet
14
3.4
2019-12-05
BGT24AT2
Silicon Germanium 24 GHz Transmitter MMIC
2 Pin Description
2
Pin Description
Table 11
Pin Definition and Function
Pin No.
Name
Function
1
PH_TX1
TX1 phase
2
TX1_ON
TX1 enable
3
LO_ON
LO enable
4
VEE
Ground
5
LO
LO RF output signal
6
VEE
Ground
7
VEE
Ground
8
PH_LO
LO phase
9
TX2_ON
TX2 enable
10
PH_TX2
TX2 phase
11
VEE
Ground
12
TX2
TX2 RF output signal
13
VEE
Ground
14
VCC
Supply voltage
15
DIV_DIS_OUT
Divider disable output
16
SPI_DO
SPI data output
17
DIVX
Divider output negative port
18
DIV
Divider output positive port
19
ANA_IN
Analog signal input
20
VCC_VCO
Supply voltage VCO
21
VEE
Ground
22
VTUNE_F
VCO tuning voltage (fine)
23
VTUNE_C
VCO tuning voltage (coarse)
24
VEE_VCO
Ground VCO
25
VCC
Supply voltage
26
SPI_EN
SPI enable
27
SPI_CLK
SPI clock
28
SPI_DI
SPI data input
29
ANA_OUT
Analog output signal
30
VEE
Ground
31
TX1
TX1 RF output signal
32
VEE
Ground
Data Sheet
15
3.4
2019-12-05
BGT24AT2
Silicon Germanium 24 GHz Transmitter MMIC
2 Pin Description
Table 12
I/O internal circuits
Pin No.
Name
5, 12, 31
LO, TX2, TX1
I/O internal circuits
LO, TX2, TX1
VEE
1, 2, 3, 8, 9, 10
PH_TX1, TX1_ON, LO_ON,
PH_LO, TX2_ON, PH_TX2
PH_TX1,
TX1_ON,
LO_ON
VCC
34kΩ
10kΩ
PH_LO,
TX2_ON,
PH_TX2
28
SPI_DI
VEE
VCC
94kΩ
SPI_DI
4kΩ
VEE
26, 27
SPI_EN, SPI_CLK
VCC
SPI_EN,
SPI_CLK
23,5kΩ
1kΩ
VEE
Data Sheet
16
3.4
2019-12-05
BGT24AT2
Silicon Germanium 24 GHz Transmitter MMIC
2 Pin Description
Table 12
I/O internal circuits (continued)
Pin No.
Name
29
ANA_OUT
I/O internal circuits
VCC
20Ω
ANA_OUT
VEE
15
DIV_DIS_OUT
VCC
DIV_DIS_OUT
100Ω
25kΩ
VEE
16
SPI_DO
VCC
80Ω
SPI_DO
80Ω
VEE
17, 18
DIVX, DIV
VCC
300Ω
DIV,
DIVX
VEE
Data Sheet
17
3.4
2019-12-05
BGT24AT2
Silicon Germanium 24 GHz Transmitter MMIC
2 Pin Description
Table 12
I/O internal circuits (continued)
Pin No.
Name
19
ANA_IN
I/O internal circuits
VCC
800Ω
ANA_IN
VEE
22, 24
VTUNE_F,VEE_VCO
VTUNE_F
50Ω
5pF
VEE_VCO
23, 24
VTUNE_C, VEE_VCO
VTUNE_C
50Ω
5pF
1,8kΩ
VEE_VCO
4, 6, 7, 11, 13, 14, 20, 21, 24, VEE, VCC, VCC_VCO,
25, 30, 32
VEE_VCO,
Data Sheet
18
VCC_VCO
VCC
VEE_VCO
VEE
3.4
2019-12-05
BGT24AT2
Silicon Germanium 24 GHz Transmitter MMIC
3 SPI
3
SPI
Communication to the transceiver is done via a Serial-Peripheral-Interface (SPI). The 32 bit SPI has a hardwired
Power-On reset, which sets the output bits to a defined state after turning on the supply voltage. Data
transmission is started by a negative edge on SPI_EN. Data at SPI_DI is then read at the falling edge of SPI_CLK.
The most significant bit (MSB) is read first.
Table 13
SPI Data Bit Description
Data Bit
Name
Description (Logic High)
Power ON Reset
State
0 (LSB)
TX1_A5
MSB of TX1 PGA DAC output power control
0
1
TX1_A4
TX1 PGA DAC output power control
0
2
TX1_A3
TX1 PGA DAC output power control
0
3
TX1_A2
TX1 PGA DAC output power control
0
4
TX1_A1
TX1 PGA DAC output power control
0
5
TX1_A0
LSB of TX1 PGA DAC output power control
0
6
TX1_EN_DAC
TX1 PGA DAC enable
0
7
LO_EN_DAC
LO PGA DAC enable
0
8
n.c.
0
9
n.c.
0
10
n.c.
0
11
n.c.
0
12
EN_BUF1
13
n.c.
0
14
n.c.
0
15
n.c.
0
16
VCO_A5
MSB of coarse tune DAC
0
17
VCO_A4
VCO coarse tune DAC
0
18
VCO_A3
VCO coarse tune DAC
0
19
VCO_A2
VCO coarse tune DAC
0
20
VCO_A1
VCO coarse tune DAC
0
21
VCO_A0
LSB of VCO coarse tune DAC
0
22
EN_DAC_VCO
VCO coarse tune DAC enable
0
23
PH1_SPI_ON
Phase control TX1 via SPI
0
24
TX1_SEL1
TX1 control bit (“0”=via ext. pulse pin, “1”= 0
via SPI)
25
TX1_SPI_ON
TX1 enable via SPI
0
26
LO_SPI_ON
LO enable via SPI
0
27
AMUX2_SEL0
AMUX2 control bit
0
Data Sheet
buffer amplifier BUF1 enable
19
0
3.4
2019-12-05
BGT24AT2
Silicon Germanium 24 GHz Transmitter MMIC
3 SPI
Table 13
SPI Data Bit Description (continued)
Data Bit
Name
Description (Logic High)
Power ON Reset
State
28
AMUX2_SEL1
AMUX2 control bit
0
29
AMUX2_SEL2
AMUX2 control bit
0
30
LO_SEL1
LO logic control bit
0
31
EN_BUF2
Buffer amplifier BUF2 enable
0
32
EN_DIV
Frequency divider enable
0
33
EN_VCO
VCO enable
0
34
AMUX1_SEL0
AMUX1 control bit
0
35
AMUX1_SEL1
AMUX1 control bit
0
36
n.c.
37
PHLO_SPI_ON
Phase control LO via SPI
0
38
PH2_SPI_ON
Phase control TX2 via SPI
0
39
PH_SEL1
Phase control bit (“0”=via ext. pulse pin,
“1”=via SPI)
0
40
TX2_SEL1
TX2 control bit (“0”=via ext. pulse pin,
“1”=via SPI)
0
41
TX2_SPI_ON
TX2 enable via SPI
0
42
AMUX3_SEL1
AMUX3 control bit
0
43
AMUX3_SEL0
AMUX3 control bit
0
44
n.c
45
LO_SEL0
46
n.c
0
47
n.c
0
48
TX2_A5
MSB of TX2 PGA DAC output power control
0
49
TX2_A4
TX2 PGA DAC output power control
0
50
TX2_A3
TX2 PGA DAC output power control
0
51
TX2_A2
TX2 PGA DAC output power control
0
52
TX2_A1
TX2 PGA DAC output power control
0
53
TX2_A0
LSB of TX2 PGA DAC output power control
0
54
TX2_EN_DAC
TX2 PGA DAC enable
0
55
LO_A5
MSB of LO PGA DAC output power control
0
56
LO_A4
LO PGA DAC output power control
0
57
LO_A3
LO PGA DAC output power control
0
58
LO_A2
LO PGA DAC output power control
0
59
LO_A1
LO PGA DAC output power control
0
Data Sheet
0
0
LO control bit
20
0
3.4
2019-12-05
BGT24AT2
Silicon Germanium 24 GHz Transmitter MMIC
3 SPI
Table 13
SPI Data Bit Description (continued)
Data Bit
Name
Description (Logic High)
Power ON Reset
State
60
LO_A0
LSB of LO PGA DAC output power control
0
61
SEL_DIVBUF
Frequency divider control bit
0
62
SEL_DIV
Frequency divider control bit
0
63 (MSB)
DIS_DIVOUT
Frequency divider output disable
0
Figure 3
Timing Diagram of the SPI
Table 14
SPI Interface
Parameter
Symbol
Values
Min.
Unit
Typ.
Max.
SPI_CLK period
tSPI
50
SPI_CLK low time
tSCKL
0.45 tSPI 0.5 tSPI
0.55 tSPI ns
■
SPI_CLK high time
tSCKH
0.45 tSPI 0.5 tSPI
0.55 tSPI ns
■
Chip select lead time
tCS(lead)
20
–
–
ns
■
Time between falling edge of
SPI_CLK and SPI_DO valid
tSDOV
–
–
10
ns
■
Setup time of SPI_DI before
falling edge of SPI_CLK
tSDIS = tSI(su)
10
–
–
ns
■
Hold time of SPI_DI after falling
edge of SPI_CLK
tSI(h)
10
–
–
ns
■
Hold time of SPI_DO after rising
edge of SPI_CLK
tSDOH
tSCKH 10ns
–
–
ns
■
Hold time of SPI_EN after last
falling edge of SPI_CLK
tCS(lag)
30
–
–
ns
■
Data Sheet
21
–
Test
–
ns
3.4
2019-12-05
BGT24AT2
Silicon Germanium 24 GHz Transmitter MMIC
4 Sensor Multiplexer
Table 14
SPI Interface (continued)
Parameter
Symbol
Values
Min.
Typ.
Unit
Test
Max.
Delay between rising edge of
SPI_EN and SPI_DO tristate
(leakage current < 12μA)
tSDOtri
–
–
100
ns
■
Delay between falling edge of
SPI_EN and MSB at SPI_DO
tristate valid
tCSDV
–
–
125
ns
■
Minimum time between two SPI
commands
tmin2SPI
5
–
–
μs
■
Unit
Test
Table 15
Specification for SPI pins
Parameter
Symbol
Values
Min.
Typ.
Max.
High-level input voltage
VI_high
2.0
–
–
V
■
Low-level input voltage
VI_low
–
–
0.8
V
■
Input voltage hysteresis
Vhys
50
–
–
mV
■
Input current
IIN
-190
–
150
μA
Input capacitance (EN, CLK, DI)
CSIN
–
–
2
pF
SPI_DO output high voltage
(VCC=3.3V,ISDO =1mA)
VO_high
2.4
–
–
V
SPI_DO output low voltage
(VCC=3.3V,ISDO =1mA)
VO_low
–
–
0.8
V
SPI_DO load capacitance
CSL DO
–
–
30
pF
■
SPI_DO load resistance
RSL DO
10
–
–
kΩ
■
Pull Up resistor (SPI_DI)
TA = 25 °C
RPL_SPI_DI
78
98
118
kΩ
■
Pull Up resistor (SPI_CLK,
SPI_EN)
TA = 25 °C
RPL_SPI_CLK, RPL_SPI_EN
19.6
24.5
29.4
kΩ
■
Leakage current @ SPI_DO in
high Z state (test voltage 2.4 V)
IL DO
–
–
12
μA
■
Attention: Test ■ means that the parameter is not subject to production test. It was verified by design /
characterization.
4
Sensor Multiplexer
Output signals of the temperature and output level sensors at TX1, TX2 and LO output are provided multiplexed
at the output pin ANA_OUT using an analog multiplexer (AMUX) circuit.
Data Sheet
22
3.4
2019-12-05
BGT24AT2
Silicon Germanium 24 GHz Transmitter MMIC
5 LO Logic
Additionally, a MMIC internal reference voltage (VBG1) can be read out and an analog input signal within 1 V and
2 V can be directed from ANA_IN to ANA_OUT. Tristate capability is implemented in order to combine several
analog outputs in the application. In this case it has to be ensured that only one multiplexer output is activated
at any time.
For more information on the sensor multiplexer refer to application note AN359.
Table 16
Truth Table AMUX(1)
Output at ANA_OUT
AMUX1_ SEL1 AMUX1_ SEL0 AMUX2_ SEL2 AMUX2_ SEL1 AMUX2_ SEL0
Tristate
X
X
0
0
0
ANA_IN
X
X
0
0
1
VTEMP
X
X
0
1
1
PSENSE_TX2
0
0
1
0
0
PSENSE_TX1
0
1
1
0
0
PSENSE_LO
1
X
1
0
0
VBG1 (Bandgap output
voltage)
X
X
1
0
1
(1)
deviating states not allowed, undefined AMUX output
5
LO Logic
The BGT24AT2 accommodates a logic circuit which can be used to either activate the LO-output manually or
automatically depending on the TX1/TX2 configuration.
Three operation modes are selectable:
1.
manual activation / deactivation of the LO output via external pulse pin LO_ON
2.
manual activation / deactivation of the LO output via SPI bit LO_SPI_ON
3.
automatic activation / deactivation depending on the TX1 / TX2 configuration.
The configuration of the LO logic operation mode is shown in Table 17.
Table 17
Truth Table LO Logic
LO_SEL1
LO_SEL0
Function
0
0
LO activation via external pulse pin LO_ON
0
1
LO activation via SPI bit LO_SPI_ON
1
X
Automatic LO activation via external pulse pins TX1_ON or
TX2_ON
Data Sheet
23
3.4
2019-12-05
BGT24AT2
Silicon Germanium 24 GHz Transmitter MMIC
6 Package Dimensions
6
Package Dimensions
0.9 MAX.
(0.65)
Index Marking
C
27
32
11
1
10
0.1±0.05
(0.2)
(3.9)
0.05 MAX.
4.4
1) Vertical burr 0.03 max. all sides
Figure 4
0.55 ±0.07
26
(2.9)
0.5
5 x 0.5 = 2.5
32x
0.08
17
16
3.4
0.5
1)
+0.03
SEATING PLANE
B
4.3
5.3
9 x 0.5 = 4.5
0.1±0.03
A
4.5 ±0.1
5.5 ±0.1
Index Marking
0.25±0.05
32x
0.05 M A B C
PG-VQFN-32-9, -15-PO V01
Package Outline (Top, Side and Bottom View) of VQFN32-9
BGT24AT2_VQFN32-9_ML.vsd
Marking Layout VQFN32-9 (example)
0.3
8
5.9
Index Marking
4.9
12
Figure 5
1
1.3
PG-VQFN-32-9, -15-TP V01
Figure 6
Tape of VQFN32-9, Ø Reel: 330 mm, Pieces / Reel: 3000, Reels / Box: 1
Data Sheet
24
3.4
2019-12-05
Trademarks
All referenced product or service names and trademarks are the property of their respective owners.
Edition 2019-12-05
Published by
Infineon Technologies AG
81726 Munich, Germany
© 2020 Infineon Technologies AG
All Rights Reserved.
Do you have a question about any
aspect of this document?
Email: erratum@infineon.com
Document reference
IFX-uee1569827723653
IMPORTANT NOTICE
The information given in this document shall in no
event be regarded as a guarantee of conditions or
characteristics (“Beschaffenheitsgarantie”) .
With respect to any examples, hints or any typical values
stated herein and/or any information regarding the
application of the product, Infineon Technologies
hereby disclaims any and all warranties and liabilities of
any kind, including without limitation warranties of
non-infringement of intellectual property rights of any
third party.
In addition, any information given in this document is
subject to customer’s compliance with its obligations
stated in this document and any applicable legal
requirements, norms and standards concerning
customer’s products and any use of the product of
Infineon Technologies in customer’s applications.
The data contained in this document is exclusively
intended for technically trained staff. It is the
responsibility of customer’s technical departments to
evaluate the suitability of the product for the intended
application and the completeness of the product
information given in this document with respect to such
application.
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