BSC025N08LS5
MOSFET
OptiMOSTM5Power-Transistor,80V
SuperSO8
8
Features
•OptimizedforhighperformanceSMPS,e.g.sync.Rec.
•100%avalanchetested
•Superiorthermalresistance
•N-channel,logiclevel
•QualifiedaccordingtoJEDEC1)fortargetapplications
•Pb-freeleadplating;RoHScompliant
•Halogen-freeaccordingtoIEC61249-2-21
7
5
6
4
1
2
3
6
5
3
2
4
7
8
1
Table1KeyPerformanceParameters
Parameter
Value
Unit
S1
8D
VDS
80
V
S2
7D
RDS(on),max
2.5
mΩ
S3
6D
ID
100
A
G4
5D
Qoss
88
nC
QG(0V..4.5V)
44
nC
Type/OrderingCode
Package
BSC025N08LS5
PG-TDSON-8
1)
Marking
025N08LS
RelatedLinks
-
J-STD20 and JESD22
Final Data Sheet
1
Rev.2.1,2016-10-25
OptiMOSTM5Power-Transistor,80V
BSC025N08LS5
TableofContents
Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
Thermal characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
Electrical characteristics diagrams . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Package Outlines . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Revision History . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Trademarks . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Disclaimer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Final Data Sheet
2
Rev.2.1,2016-10-25
OptiMOSTM5Power-Transistor,80V
BSC025N08LS5
1Maximumratings
atTA=25°C,unlessotherwisespecified
Table2Maximumratings
Parameter
Symbol
Continuous drain current
Values
Unit
Note/TestCondition
100
100
24
A
VGS=10V,TC=25°C
VGS=10V,TC=100°C
VGS=10V,TC=25°C,RthJA=50K/W1)
-
400
A
TC=25°C
-
-
370
mJ
ID=50A,RGS=25Ω
VGS
-20
-
20
V
-
Power dissipation
Ptot
-
-
156
2.5
W
TC=25°C
TA=25°C,RthJA=50K/W1)
Operating and storage temperature
Tj,Tstg
-55
-
150
°C
IEC climatic category;
DIN IEC 68-1: 55/150/56
Unit
Note/TestCondition
Min.
Typ.
Max.
ID
-
-
Pulsed drain current2)
ID,pulse
-
Avalanche energy, single pulse3)
EAS
Gate source voltage
2Thermalcharacteristics
Table3Thermalcharacteristics
Parameter
Symbol
Thermal resistance, junction - case,
bottom
Device on PCB,
6 cm2 cooling area1)
Values
Min.
Typ.
Max.
RthJC
-
0.5
0.8
K/W
-
RthJA
-
-
50
K/W
-
1)
Device on 40 mm x 40 mm x 1.5 mm epoxy PCB FR4 with 6 cm2 (one layer, 70 µm thick) copper area for drain
connection. PCB is vertical in still air.
2)
See Diagram 3 for more detailed information
3)
See Diagram 13 for more detailed information
Final Data Sheet
3
Rev.2.1,2016-10-25
OptiMOSTM5Power-Transistor,80V
BSC025N08LS5
3Electricalcharacteristics
Table4Staticcharacteristics
Parameter
Symbol
Drain-source breakdown voltage
Values
Unit
Note/TestCondition
-
V
VGS=0V,ID=1mA
1.7
2.3
V
VDS=VGS,ID=115µA
-
0.1
10
1
100
µA
VDS=80V,VGS=0V,Tj=25°C
VDS=80V,VGS=0V,Tj=125°C
IGSS
-
10
100
nA
VGS=20V,VDS=0V
Drain-source on-state resistance
RDS(on)
-
2.1
2.6
2.5
3.3
mΩ
VGS=10V,ID=50A
VGS=4.5V,ID=25A
Gate resistance1)
RG
-
1.7
2.6
Ω
-
Transconductance
gfs
70
140
-
S
|VDS|>2|ID|RDS(on)max,ID=50A
Unit
Note/TestCondition
Min.
Typ.
Max.
V(BR)DSS
80
-
Gate threshold voltage
VGS(th)
1.1
Zero gate voltage drain current
IDSS
Gate-source leakage current
Table5Dynamiccharacteristics
Parameter
Symbol
Values
Min.
Typ.
Max.
Ciss
-
5800
7500
pF
VGS=0V,VDS=40V,f=1MHz
Coss
-
840
1100
pF
VGS=0V,VDS=40V,f=1MHz
Reverse transfer capacitance
Crss
-
34
60
pF
VGS=0V,VDS=40V,f=1MHz
Turn-on delay time
td(on)
-
10.4
-
ns
VDD=40V,VGS=10V,ID=50A,
RG,ext=3Ω
Rise time
tr
-
10.3
-
ns
VDD=40V,VGS=10V,ID=50A,
RG,ext=3Ω
Turn-off delay time
td(off)
-
51.0
-
ns
VDD=40V,VGS=10V,ID=50A,
RG,ext=3Ω
Fall time
tf
-
18.6
-
ns
VDD=40V,VGS=10V,ID=50A,
RG,ext=3Ω
Unit
Note/TestCondition
Input capacitance1)
1)
Output capacitance
1)
Table6Gatechargecharacteristics2)
Parameter
Symbol
Gate to source charge
Gate charge at threshold
Values
Min.
Typ.
Max.
Qgs
-
16
-
nC
VDD=40V,ID=50A,VGS=0to4.5V
Qg(th)
-
10
-
nC
VDD=40V,ID=50A,VGS=0to4.5V
Gate to drain charge
Qgd
-
15
22
nC
VDD=40V,ID=50A,VGS=0to4.5V
Switching charge
Qsw
-
21
-
nC
VDD=40V,ID=50A,VGS=0to4.5V
Gate charge total
Qg
-
44
55
nC
VDD=40V,ID=50A,VGS=0to4.5V
Gate plateau voltage
Vplateau
-
2.8
-
V
VDD=40V,ID=50A,VGS=0to4.5V
Gate charge total, sync. FET
Qg(sync)
-
80
-
nC
VDS=0.1V,VGS=0to10V
Qoss
-
88
117
nC
VDD=40V,VGS=0V
1)
1)
1)
Output charge
1)
2)
Defined by design. Not subject to production test.
See ″Gate charge waveforms″ for parameter definition
Final Data Sheet
4
Rev.2.1,2016-10-25
OptiMOSTM5Power-Transistor,80V
BSC025N08LS5
Table7Reversediode
Parameter
Symbol
Diode continuous forward current
Diode pulse current
Diode forward voltage
1)
Reverse recovery time
1)
Reverse recovery charge
1)
Values
Unit
Note/TestCondition
100
A
TC=25°C
-
400
A
TC=25°C
-
0.9
1.2
V
VGS=0V,IF=50A,Tj=25°C
trr
-
44
87
ns
VR=40V,IF=50A,diF/dt=100A/µs
Qrr
-
47
93
nC
VR=40V,IF=50A,diF/dt=100A/µs
Min.
Typ.
Max.
IS
-
-
IS,pulse
-
VSD
Defined by design. Not subject to production test.
Final Data Sheet
5
Rev.2.1,2016-10-25
OptiMOSTM5Power-Transistor,80V
BSC025N08LS5
4Electricalcharacteristicsdiagrams
Diagram1:Powerdissipation
Diagram2:Draincurrent
180
120
160
100
140
80
100
ID[A]
Ptot[W]
120
80
60
60
40
40
20
20
0
0
25
50
75
100
125
150
0
175
0
25
50
75
TC[°C]
100
125
Ptot=f(TC)
ID=f(TC);VGS≥10V
Diagram3:Safeoperatingarea
Diagram4:Max.transientthermalimpedance
3
175
100
10
0.5
1 µs
10 µs
102
0.2
10-1
1 ms
10 ms
1
10
0.1
0.05
ZthJC[K/W]
100 µs
ID[A]
150
TC[°C]
DC
0.02
0.01
single pulse
10-2
100
10-1
10-1
100
101
102
10-3
10-6
10-5
VDS[V]
10-3
10-2
10-1
tp[s]
ID=f(VDS);TC=25°C;D=0;parameter:tp
Final Data Sheet
10-4
ZthJC=f(tp);parameter:D=tp/T
6
Rev.2.1,2016-10-25
OptiMOSTM5Power-Transistor,80V
BSC025N08LS5
Diagram5:Typ.outputcharacteristics
Diagram6:Typ.drain-sourceonresistance
400
6
5V
360
4.5 V
5
320
3V
3.2 V
3.5 V
4V
4V
280
4
RDS(on)[mΩ]
ID[A]
240
200
3.5 V
160
5V
7V
2
120
10 V
3.2 V
80
3V
40
0
4.5 V
3
1
2.8 V
0.0
0.5
1.0
1.5
2.0
2.5
0
3.0
0
50
100
150
VDS[V]
200
250
300
350
400
ID[A]
ID=f(VDS);Tj=25°C;parameter:VGS
RDS(on)=f(ID);Tj=25°C;parameter:VGS
Diagram7:Typ.transfercharacteristics
Diagram8:Typ.forwardtransconductance
400
200
360
320
160
25 °C
280
150 °C
120
gfs[S]
ID[A]
240
200
160
80
120
80
40
40
0
0
2
4
6
8
0
0
VGS[V]
40
60
80
100
ID[A]
ID=f(VGS);|VDS|>2|ID|RDS(on)max;parameter:Tj
Final Data Sheet
20
gfs=f(ID);Tj=25°C
7
Rev.2.1,2016-10-25
OptiMOSTM5Power-Transistor,80V
BSC025N08LS5
Diagram9:Drain-sourceon-stateresistance
Diagram10:Typ.gatethresholdvoltage
6
3
5
4
2
VGS(th)[V]
RDS(on)[mΩ]
1150 µA
max
3
115 µA
typ
2
1
1
0
-60
-20
20
60
100
140
0
-60
180
-20
20
Tj[°C]
60
100
140
180
Tj[°C]
RDS(on)=f(Tj);ID=50A;VGS=10V
VGS(th)=f(Tj);VGS=VDS
Diagram11:Typ.capacitances
Diagram12:Forwardcharacteristicsofreversediode
4
103
10
25 °C
150 °C
25 °C, max
150 °C, max
Ciss
103
102
IF[A]
C[pF]
Coss
102
101
Crss
1
10
0
20
40
60
80
100
0.0
0.5
VDS[V]
C=f(VDS);VGS=0V;f=1MHz
Final Data Sheet
1.0
1.5
2.0
VSD[V]
IF=f(VSD);parameter:Tj
8
Rev.2.1,2016-10-25
OptiMOSTM5Power-Transistor,80V
BSC025N08LS5
Diagram13:Avalanchecharacteristics
Diagram14:Typ.gatecharge
2
10
10
9
8
7
25 °C
6
125 °C
VGS[V]
IAV[A]
100 °C
101
40 V
16 V
5
64 V
4
3
2
1
100
100
101
102
103
0
0
10
tAV[µs]
20
30
40
50
60
70
80
Qgate[nC]
IAS=f(tAV);RGS=25Ω;parameter:Tj(start)
VGS=f(Qgate);ID=50Apulsed;parameter:VDD
Diagram15:Drain-sourcebreakdownvoltage
Gate charge waveforms
86
84
VBR(DSS)[V]
82
80
78
76
-60
-20
20
60
100
140
180
Tj[°C]
VBR(DSS)=f(Tj);ID=1mA
Final Data Sheet
9
Rev.2.1,2016-10-25
OptiMOSTM5Power-Transistor,80V
BSC025N08LS5
5PackageOutlines
Figure1OutlinePG-TDSON-8,dimensionsinmm
Final Data Sheet
10
Rev.2.1,2016-10-25
OptiMOSTM5Power-Transistor,80V
BSC025N08LS5
Figure2OutlineFootprint(TDSON-8)
Final Data Sheet
11
Rev.2.1,2016-10-25
OptiMOSTM5Power-Transistor,80V
BSC025N08LS5
RevisionHistory
BSC025N08LS5
Revision:2016-10-25,Rev.2.1
Previous Revision
Revision
Date
Subjects (major changes since last revision)
2.0
2016-10-14
Release of final version
2.1
2016-10-25
Update Rg and EAS
TrademarksofInfineonTechnologiesAG
AURIX™,C166™,CanPAK™,CIPOS™,CoolGaN™,CoolMOS™,CoolSET™,CoolSiC™,CORECONTROL™,CROSSAVE™,DAVE™,DI-POL™,DrBlade™,
EasyPIM™,EconoBRIDGE™,EconoDUAL™,EconoPACK™,EconoPIM™,EiceDRIVER™,eupec™,FCOS™,HITFET™,HybridPACK™,Infineon™,
ISOFACE™,IsoPACK™,i-Wafer™,MIPAQ™,ModSTACK™,my-d™,NovalithIC™,OmniTune™,OPTIGA™,OptiMOS™,ORIGA™,POWERCODE™,
PRIMARION™,PrimePACK™,PrimeSTACK™,PROFET™,PRO-SIL™,RASIC™,REAL3™,ReverSave™,SatRIC™,SIEGET™,SIPMOS™,SmartLEWIS™,
SOLIDFLASH™,SPOC™,TEMPFET™,thinQ™,TRENCHSTOP™,TriCore™.
TrademarksupdatedAugust2015
OtherTrademarks
Allreferencedproductorservicenamesandtrademarksarethepropertyoftheirrespectiveowners.
WeListentoYourComments
Anyinformationwithinthisdocumentthatyoufeeliswrong,unclearormissingatall?Yourfeedbackwillhelpustocontinuously
improvethequalityofthisdocument.Pleasesendyourproposal(includingareferencetothisdocument)to:
erratum@infineon.com
Publishedby
InfineonTechnologiesAG
81726München,Germany
©2016InfineonTechnologiesAG
AllRightsReserved.
LegalDisclaimer
Theinformationgiveninthisdocumentshallinnoeventberegardedasaguaranteeofconditionsorcharacteristics
(“Beschaffenheitsgarantie”).
Withrespecttoanyexamples,hintsoranytypicalvaluesstatedhereinand/oranyinformationregardingtheapplicationofthe
product,InfineonTechnologiesherebydisclaimsanyandallwarrantiesandliabilitiesofanykind,includingwithoutlimitation
warrantiesofnon-infringementofintellectualpropertyrightsofanythirdparty.
Inaddition,anyinformationgiveninthisdocumentissubjecttocustomer’scompliancewithitsobligationsstatedinthis
documentandanyapplicablelegalrequirements,normsandstandardsconcerningcustomer’sproductsandanyuseofthe
productofInfineonTechnologiesincustomer’sapplications.
Thedatacontainedinthisdocumentisexclusivelyintendedfortechnicallytrainedstaff.Itistheresponsibilityofcustomer’s
technicaldepartmentstoevaluatethesuitabilityoftheproductfortheintendedapplicationandthecompletenessoftheproduct
informationgiveninthisdocumentwithrespecttosuchapplication.
Information
Forfurtherinformationontechnology,deliverytermsandconditionsandpricespleasecontactyournearestInfineon
TechnologiesOffice(www.infineon.com).
Warnings
Duetotechnicalrequirements,componentsmaycontaindangeroussubstances.Forinformationonthetypesinquestion,
pleasecontactthenearestInfineonTechnologiesOffice.
TheInfineonTechnologiescomponentdescribedinthisDataSheetmaybeusedinlife-supportdevicesorsystemsand/or
automotive,aviationandaerospaceapplicationsorsystemsonlywiththeexpresswrittenapprovalofInfineonTechnologies,ifa
failureofsuchcomponentscanreasonablybeexpectedtocausethefailureofthatlife-support,automotive,aviationand
aerospacedeviceorsystemortoaffectthesafetyoreffectivenessofthatdeviceorsystem.Lifesupportdevicesorsystemsare
intendedtobeimplantedinthehumanbodyortosupportand/ormaintainandsustainand/orprotecthumanlife.Iftheyfail,itis
reasonabletoassumethatthehealthoftheuserorotherpersonsmaybeendangered.
Final Data Sheet
12
Rev.2.1,2016-10-25
