BSC026N08NS5ATMA1

BSC026N08NS5 MOSFET OptiMOSTM5Power-Transistor,80V PG-TDSON-8 8 Features 7 •OptimizedforSynchronousRectificationinserveranddesktop •100%avalanchetested •Superiorthermalresistance •N-channel •QualifiedaccordingtoJEDEC1)fortargetapplications •Pb-freeleadplating;RoHScompliant •Halogen-freeaccordingtoIEC61249-2-21 5 6 6 7 5 Pin 1 8 4 2 3 3 2 4 1 Table1KeyPerformanceParameters Parameter Value Unit VDS 80 V RDS(on),max 2.6 mΩ ID 184 A Qoss 88 nC QG(0V..10V) 74 nC Drain Pin 5-8 Gate Pin 4 Source Pin 1-3 *1: Internal body diode Type/OrderingCode Package BSC026N08NS5 PG-TDSON-8 1) *1 Marking RelatedLinks 026N08NS - J-STD20 and JESD22 Final Data Sheet 1 Rev.2.3,2022-09-23 OptiMOSTM5Power-Transistor,80V BSC026N08NS5 TableofContents Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 Thermal characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 Electrical characteristics diagrams . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Package Outlines . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Revision History . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Trademarks . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Disclaimer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Final Data Sheet 2 Rev.2.3,2022-09-23 OptiMOSTM5Power-Transistor,80V BSC026N08NS5 1Maximumratings atTA=25°C,unlessotherwisespecified Table2Maximumratings Parameter Symbol Continuous drain current1) Values Unit Note/TestCondition 184 116 23 A VGS=10V,TC=25°C VGS=10V,TC=100°C VGS=10V,TA=25°C,RthJA=50K/W2) - 736 A TC=25°C - - 370 mJ ID=50A,RGS=25Ω VGS -20 - 20 V - Power dissipation Ptot - - 156 2.5 W TC=25°C TA=25°C,RthJA=50K/W2) Operating and storage temperature Tj,Tstg -55 - 150 °C IEC climatic category; DIN IEC 68-1: 55/150/56 Unit Note/TestCondition Min. Typ. Max. ID - - Pulsed drain current3) ID,pulse - Avalanche energy, single pulse4) EAS Gate source voltage 2Thermalcharacteristics Table3Thermalcharacteristics Parameter Symbol Thermal resistance, junction - case, bottom Values Min. Typ. Max. RthJC - 0.5 0.8 K/W - Thermal resistance, junction - case, top RthJC - - 20 K/W - Device on PCB, 6 cm2 cooling area2) RthJA - - 50 K/W - 1) Rating refers to the product only with datasheet specified absolute maximum values, maintaining case temperature as specified. For other case temperatures please refer to Diagram 2. De-rating will be required based on the actual environmental conditions. 2) Device on 40 mm x 40 mm x 1.5 mm epoxy PCB FR4 with 6 cm2 (one layer, 70 µm thick) copper area for drain connection. PCB is vertical in still air. 3) See Diagram 3 for more detailed information 4) See Diagram 13 for more detailed information Final Data Sheet 3 Rev.2.3,2022-09-23 OptiMOSTM5Power-Transistor,80V BSC026N08NS5 3Electricalcharacteristics atTj=25°C,unlessotherwisespecified Table4Staticcharacteristics Parameter Symbol Drain-source breakdown voltage Values Unit Note/TestCondition - V VGS=0V,ID=1mA 3 3.8 V VDS=VGS,ID=115µA - 0.1 10 1 100 µA VDS=80V,VGS=0V,Tj=25°C VDS=80V,VGS=0V,Tj=125°C IGSS - 10 100 nA VGS=20V,VDS=0V Drain-source on-state resistance RDS(on) - 2.2 3.0 2.6 3.9 mΩ VGS=10V,ID=50A VGS=6V,ID=25A Gate resistance RG - 1.9 2.9 Ω - Transconductance gfs 60 120 - S |VDS|>2|ID|RDS(on)max,ID=50A Unit Note/TestCondition Min. Typ. Max. V(BR)DSS 80 - Gate threshold voltage VGS(th) 2.2 Zero gate voltage drain current IDSS Gate-source leakage current Table5Dynamiccharacteristics Parameter Symbol Input capacitance Values Min. Typ. Max. Ciss - 5200 6800 pF VGS=0V,VDS=40V,f=1MHz Coss - 840 1100 pF VGS=0V,VDS=40V,f=1MHz Reverse transfer capacitance Crss - 38 66 pF VGS=0V,VDS=40V,f=1MHz Turn-on delay time td(on) - 18 - ns VDD=40V,VGS=10V,ID=50A, RG,ext=3Ω Rise time tr - 14 - ns VDD=40V,VGS=10V,ID=50A, RG,ext=3Ω Turn-off delay time td(off) - 47 - ns VDD=40V,VGS=10V,ID=50A, RG,ext=3Ω Fall time tf - 16 - ns VDD=40V,VGS=10V,ID=50A, RG,ext=3Ω Unit Note/TestCondition Output capacitance1) 1) Table6Gatechargecharacteristics2) Parameter Symbol Gate to source charge Gate charge at threshold Values Min. Typ. Max. Qgs - 24 - nC VDD=40V,ID=50A,VGS=0to10V Qg(th) - 14 - nC VDD=40V,ID=50A,VGS=0to10V Gate to drain charge Qgd - 16 23 nC VDD=40V,ID=50A,VGS=0to10V Switching charge Qsw - 25 - nC VDD=40V,ID=50A,VGS=0to10V Gate charge total Qg - 74 92 nC VDD=40V,ID=50A,VGS=0to10V Gate plateau voltage Vplateau - 4.5 - V VDD=40V,ID=50A,VGS=0to10V Gate charge total, sync. FET Qg(sync) - 64 - nC VDS=0.1V,VGS=0to10V Qoss - 88 117 nC VDD=40V,VGS=0V 1) 1) 1) Output charge 1) 2) Defined by design. Not subject to production test. See ″Gate charge waveforms″ for parameter definition Final Data Sheet 4 Rev.2.3,2022-09-23 OptiMOSTM5Power-Transistor,80V BSC026N08NS5 Table7Reversediode Parameter Symbol Diode continuous forward current Diode pulse current Diode forward voltage 1) Reverse recovery time 1) Reverse recovery charge 1) Values Unit Note/TestCondition 118 A TC=25°C - 736 A TC=25°C - 0.85 1.1 V VGS=0V,IF=50A,Tj=25°C trr - 56 112 ns VR=40V,IF=50A,diF/dt=100A/µs Qrr - 92 184 nC VR=40V,IF=50A,diF/dt=100A/µs Min. Typ. Max. IS - - IS,pulse - VSD Defined by design. Not subject to production test. Final Data Sheet 5 Rev.2.3,2022-09-23 OptiMOSTM5Power-Transistor,80V BSC026N08NS5 4Electricalcharacteristicsdiagrams Diagram1:Powerdissipation Diagram2:Draincurrent 180 200 160 175 140 150 120 100 ID[A] Ptot[W] 125 80 100 75 60 50 40 25 20 0 0 25 50 75 100 125 150 0 175 0 20 40 60 TC[°C] 80 100 120 Ptot=f(TC) ID=f(TC);VGS≥10V Diagram3:Safeoperatingarea Diagram4:Max.transientthermalimpedance 3 160 100 10 0.5 1 µs 10 µs 102 0.2 10-1 1 ms 1 10 0.1 ZthJC[K/W] 100 µs ID[A] 140 TC[°C] 10 ms DC 0.05 0.02 0.01 single pulse 10-2 100 10-1 10-1 100 101 102 10-3 10-6 10-5 VDS[V] 10-3 10-2 10-1 tp[s] ID=f(VDS);TC=25°C;D=0;parameter:tp Final Data Sheet 10-4 ZthJC=f(tp);parameter:D=tp/T 6 Rev.2.3,2022-09-23 OptiMOSTM5Power-Transistor,80V BSC026N08NS5 Diagram5:Typ.outputcharacteristics Diagram6:Typ.drain-sourceonresistance 400 6 10 V 7V 5V 5.5 V 6V 360 5 6V 320 280 4 200 RDS(on)[mΩ] ID[A] 240 5.5 V 160 3 7V 10 V 2 120 5V 80 1 40 0 0.0 0.5 1.0 1.5 2.0 2.5 0 3.0 0 50 100 150 VDS[V] 200 250 300 350 400 ID[A] ID=f(VDS);Tj=25°C;parameter:VGS RDS(on)=f(ID);Tj=25°C;parameter:VGS Diagram7:Typ.transfercharacteristics Diagram8:Typ.forwardtransconductance 400 160 360 320 120 280 gfs[S] ID[A] 240 200 80 160 120 40 80 40 0 150 °C 0 2 25 °C 4 6 8 0 0 VGS[V] 40 60 80 100 ID[A] ID=f(VGS);|VDS|>2|ID|RDS(on)max;parameter:Tj Final Data Sheet 20 gfs=f(ID);Tj=25°C 7 Rev.2.3,2022-09-23 OptiMOSTM5Power-Transistor,80V BSC026N08NS5 Diagram9:Drain-sourceon-stateresistance Diagram10:Typ.gatethresholdvoltage 5 5 4 4 max 1150 µA 3 VGS(th)[V] RDS(on)[mΩ] 3 typ 2 1 115 µA 2 1 0 -60 -20 20 60 100 140 0 -60 180 -20 20 Tj[°C] 60 100 140 180 Tj[°C] RDS(on)=f(Tj);ID=50A;VGS=10V VGS(th)=f(Tj);VGS=VDS Diagram11:Typ.capacitances Diagram12:Forwardcharacteristicsofreversediode 4 103 10 25 °C 25 °C, max 150 °C 150 °C, max Ciss 103 102 IF[A] C[pF] Coss 102 101 Crss 101 0 20 40 60 80 100 0.0 0.5 VDS[V] C=f(VDS);VGS=0V;f=1MHz Final Data Sheet 1.0 1.5 2.0 VSD[V] IF=f(VSD);parameter:Tj 8 Rev.2.3,2022-09-23 OptiMOSTM5Power-Transistor,80V BSC026N08NS5 Diagram13:Avalanchecharacteristics Diagram14:Typ.gatecharge 2 10 10 9 25 °C 40 V 8 7 100 °C 101 VGS[V] IAV[A] 6 125 °C 16 V 5 64 V 4 3 2 1 100 100 101 102 103 tAV[µs] 0 0 10 20 30 40 50 60 70 80 Qgate[nC] IAS=f(tAV);RGS=25Ω;parameter:Tj(start) VGS=f(Qgate);ID=50Apulsed;parameter:VDD Diagram15:Drain-sourcebreakdownvoltage Diagram Gate charge waveforms 86 84 VBR(DSS)[V] 82 80 78 76 -60 -20 20 60 100 140 180 Tj[°C] VBR(DSS)=f(Tj);ID=1mA Final Data Sheet 9 Rev.2.3,2022-09-23 OptiMOSTM5Power-Transistor,80V BSC026N08NS5 5PackageOutlines PACKAGE - GROUP NUMBER: DIMENSIONS A b c D D1 D2 E E1 e L L1 PG-TDSON-8-U08 MILLIMETERS MIN. MAX. 0.90 1.20 0.34 0.54 0.15 0.35 4.80 5.35 3.90 4.40 0.00 0.22 5.70 6.10 4.05 4.25 1.27 0.45 0.65 0.45 0.65 Figure1OutlinePG-TDSON-8,dimensionsinmm Final Data Sheet 10 Rev.2.3,2022-09-23 OptiMOSTM5Power-Transistor,80V BSC026N08NS5 RevisionHistory BSC026N08NS5 Revision:2022-09-23,Rev.2.3 Previous Revision Revision Date Subjects (major changes since last revision) 2.0 2014-12-18 Release of final version 2.1 2015-08-31 Rev. 2.0 2.2 2021-07-20 Update current rating 2.3 2022-09-23 Update outline drawing and footnotes Trademarks Allreferencedproductorservicenamesandtrademarksarethepropertyoftheirrespectiveowners. WeListentoYourComments Anyinformationwithinthisdocumentthatyoufeeliswrong,unclearormissingatall?Yourfeedbackwillhelpustocontinuously improvethequalityofthisdocument.Pleasesendyourproposal(includingareferencetothisdocument)to: erratum@infineon.com Publishedby InfineonTechnologiesAG 81726München,Germany ©2022InfineonTechnologiesAG AllRightsReserved. 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Information Forfurtherinformationontechnology,deliverytermsandconditionsandpricespleasecontactyournearestInfineon TechnologiesOffice(www.infineon.com). Warnings Duetotechnicalrequirements,componentsmaycontaindangeroussubstances.Forinformationonthetypesinquestion, pleasecontactthenearestInfineonTechnologiesOffice. TheInfineonTechnologiescomponentdescribedinthisDataSheetmaybeusedinlife-supportdevicesorsystemsand/or automotive,aviationandaerospaceapplicationsorsystemsonlywiththeexpresswrittenapprovalofInfineonTechnologies,ifa failureofsuchcomponentscanreasonablybeexpectedtocausethefailureofthatlife-support,automotive,aviationand aerospacedeviceorsystemortoaffectthesafetyoreffectivenessofthatdeviceorsystem.Lifesupportdevicesorsystemsare intendedtobeimplantedinthehumanbodyortosupportand/ormaintainandsustainand/orprotecthumanlife.Iftheyfail,itis reasonabletoassumethatthehealthoftheuserorotherpersonsmaybeendangered. Final Data Sheet 11 Rev.2.3,2022-09-23