BSC070N10LS5

BSC070N10LS5 MOSFET OptiMOSTM5Power-Transistor,100V SuperSO8 8 Features •OptimizedforhighperformanceSMPS,e.g.sync.Rec. •100%avalanchetested •Superiorthermalresistance •N-channel,logiclevel •Pb-freeleadplating;RoHScompliant •Halogen-freeaccordingtoIEC61249-2-21 7 5 6 4 1 2 3 6 5 3 2 4 7 8 1 Productvalidation FullyqualifiedaccordingtoJEDECforIndustrialApplications Table1KeyPerformanceParameters Parameter Value Unit VDS 100 V RDS(on),max 7 mΩ ID 79 A Qoss 41 nC QG(0V..4.5V) 16 nC Type/OrderingCode Package BSC070N10LS5 PG-TDSON-8 Final Data Sheet Marking 070N10L5 1 S1 8D S2 7D S3 6D G4 5D RelatedLinks - Rev.2.0,2019-04-01 OptiMOSTM5Power-Transistor,100V BSC070N10LS5 TableofContents Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 Thermal characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 Electrical characteristics diagrams . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Package Outlines . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Revision History . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Trademarks . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Disclaimer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Final Data Sheet 2 Rev.2.0,2019-04-01 OptiMOSTM5Power-Transistor,100V BSC070N10LS5 1Maximumratings atTA=25°C,unlessotherwisespecified Table2Maximumratings Parameter Symbol Values Unit Note/TestCondition 79 61 14 A VGS=10V,TC=25°C VGS=10V,TC=100°C VGS=10V,TA=25°C, RTHJA=50°C/W1) - 318 A TA=25°C - - 70 mJ ID=50A,RGS=25Ω VGS -20 - 20 V - Power dissipation Ptot - - 83 2.5 W TC=25°C TA=25°C,RTHJA=50°C/W2) Operating and storage temperature Tj,Tstg -55 - 150 °C IEC climatic category; DIN IEC 68-1: 55/150/56 Unit Note/TestCondition Min. Typ. Max. ID - - ID,pulse - Avalanche energy, single pulse EAS Gate source voltage Continuous drain current Pulsed drain current2) 3) 2Thermalcharacteristics Table3Thermalcharacteristics Parameter Symbol Thermal resistance, junction - case Device on PCB, 6 cm² cooling area1) Values Min. Typ. Max. RthJC - 0.9 1.5 °C/W - RthJA - - 50 °C/W - 1) Device on 40 mm x 40 mm x 1.5 mm epoxy PCB FR4 with 6 cm2 (one layer, 70 µm thick) copper area for drain connection. PCB is vertical in still air. 2) See Diagram 3 for more detailed information 3) See Diagram 13 for more detailed information Final Data Sheet 3 Rev.2.0,2019-04-01 OptiMOSTM5Power-Transistor,100V BSC070N10LS5 3Electricalcharacteristics atTj=25°C,unlessotherwisespecified Table4Staticcharacteristics Parameter Symbol Drain-source breakdown voltage Values Unit Note/TestCondition - V VGS=0V,ID=1mA 1.7 2.3 V VDS=VGS,ID=49µA - 0.1 10 1 100 µA VDS=100V,VGS=0V,Tj=25°C VDS=100V,VGS=0V,Tj=125°C IGSS - 10 100 nA VGS=20V,VDS=0V Drain-source on-state resistance RDS(on) - 6.0 7.7 7.0 8.5 mΩ VGS=10V,ID=40A VGS=4.5V,ID=20A Gate resistance1) RG - 1.0 1.5 Ω - Transconductance gfs 36 73 - S |VDS|≥2|ID|RDS(on)max,ID=40A Unit Note/TestCondition Min. Typ. Max. V(BR)DSS 100 - Gate threshold voltage VGS(th) 1.1 Zero gate voltage drain current IDSS Gate-source leakage current Table5Dynamiccharacteristics Parameter Symbol Input capacitance1) Values Min. Typ. Max. Ciss - 2100 2700 pF VGS=0V,VDS=50V,f=1MHz Coss - 340 440 pF VGS=0V,VDS=50V,f=1MHz Reverse transfer capacitance Crss - 16 28 pF VGS=0V,VDS=50V,f=1MHz Turn-on delay time td(on) - 6.5 - ns VDD=40V,VGS=10V,ID=50A, RG,ext=3Ω Rise time tr - 3.6 - ns VDD=40V,VGS=10V,ID=50A, RG,ext=3Ω Turn-off delay time td(off) - 20 - ns VDD=40V,VGS=10V,ID=50A, RG,ext=3Ω Fall time tf - 5.3 - ns VDD=40V,VGS=10V,ID=50A, RG,ext=3Ω Unit Note/TestCondition Output capacitance1) 1) Table6Gatechargecharacteristics2) Parameter Symbol Gate to source charge Gate charge at threshold Values Min. Typ. Max. Qgs - 7 - nC VDD=50V,ID=40A,VGS=0to4.5V Qg(th) - 4 - nC VDD=50V,ID=40A,VGS=0to4.5V Gate to drain charge Qgd - 6 8 nC VDD=50V,ID=40A,VGS=0to4.5V Switching charge Qsw - 9 - nC VDD=50V,ID=40A,VGS=0to4.5V Gate charge total Qg - 16 20 nC VDD=50V,ID=40A,VGS=0to4.5V Gate plateau voltage Vplateau - 3.2 - V VDD=50V,ID=40A,VGS=0to4.5V Gate charge total, sync. FET Qg(sync) - 26 - nC VDS=0.1V,VGS=0to10V Qoss - 41 54 nC VDS=50V,VGS=0V 1) 1) 1) Output charge 1) 2) Defined by design. Not subject to production test. See ″Gate charge waveforms″ for parameter definition Final Data Sheet 4 Rev.2.0,2019-04-01 OptiMOSTM5Power-Transistor,100V BSC070N10LS5 Table7Reversediode Parameter Symbol Diode continuous forward current Diode pulse current Diode forward voltage 1) Reverse recovery time 1) Reverse recovery charge 1) Values Unit Note/TestCondition 70 A TC=25°C - 317.6 A TC=25°C - 0.9 1.1 V VGS=0V,IF=40A,Tj=25°C trr - 21 42 ns VR=50V,IF=40A,diF/dt=100A/µs Qrr - 12 24 nC VR=50V,IF=40A,diF/dt=100A/µs Min. Typ. Max. IS - - IS,pulse - VSD Defined by design. Not subject to production test. Final Data Sheet 5 Rev.2.0,2019-04-01 OptiMOSTM5Power-Transistor,100V BSC070N10LS5 4Electricalcharacteristicsdiagrams Diagram1:Powerdissipation Diagram2:Draincurrent 100 80 70 80 60 50 ID[A] Ptot[W] 60 40 40 30 20 20 10 0 0 20 40 60 80 100 120 140 0 160 0 20 40 60 TC[°C] 80 100 120 140 160 TC[°C] Ptot=f(TC) ID=f(TC);VGS≥10V Diagram3:Safeoperatingarea Diagram4:Max.transientthermalimpedance 3 101 10 single pulse 0.01 0.02 0.05 0.1 0.2 0.5 1 µs 102 10 µs 100 100 µs ZthJC[K/W] 10 ms 101 ID[A] 1 ms DC 100 10-1 10-1 10-2 10-1 100 101 102 103 10-2 10-5 10-4 VDS[V] 10-2 10-1 100 tp[s] ID=f(VDS);TC=25°C;D=0;parameter:tp Final Data Sheet 10-3 ZthJC=f(tp);parameter:D=tp/T 6 Rev.2.0,2019-04-01 OptiMOSTM5Power-Transistor,100V BSC070N10LS5 Diagram5:Typ.outputcharacteristics Diagram6:Typ.drain-sourceonresistance 320 20.0 10 V 2.8 V 280 17.5 5V 240 3V 15.0 3.5 V 12.5 4.5 V 160 120 RDS(on)[mΩ] ID[A] 200 4V 10.0 4.5 V 7.5 5V 4V 80 10 V 5.0 3.5 V 40 2.5 3V 0 2.8 V 0 1 2 3 4 0.0 5 0 20 40 60 VDS[V] 80 100 120 140 160 ID[A] ID=f(VDS),Tj=25°C;parameter:VGS RDS(on)=f(ID),Tj=25°C;parameter:VGS Diagram7:Typ.transfercharacteristics Diagram8:Typ.drain-sourceonresistance 280 20.0 25 °C 17.5 240 15.0 200 150 °C 12.5 ID[A] RDS(on)[mΩ] 160 120 10.0 7.5 25 °C 80 5.0 40 0 150 °C 2.5 0 1 2 3 4 5 VGS[V] 0 2 4 6 8 10 VGS[V] ID=f(VGS),|VDS|>2|ID|RDS(on)max;parameter:Tj Final Data Sheet 0.0 RDS(on)=f(VGS),ID=40A;parameter:Tj 7 Rev.2.0,2019-04-01 OptiMOSTM5Power-Transistor,100V BSC070N10LS5 Diagram9:Normalizeddrain-sourceonresistance Diagram10:Typ.gatethresholdvoltage 2.0 2.4 2.0 1.6 1.2 VGS(th)[V] RDS(on)(normalizedto25°C) 1.6 0.8 1.2 490 µA 49 µA 0.8 0.4 0.4 0.0 -80 -40 0 40 80 120 0.0 -80 160 -40 0 Tj[°C] 40 80 120 160 Tj[°C] RDS(on)=f(Tj),ID=40A,VGS=10V VGS(th=f(Tj),VGS=VDS;parameter:ID Diagram11:Typ.capacitances Diagram12:Forwardcharacteristicsofreversediode 4 103 10 25 °C 25 °C, max 150 °C 150 °C, max Ciss 102 IF[A] C[pF] 103 Coss 102 101 101 Crss 0 20 40 60 80 100 100 0.00 0.25 VDS[V] 0.75 1.00 1.25 1.50 VSD[V] C=f(VDS);VGS=0V;f=1MHz Final Data Sheet 0.50 IF=f(VSD);parameter:Tj 8 Rev.2.0,2019-04-01 OptiMOSTM5Power-Transistor,100V BSC070N10LS5 Diagram13:Avalanchecharacteristics Diagram14:Typ.gatecharge 2 10 10 20 V 50 V 80 V 8 101 IAV[A] VGS[V] 6 25 °C 4 100 °C 0 10 125 °C 10-1 100 101 102 103 tAV[µs] 2 0 0 4 8 12 16 20 24 28 32 Qgate[nC] IAS=f(tAV);RGS=25Ω;parameter:Tj,start VGS=f(Qgate),ID=40Apulsed,Tj=25°C;parameter:VDD Diagram15:Drain-sourcebreakdownvoltage Diagram Gate charge waveforms 108 106 VBR(DSS)[V] 104 102 100 98 96 -80 -40 0 40 80 120 160 Tj[°C] VBR(DSS)=f(Tj);ID=1mA Final Data Sheet 9 Rev.2.0,2019-04-01 OptiMOSTM5Power-Transistor,100V BSC070N10LS5 5PackageOutlines   Figure1OutlinePG-TDSON-8,dimensionsinmm Final Data Sheet 10 Rev.2.0,2019-04-01 OptiMOSTM5Power-Transistor,100V BSC070N10LS5   Figure2OutlineFootprint(TDSON-8) Final Data Sheet 11 Rev.2.0,2019-04-01 OptiMOSTM5Power-Transistor,100V BSC070N10LS5 RevisionHistory BSC070N10LS5 Revision:2019-04-01,Rev.2.0 Previous Revision Revision Date Subjects (major changes since last revision) 2.0 2019-04-01 Release of final version Trademarks Allreferencedproductorservicenamesandtrademarksarethepropertyoftheirrespectiveowners. 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TheInfineonTechnologiescomponentdescribedinthisDataSheetmaybeusedinlife-supportdevicesorsystemsand/or automotive,aviationandaerospaceapplicationsorsystemsonlywiththeexpresswrittenapprovalofInfineonTechnologies,ifa failureofsuchcomponentscanreasonablybeexpectedtocausethefailureofthatlife-support,automotive,aviationand aerospacedeviceorsystemortoaffectthesafetyoreffectivenessofthatdeviceorsystem.Lifesupportdevicesorsystemsare intendedtobeimplantedinthehumanbodyortosupportand/ormaintainandsustainand/orprotecthumanlife.Iftheyfail,itis reasonabletoassumethatthehealthoftheuserorotherpersonsmaybeendangered. Final Data Sheet 12 Rev.2.0,2019-04-01