BSC080N12LS
MOSFET
OptiMOSTM3Power-Transistor,120V
PG-TDSON-8
8
Features
7
•N-channel,logiclevel
•ExcellentgatechargexRDS(on)product(FOM)
•Verylowon-resistanceRDS(on)
•150°Coperatingtemperature
•Pb-freeleadplating;RoHScompliant
•Idealforhigh-frequencyswitchingandsynchronousrectification
•Halogen-freeaccordingtoIEC61249-2-21
5
6
6
7
5
Pin 1
8
4
2
3
3
2
4
1
Productvalidation
FullyqualifiedaccordingtoJEDECforIndustrialApplications
Drain
Pin 5-8
Table1KeyPerformanceParameters
Parameter
Value
Unit
VDS
120
V
Gate
Pin 4
*1
Source
Pin 1-3
*1: Internal body diode
RDS(on),max
8.0
mΩ
ID
99
A
Qoss
79
nC
QG(0V..10V)
79
nC
Type/OrderingCode
Package
BSC080N12LS
PG-TDSON-8
Final Data Sheet
1
Marking
RelatedLinks
080N12LS
-
Rev.2.1,2022-11-09
OptiMOSTM3Power-Transistor,120V
BSC080N12LS
TableofContents
Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
Thermal characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
Electrical characteristics diagrams . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Package Outlines . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Revision History . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Trademarks . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Disclaimer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Final Data Sheet
2
Rev.2.1,2022-11-09
OptiMOSTM3Power-Transistor,120V
BSC080N12LS
1Maximumratings
atTA=25°C,unlessotherwisespecified
Table2Maximumratings
Parameter
Symbol
Continuous drain current
Values
Unit
Note/TestCondition
99
77
12
A
VGS=10V,TC=25°C
VGS=10V,TC=100°C
VGS=4.5V,TA=25°C,RthJA=45°C/W1)
-
394
A
TA=25°C
-
-
377
mJ
ID=50A,RGS=25Ω
VGS
-20
-
20
V
-
Power dissipation
Ptot
-
-
156
W
TC=25°C
Operating and storage temperature
Tj,Tstg
-55
-
150
°C
IEC climatic category; DIN IEC 68-1:
55/150/56
Unit
Note/TestCondition
Min.
Typ.
Max.
ID
-
-
Pulsed drain current2)
ID,pulse
-
Avalanche energy, single pulse3)
EAS
Gate source voltage
2Thermalcharacteristics
Table3Thermalcharacteristics
Parameter
Symbol
Thermal resistance, junction - case,
bottom
Thermal resistance, junction - case,
top
Values
Min.
Typ.
Max.
RthJC
-
0.45
0.8
°C/W -
RthJC
-
-
18
°C/W -
Thermal resistance, junction - ambient,
RthJA
minimal footprint
-
-
62
°C/W -
Thermal resistance, juntion - ambient,
6 cm² cooling area2)
-
-
45
°C/W -
RthJA
1)
Device on 40 mm x 40 mm x 1.5 mm epoxy PCB FR4 with 6 cm2 (one layer, 70 µm thick) copper area for drain
connection. PCB is vertical in still air.
2)
See Diagram 3 for more detailed information
3)
See Diagram 13 for more detailed information
Final Data Sheet
3
Rev.2.1,2022-11-09
OptiMOSTM3Power-Transistor,120V
BSC080N12LS
3Electricalcharacteristics
atTj=25°C,unlessotherwisespecified
Table4Staticcharacteristics
Parameter
Symbol
Drain-source breakdown voltage
Values
Unit
Note/TestCondition
-
V
VGS=0V,ID=1mA
1.85
2.4
V
VDS=VGS,ID=112µA
-
0.01
1
1
100
µA
VDS=120V,VGS=0V,Tj=25°C
VDS=120V,VGS=0V,Tj=125°C
IGSS
-
1
100
nA
VGS=20V,VDS=0V
Drain-source on-state resistance
RDS(on)
-
6.5
7.8
8.0
9.5
mΩ
VGS=10V,ID=50A
VGS=4.5V,ID=25A
Gate resistance
RG
-
0.85
-
Ω
-
Transconductance
gfs
60
120
-
S
|VDS|≥2|ID|RDS(on)max,ID=50A
Unit
Note/TestCondition
Min.
Typ.
Max.
V(BR)DSS
120
-
Gate threshold voltage
VGS(th)
1.2
Zero gate voltage drain current
IDSS
Gate-source leakage current
Table5Dynamiccharacteristics
Parameter
Symbol
Input capacitance1)
Values
Min.
Typ.
Max.
Ciss
-
5600
7400
pF
VGS=0V,VDS=60V,f=1MHz
Coss
-
590
770
pF
VGS=0V,VDS=60V,f=1MHz
Reverse transfer capacitance
Crss
-
28
42
pF
VGS=0V,VDS=60V,f=1MHz
Turn-on delay time
td(on)
-
11
-
ns
VDD=60V,VGS=10V,ID=25A,
RG,ext=1.6Ω
Rise time
tr
-
9
-
ns
VDD=60V,VGS=10V,ID=25A,
RG,ext=1.6Ω
Turn-off delay time
td(off)
-
37
-
ns
VDD=60V,VGS=10V,ID=25A,
RG,ext=1.6Ω
Fall time
tf
-
13
-
ns
VDD=60V,VGS=10V,ID=25A,
RG,ext=1.6Ω
Unit
Note/TestCondition
Output capacitance1)
1)
Table6Gatechargecharacteristics2)
Parameter
Symbol
Gate to source charge
Values
Min.
Typ.
Max.
Qgs
-
17.5
-
nC
VDD=60V,ID=25A,VGS=0to10V
Gate to drain charge
Qgd
-
12.9
-
nC
VDD=60V,ID=25A,VGS=0to10V
Switching charge
Qsw
-
20.1
-
nC
VDD=60V,ID=25A,VGS=0to10V
Gate charge total
Qg
-
79
-
nC
VDD=60V,ID=25A,VGS=0to10V
Gate plateau voltage
Vplateau
-
3.1
-
V
VDD=60V,ID=25A,VGS=0to10V
Output charge
Qoss
-
79
-
nC
VDD=60V,VGS=0V
1)
2)
Defined by design. Not subject to production test.
See ″Gate charge waveforms″ for parameter definition
Final Data Sheet
4
Rev.2.1,2022-11-09
OptiMOSTM3Power-Transistor,120V
BSC080N12LS
Table7Reversediode
Parameter
Symbol
Diode continuous forward current
Values
Unit
Note/TestCondition
109
A
TC=25°C
-
394
A
TC=25°C
-
0.88
1.2
V
VGS=0V,IF=50A,Tj=25°C
trr
-
107
-
ns
VR=60V,IF=25A,diF/dt=100A/µs
Qrr
-
220
-
nC
VR=60V,IF=25A,diF/dt=100A/µs
Min.
Typ.
Max.
IS
-
-
Diode pulse current
IS,pulse
-
Diode forward voltage
VSD
Reverse recovery time
Reverse recovery charge
Final Data Sheet
5
Rev.2.1,2022-11-09
OptiMOSTM3Power-Transistor,120V
BSC080N12LS
4Electricalcharacteristicsdiagrams
Diagram1:Powerdissipation
Diagram2:Draincurrent
160
100
140
80
120
60
ID[A]
Ptot[W]
100
80
40
60
40
20
20
0
0
20
40
60
80
100
120
140
0
160
0
20
40
60
TC[°C]
80
100
120
140
160
TC[°C]
Ptot=f(TC)
ID=f(TC);VGS≥10V
Diagram3:Safeoperatingarea
Diagram4:Max.transientthermalimpedance
3
101
10
single pulse
0.01
0.02
0.05
0.1
0.2
0.5
1 µs
10 µs
102
1 ms
100 µs
100
ID[A]
ZthJC[K/W]
101
100
DC
10-1
10 ms
10-1
10-2
100
101
102
103
10-2
10-5
10-4
VDS[V]
10-2
10-1
100
tp[s]
ID=f(VDS);TC=25°C;D=0;parameter:tp
Final Data Sheet
10-3
ZthJC=f(tp);parameter:D=tp/T
6
Rev.2.1,2022-11-09
OptiMOSTM3Power-Transistor,120V
BSC080N12LS
Diagram5:Typ.outputcharacteristics
500
Diagram6:Typ.drain-sourceonresistance
20.0
10 V
17.5
400
5V
15.0 3 V
3.5 V
ID[A]
300
4.5 V
200
RDS(on)[mΩ]
12.5
4V
10.0
4.5 V
5V
7.5
10 V
4V
5.0
100
2.5
3.5 V
0
3V
2.8 V
0
1
2
3
4
0.0
5
0
40
80
120
VDS[V]
160
200
240
ID[A]
ID=f(VDS),Tj=25°C;parameter:VGS
RDS(on)=f(ID),Tj=25°C;parameter:VGS
Diagram7:Typ.transfercharacteristics
Diagram8:Typ.drain-sourceonresistance
400
20.0
25 °C
350
17.5
300
15.0
150 °C
150 °C
12.5
RDS(on)[mΩ]
ID[A]
250
200
150
10.0
7.5
25 °C
100
5.0
50
2.5
0
0
1
2
3
4
5
VGS[V]
0
2
4
6
8
10
VGS[V]
ID=f(VGS),|VDS|>2|ID|RDS(on)max;parameter:Tj
Final Data Sheet
0.0
RDS(on)=f(VGS),ID=50A;parameter:Tj
7
Rev.2.1,2022-11-09
OptiMOSTM3Power-Transistor,120V
BSC080N12LS
Diagram10:Typ.gatethresholdvoltage
2.4
2.4
2.0
2.0
1.6
1.6
1120 µA
VGS(th)[V]
RDS(on)(normalizedto25°C)
Diagram9:Normalizeddrain-sourceonresistance
1.2
1.2
112 µA
0.8
0.8
0.4
0.4
0.0
-80
-40
0
40
80
120
0.0
-80
160
-40
0
Tj[°C]
40
80
120
160
Tj[°C]
RDS(on)=f(Tj),ID=50A,VGS=10V
VGS(th=f(Tj),VGS=VDS;parameter:ID
Diagram11:Typ.capacitances
Diagram12:Forwardcharacteristicsofreversediode
4
103
10
25 °C
25 °C, max
150 °C
150 °C, max
Ciss
Coss
102
IF[A]
102
C[pF]
103
101
Crss
1
10
0
20
40
60
80
100
120
100
0.00
0.25
VDS[V]
0.75
1.00
1.25
1.50
VSD[V]
C=f(VDS);VGS=0V;f=1MHz
Final Data Sheet
0.50
IF=f(VSD);parameter:Tj
8
Rev.2.1,2022-11-09
OptiMOSTM3Power-Transistor,120V
BSC080N12LS
Diagram13:Avalanchecharacteristics
Diagram14:Typ.gatecharge
2
10
10
24 V
60 V
96 V
8
25 °C
101
100 °C
IAV[A]
VGS[V]
6
4
125 °C
0
10
2
10-1
100
101
102
103
tAV[µs]
0
0
10
20
30
40
50
60
70
80
Qgate[nC]
IAS=f(tAV);RGS=25Ω;parameter:Tj,start
VGS=f(Qgate),ID=25Apulsed,Tj=25°C;parameter:VDD
Diagram15:Drain-sourcebreakdownvoltage
Diagram Gate charge waveforms
131
129
127
VBR(DSS)[V]
125
123
121
119
117
115
113
-80
-40
0
40
80
120
160
Tj[°C]
VBR(DSS)=f(Tj);ID=1mA
Final Data Sheet
9
Rev.2.1,2022-11-09
OptiMOSTM3Power-Transistor,120V
BSC080N12LS
5PackageOutlines
PACKAGE - GROUP
NUMBER:
DIMENSIONS
A
b
c
D
D1
D2
E
E1
e
L
L1
PG-TDSON-8-U08
MILLIMETERS
MIN.
MAX.
0.90
1.20
0.34
0.54
0.15
0.35
4.80
5.35
3.90
4.40
0.00
0.22
5.70
6.10
4.05
4.25
1.27
0.45
0.65
0.45
0.65
Figure1OutlinePG-TDSON-8,dimensionsinmm
Final Data Sheet
10
Rev.2.1,2022-11-09
OptiMOSTM3Power-Transistor,120V
BSC080N12LS
Figure2OutlineFootprint(TDSON-8)
Final Data Sheet
11
Rev.2.1,2022-11-09
OptiMOSTM3Power-Transistor,120V
BSC080N12LS
Dimension in mm
Figure3OutlineTape(TDSON-8)
Final Data Sheet
12
Rev.2.1,2022-11-09
OptiMOSTM3Power-Transistor,120V
BSC080N12LS
RevisionHistory
BSC080N12LS
Revision:2022-11-09,Rev.2.1
Previous Revision
Revision
Date
Subjects (major changes since last revision)
2.0
2019-11-25
Release of final version
2.1
2022-11-09
Bug fix, update outline drawing and footnotes
Trademarks
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Final Data Sheet
13
Rev.2.1,2022-11-09