BSC096N10LS5

BSC096N10LS5 MOSFET OptiMOSTM5Power-Transistor,100V SuperSO8 8 Features •Idealforhigh-frequencyswitching •100%avalanchetested •Superiorthermalresistance •N-channel,logiclevel •Pb-freeleadplating;RoHScompliant •Halogen-freeaccordingtoIEC61249-2-21 •Optimizedforchargers 7 5 6 4 1 2 3 6 5 3 2 4 7 8 1 Productvalidation FullyqualifiedaccordingtoJEDECforIndustrialApplications Table1KeyPerformanceParameters S1 8D S2 7D Parameter Value Unit S3 6D VDS 100 V G4 5D RDS(on),max 9.6 mΩ ID 72 A Qoss 30 nC QG(0V..4.5V) 12 nC Type/OrderingCode Package BSC096N10LS5 PG-TDSON-8 Final Data Sheet Marking 096N10LS 1 RelatedLinks - Rev.2.1,2019-09-02 OptiMOSTM5Power-Transistor,100V BSC096N10LS5 TableofContents Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 Thermal characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 Electrical characteristics diagrams . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Package Outlines . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Revision History . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Trademarks . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Disclaimer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Final Data Sheet 2 Rev.2.1,2019-09-02 OptiMOSTM5Power-Transistor,100V BSC096N10LS5 1Maximumratings atTA=25°C,unlessotherwisespecified Table2Maximumratings Parameter Symbol Values Unit Note/TestCondition 72 51 14 A VGS=10V,TC=25°C1) VGS=10V,TC=100°C VGS=10V,TC=25°C, RTHJA=50°C/W2) - 287 A TA=25°C - - 45 mJ ID=20A,RGS=25Ω VGS -20 - 20 V - Power dissipation Ptot - - 83 3.0 W TC=25°C TA=25°C,RTHJA=50°C/W3) Operating and storage temperature Tj,Tstg -55 - 175 °C IEC climatic category; DIN IEC 68-1: 55/175/56 Unit Note/TestCondition Min. Typ. Max. ID - - ID,pulse - Avalanche energy, single pulse EAS Gate source voltage Continuous drain current Pulsed drain current3) 4) 2Thermalcharacteristics Table3Thermalcharacteristics Parameter Symbol Thermal resistance, junction - case Device on PCB, 6 cm² cooling area2) Values Min. Typ. Max. RthJC - 1.1 1.8 °C/W - RthJA - - 50 °C/W - 1) Rating refers to the product only with datasheet specified absolute maximum values, maintaining case temperature at 25°C. For higher Tcase please refer to Diagram 2. De-rating will be required based on the actual environmental conditions. 2) Device on 40 mm x 40 mm x 1.5 mm epoxy PCB FR4 with 6 cm2 (one layer, 70 µm thick) copper area for drain connection. PCB is vertical in still air. 3) See Diagram 3 for more detailed information 4) See Diagram 13 for more detailed information Final Data Sheet 3 Rev.2.1,2019-09-02 OptiMOSTM5Power-Transistor,100V BSC096N10LS5 3Electricalcharacteristics atTj=25°C,unlessotherwisespecified Table4Staticcharacteristics Parameter Symbol Drain-source breakdown voltage Values Unit Note/TestCondition - V VGS=0V,ID=1mA 1.7 2.3 V VDS=VGS,ID=36µA - 0.1 10 1 100 µA VDS=100V,VGS=0V,Tj=25°C VDS=100V,VGS=0V,Tj=125°C IGSS - 10 100 nA VGS=20V,VDS=0V Drain-source on-state resistance RDS(on) - 8.0 10.3 9.6 12.5 mΩ VGS=10V,ID=20A VGS=4.5V,ID=10A Gate resistance1) RG - 1.2 1.8 Ω - Transconductance gfs 22 44 - S |VDS|≥2|ID|RDS(on)max,ID=20A Unit Note/TestCondition Min. Typ. Max. V(BR)DSS 100 - Gate threshold voltage VGS(th) 1.1 Zero gate voltage drain current IDSS Gate-source leakage current Table5Dynamiccharacteristics Parameter Symbol Input capacitance1) Values Min. Typ. Max. Ciss - 1600 2100 pF VGS=0V,VDS=50V,f=1MHz Coss - 250 320 pF VGS=0V,VDS=50V,f=1MHz Reverse transfer capacitance Crss - 12 21 pF VGS=0V,VDS=50V,f=1MHz Turn-on delay time td(on) - 4.7 - ns VDD=50V,VGS=10V,ID=20A, RG,ext=3Ω Rise time tr - 3.5 - ns VDD=50V,VGS=10V,ID=20A, RG,ext=3Ω Turn-off delay time td(off) - 15 - ns VDD=50V,VGS=10V,ID=20A, RG,ext=3Ω Fall time tf - 5 - ns VDD=50V,VGS=10V,ID=20A, RG,ext=3Ω Unit Note/TestCondition Output capacitance1) 1) Table6Gatechargecharacteristics2) Parameter Symbol Gate to source charge Gate charge at threshold Values Min. Typ. Max. Qgs - 4.6 - nC VDD=50V,ID=20A,VGS=0to4.5V Qg(th) - 2.6 - nC VDD=50V,ID=20A,VGS=0to4.5V Gate to drain charge Qgd - 4.1 6.1 nC VDD=50V,ID=20A,VGS=0to4.5V Switching charge Qsw - 6.1 - nC VDD=50V,ID=20A,VGS=0to4.5V Gate charge total Qg - 12 14.6 nC VDD=50V,ID=20A,VGS=0to4.5V Gate plateau voltage Vplateau - 3.0 - V VDD=50V,ID=20A,VGS=0to4.5V Gate charge total, sync. FET Qg(sync) - 19 - nC VDS=0.1V,VGS=0to10V Qoss - 30 40 nC VDS=50V,VGS=0V 1) 1) 1) Output charge 1) 2) Defined by design. Not subject to production test. See ″Gate charge waveforms″ for parameter definition Final Data Sheet 4 Rev.2.1,2019-09-02 OptiMOSTM5Power-Transistor,100V BSC096N10LS5 Table7Reversediode Parameter Symbol Diode continuous forward current Diode pulse current Diode forward voltage 1) Reverse recovery time 1) Reverse recovery charge 1) Values Unit Note/TestCondition 76 A TC=25°C - 287 A TC=25°C - 0.85 1.1 V VGS=0V,IF=20A,Tj=25°C trr - 30 60 ns VR=50V,IF=20A,diF/dt=100A/µs Qrr - 26 52 nC VR=50V,IF=20A,diF/dt=100A/µs Min. Typ. Max. IS - - IS,pulse - VSD Defined by design. Not subject to production test. Final Data Sheet 5 Rev.2.1,2019-09-02 OptiMOSTM5Power-Transistor,100V BSC096N10LS5 4Electricalcharacteristicsdiagrams Diagram1:Powerdissipation Diagram2:Draincurrent 100 80 70 80 60 50 ID[A] Ptot[W] 60 40 40 30 20 20 10 0 0 25 50 75 100 125 150 175 0 200 0 25 50 75 TC[°C] 100 125 150 175 200 TC[°C] Ptot=f(TC) ID=f(TC);VGS≥10V Diagram3:Safeoperatingarea Diagram4:Max.transientthermalimpedance 3 101 10 single pulse 0.01 0.02 0.05 0.1 0.2 0.5 1 µs 102 10 µs 100 101 ZthJC[K/W] 100 µs ID[A] 1 ms 10 ms 0 10 DC 10-1 10-1 10-2 10-1 100 101 102 103 10-2 10-5 10-4 VDS[V] 10-2 10-1 100 tp[s] ID=f(VDS);TC=25°C;D=0;parameter:tp Final Data Sheet 10-3 ZthJC=f(tp);parameter:D=tp/T 6 Rev.2.1,2019-09-02 OptiMOSTM5Power-Transistor,100V BSC096N10LS5 Diagram5:Typ.outputcharacteristics 160 Diagram6:Typ.drain-sourceonresistance 25 10 V 5V 140 2.8 V 4.5 V 3V 20 3.5 V 120 4V 4V 80 60 RDS(on)[mΩ] ID[A] 100 15 4.5 V 10 5V 10 V 3.5 V 40 5 20 0 3V 2.8 V 0 1 2 3 4 0 5 0 10 20 30 VDS[V] 40 50 60 70 80 ID[A] ID=f(VDS),Tj=25°C;parameter:VGS RDS(on)=f(ID),Tj=25°C;parameter:VGS Diagram7:Typ.transfercharacteristics Diagram8:Typ.drain-sourceonresistance 160 25 140 20 120 25 °C ID[A] 100 175 °C 80 60 RDS(on)[mΩ] 175 °C 15 10 25 °C 40 5 20 0 0 1 2 3 4 5 VGS[V] 0 2 4 6 8 10 VGS[V] ID=f(VGS),|VDS|>2|ID|RDS(on)max;parameter:Tj Final Data Sheet 0 RDS(on)=f(VGS),ID=20A;parameter:Tj 7 Rev.2.1,2019-09-02 OptiMOSTM5Power-Transistor,100V BSC096N10LS5 Diagram10:Typ.gatethresholdvoltage 2.4 2.4 2.0 2.0 1.6 1.6 VGS(th)[V] RDS(on)(normalizedto25°C) Diagram9:Normalizeddrain-sourceonresistance 1.2 1.2 360 µA 0.8 0.8 36 µA 0.4 0.4 0.0 -80 -40 0 40 80 120 160 0.0 -80 200 -40 0 40 Tj[°C] 80 120 160 200 Tj[°C] RDS(on)=f(Tj),ID=20A,VGS=10V VGS(th=f(Tj),VGS=VDS;parameter:ID Diagram11:Typ.capacitances Diagram12:Forwardcharacteristicsofreversediode 4 103 10 25 °C 25 °C, max 175 °C 175 °C, max Ciss 103 Coss 102 IF[A] C[pF] 102 101 101 100 Crss 0 20 40 60 80 100 100 0.00 0.25 VDS[V] 0.75 1.00 1.25 1.50 VSD[V] C=f(VDS);VGS=0V;f=1MHz Final Data Sheet 0.50 IF=f(VSD);parameter:Tj 8 Rev.2.1,2019-09-02 OptiMOSTM5Power-Transistor,100V BSC096N10LS5 Diagram13:Avalanchecharacteristics Diagram14:Typ.gatecharge 2 10 10 20 V 50 V 80 V 8 101 25 °C IAV[A] VGS[V] 6 4 0 10 100 °C 2 150 °C 10-1 100 101 102 103 tAV[µs] 0 0 4 8 12 16 20 24 Qgate[nC] IAS=f(tAV);RGS=25Ω;parameter:Tj,start VGS=f(Qgate),ID=20Apulsed,Tj=25°C;parameter:VDD Diagram15:Drain-sourcebreakdownvoltage Diagram Gate charge waveforms 108 106 VBR(DSS)[V] 104 102 100 98 96 94 -80 -40 0 40 80 120 160 200 Tj[°C] VBR(DSS)=f(Tj);ID=1mA Final Data Sheet 9 Rev.2.1,2019-09-02 OptiMOSTM5Power-Transistor,100V BSC096N10LS5 5PackageOutlines   Figure1OutlinePG-TDSON-8,dimensionsinmm Final Data Sheet 10 Rev.2.1,2019-09-02 OptiMOSTM5Power-Transistor,100V BSC096N10LS5   Figure2OutlineFootprint(TDSON-8) Final Data Sheet 11 Rev.2.1,2019-09-02 OptiMOSTM5Power-Transistor,100V BSC096N10LS5 RevisionHistory BSC096N10LS5 Revision:2019-09-02,Rev.2.1 Previous Revision Revision Date Subjects (major changes since last revision) 2.0 2019-04-02 Release of final version 2.1 2019-09-02 Update "Continuous drain current" Trademarks Allreferencedproductorservicenamesandtrademarksarethepropertyoftheirrespectiveowners. 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TheInfineonTechnologiescomponentdescribedinthisDataSheetmaybeusedinlife-supportdevicesorsystemsand/or automotive,aviationandaerospaceapplicationsorsystemsonlywiththeexpresswrittenapprovalofInfineonTechnologies,ifa failureofsuchcomponentscanreasonablybeexpectedtocausethefailureofthatlife-support,automotive,aviationand aerospacedeviceorsystemortoaffectthesafetyoreffectivenessofthatdeviceorsystem.Lifesupportdevicesorsystemsare intendedtobeimplantedinthehumanbodyortosupportand/ormaintainandsustainand/orprotecthumanlife.Iftheyfail,itis reasonabletoassumethatthehealthoftheuserorotherpersonsmaybeendangered. Final Data Sheet 12 Rev.2.1,2019-09-02