BSZ037N06LS5
MOSFET
OptiMOSTMPower-Transistor,60V
TSDSON-8FL
(enlarged source interconnection)
Features
•OptimizedforhighperformanceSMPS,e.g.syncrec.
•100%avalanchetested
•Superiorthermalresistance
•N-channel
•Pb-freeleadplating;RoHScompliant
•Halogen-freeaccordingtoIEC61249-2-21
Productvalidation
FullyqualifiedaccordingtoJEDECforIndustrialApplications
Table1KeyPerformanceParameters
Parameter
Value
Unit
VDS
60
V
RDS(on),max
3.7
mΩ
ID
40
A
Qoss
32
nC
QG(0V..4.5V)
18
nC
S1
8D
S2
7D
S3
6D
G4
5D
Type/OrderingCode
Package
Marking
RelatedLinks
BSZ037N06LS5
PG-TSDSON-8 FL
037N06L
-
Final Data Sheet
1
Rev.2.0,2019-02-11
OptiMOSTMPower-Transistor,60V
BSZ037N06LS5
TableofContents
Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
Thermal characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
Electrical characteristics diagrams . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Package Outlines . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Revision History . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Trademarks . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Disclaimer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Final Data Sheet
2
Rev.2.0,2019-02-11
OptiMOSTMPower-Transistor,60V
BSZ037N06LS5
1Maximumratings
atTA=25°C,unlessotherwisespecified
Table2Maximumratings
Parameter
Symbol
Values
Unit
Note/TestCondition
40
40
40
34
18
A
VGS=10V,TC=25°C
VGS=10V,TC=100°C
VGS=4.5V,TC=25°C
VGS=4.5V,TC=100°C
VGS=10V,TA=25°C,
RTHJA=60°C/W1)
-
160
A
TC=25°C
-
-
117
mJ
ID=20A,RGS=25Ω
VGS
-20
-
20
V
-
Power dissipation
Ptot
-
-
69
2.1
W
TC=25°C
TA=25°C,RTHJA=60°C/W1)
Operating and storage temperature
Tj,Tstg
-55
-
150
°C
IEC climatic category; DIN IEC 68-1:
55/150/56
Unit
Note/TestCondition
Min.
Typ.
Max.
ID
-
-
ID,pulse
-
Avalanche energy, single pulse
EAS
Gate source voltage
Continuous drain current
Pulsed drain current2)
3)
2Thermalcharacteristics
Table3Thermalcharacteristics
Parameter
Symbol
Thermal resistance, junction - case,
bottom
Values
Min.
Typ.
Max.
RthJC
-
-
1.8
°C/W -
Thermal resistance, junction - case,
top
RthJC
-
-
20
°C/W -
Device on PCB,
6 cm² cooling area
RthJA
-
-
60
°C/W -
1)
Device on 40 mm x 40 mm x 1.5 mm epoxy PCB FR4 with 6 cm2 (one layer, 70 µm thick) copper area for drain
connection. PCB is vertical in still air.
2)
See Diagram 3 for more detailed information
3)
See Diagram 13 for more detailed information
Final Data Sheet
3
Rev.2.0,2019-02-11
OptiMOSTMPower-Transistor,60V
BSZ037N06LS5
3Electricalcharacteristics
atTj=25°C,unlessotherwisespecified
Table4Staticcharacteristics
Parameter
Symbol
Drain-source breakdown voltage
Values
Unit
Note/TestCondition
-
V
VGS=0V,ID=1mA
1.7
2.3
V
VDS=VGS,ID=36µA
-
0.1
10
1
100
µA
VDS=60V,VGS=0V,Tj=25°C
VDS=60V,VGS=0V,Tj=125°C
IGSS
-
10
100
nA
VGS=20V,VDS=0V
Drain-source on-state resistance
RDS(on)
-
3.1
4.2
3.7
5.3
mΩ
VGS=10V,ID=20A
VGS=4.5V,ID=10A
Gate resistance
RG
-
1.6
2.4
Ω
-
Transconductance
gfs
33
66
-
S
|VDS|≥2|ID|RDS(on)max,ID=20A
Unit
Note/TestCondition
Min.
Typ.
Max.
V(BR)DSS
60
-
Gate threshold voltage
VGS(th)
1.1
Zero gate voltage drain current
IDSS
Gate-source leakage current
Table5Dynamiccharacteristics
Parameter
Symbol
Input capacitance
Values
Min.
Typ.
Max.
Ciss
-
2400
3100
pF
VGS=0V,VDS=30V,f=1MHz
Coss
-
500
650
pF
VGS=0V,VDS=30V,f=1MHz
Reverse transfer capacitance
Crss
-
25
44
pF
VGS=0V,VDS=30V,f=1MHz
Turn-on delay time
td(on)
-
9
-
ns
VDD=30V,VGS=10V,ID=20A,
RG,ext=1.6Ω
Rise time
tr
-
5
-
ns
VDD=30V,VGS=10V,ID=20A,
RG,ext=1.6Ω
Turn-off delay time
td(off)
-
26
-
ns
VDD=30V,VGS=10V,ID=20A,
RG,ext=1.6Ω
Fall time
tf
-
5
-
ns
VDD=30V,VGS=10V,ID=20A,
RG,ext=1.6Ω
Unit
Note/TestCondition
Output capacitance1)
1)
Table6Gatechargecharacteristics2)
Parameter
Symbol
Gate to source charge
Gate charge at threshold
Values
Min.
Typ.
Max.
Qgs
-
6.6
-
nC
VDD=30V,ID=20A,VGS=0to4.5V
Qg(th)
-
4.2
-
nC
VDD=30V,ID=20A,VGS=0to4.5V
Gate to drain charge
Qgd
-
5.3
8
nC
VDD=30V,ID=20A,VGS=0to4.5V
Switching charge
Qsw
-
7.8
-
nC
VDD=30V,ID=20A,VGS=0to4.5V
Gate charge total
Qg
-
18
22
nC
VDD=30V,ID=20A,VGS=0to4.5V
Gate plateau voltage
Vplateau
-
2.7
-
V
VDD=30V,ID=20A,VGS=0to4.5V
Qg
-
35
47
nC
VDD=30V,ID=20A,VGS=0to10V
Qg(sync)
-
32
42
nC
VDS=0.1V,VGS=0to10V
Qoss
-
32
42
nC
VDD=30V,VGS=0V
1)
1)
Gate charge total1)
1)
Gate charge total, sync. FET
1)
Output charge
1)
2)
Defined by design. Not subject to production test.
See ″Gate charge waveforms″ for parameter definition
Final Data Sheet
4
Rev.2.0,2019-02-11
OptiMOSTMPower-Transistor,60V
BSZ037N06LS5
Table7Reversediode
Parameter
Symbol
Diode continuous forward current
Diode pulse current
Diode forward voltage
1)
Reverse recovery time
1)
Reverse recovery charge
1)
Values
Unit
Note/TestCondition
40
A
TC=25°C
-
160
A
TC=25°C
-
0.80
1
V
VGS=0V,IF=20A,Tj=25°C
trr
-
24
48
ns
VR=30V,IF=20A,diF/dt=100A/µs
Qrr
-
11
22
nC
VR=30V,IF=20A,diF/dt=100A/µs
Min.
Typ.
Max.
IS
-
-
IS,pulse
-
VSD
Defined by design. Not subject to production test.
Final Data Sheet
5
Rev.2.0,2019-02-11
OptiMOSTMPower-Transistor,60V
BSZ037N06LS5
4Electricalcharacteristicsdiagrams
Diagram1:Powerdissipation
Diagram2:Draincurrent
80
120
package limit
silicon limit
100
60
ID[A]
Ptot[W]
80
40
60
40
20
20
0
0
20
40
60
80
100
120
140
0
160
0
20
40
60
TC[°C]
80
100
120
Ptot=f(TC)
ID=f(TC);VGS≥10V
Diagram3:Safeoperatingarea
Diagram4:Max.transientthermalimpedance
3
160
101
10
102
140
TC[°C]
single pulse
0.01
0.02
0.05
0.1
0.2
0.5
1 µs
10 ms
10 µs
DC
100
100 µs
ZthJC[K/W]
101
ID[A]
1 ms
100
10-1
10-1
10-2
10-1
100
101
102
10-2
10-5
10-4
VDS[V]
10-2
10-1
100
tp[s]
ID=f(VDS);TC=25°C;D=0;parameter:tp
Final Data Sheet
10-3
ZthJC=f(tp);parameter:D=tp/T
6
Rev.2.0,2019-02-11
OptiMOSTMPower-Transistor,60V
BSZ037N06LS5
Diagram5:Typ.outputcharacteristics
160
10
4V
4.5 V
140
Diagram6:Typ.drain-sourceonresistance
3V
10 V 5 V
8
120
3.5 V
3.5 V
80
60
RDS(on)[mΩ]
ID[A]
100
6
4V
4.5 V
5V
4
10 V
40
3V
20
0
2
2.8 V
0
1
2
3
4
0
5
0
10
20
VDS[V]
30
40
ID[A]
ID=f(VDS),Tj=25°C;parameter:VGS
RDS(on)=f(ID),Tj=25°C;parameter:VGS
Diagram7:Typ.transfercharacteristics
Diagram8:Typ.drain-sourceonresistance
160
10
150 °C
140
8
120
RDS(on)[mΩ]
ID[A]
100
80
60
6
150 °C
4
25 °C
40
2
20
0
25 °C
0
1
2
3
4
5
VGS[V]
0
2
4
6
8
10
VGS[V]
ID=f(VGS),|VDS|>2|ID|RDS(on)max;parameter:Tj
Final Data Sheet
0
RDS(on)=f(VGS),ID=20A;parameter:Tj
7
Rev.2.0,2019-02-11
OptiMOSTMPower-Transistor,60V
BSZ037N06LS5
Diagram9:Normalizeddrain-sourceonresistance
Diagram10:Typ.gatethresholdvoltage
2.0
2.4
2.0
1.6
VGS(th)[V]
RDS(on)(normalizedto25°C)
1.5
1.0
360 µA
1.2
36 µA
0.8
0.5
0.4
0.0
-80
-40
0
40
80
120
0.0
-80
160
-40
0
Tj[°C]
40
80
120
160
Tj[°C]
RDS(on)=f(Tj),ID=20A,VGS=10V
VGS(th)=f(Tj),VGS=VDS;parameter:ID
Diagram11:Typ.capacitances
Diagram12:Forwardcharacteristicsofreversediode
4
103
10
25 °C
25 °C, max
150 °C
150 °C, max
Ciss
Coss
102
IF[A]
102
C[pF]
103
101
Crss
101
0
10
20
30
40
50
60
100
0.00
0.25
VDS[V]
0.75
1.00
1.25
1.50
VSD[V]
C=f(VDS);VGS=0V;f=1MHz
Final Data Sheet
0.50
IF=f(VSD);parameter:Tj
8
Rev.2.0,2019-02-11
OptiMOSTMPower-Transistor,60V
BSZ037N06LS5
Diagram13:Avalanchecharacteristics
Diagram14:Typ.gatecharge
2
10
10
12 V
30 V
48 V
8
101
25 °C
6
IAV[A]
VGS[V]
100 °C
4
0
10
125 °C
2
10-1
100
101
102
103
tAV[µs]
0
0
5
10
15
20
25
30
35
40
Qgate[nC]
IAS=f(tAV);RGS=25Ω;parameter:Tj,start
VGS=f(Qgate),ID=20Apulsed,Tj=25°C;parameter:VDD
Diagram15:Drain-sourcebreakdownvoltage
Diagram Gate charge waveforms
65
64
63
VBR(DSS)[V]
62
61
60
59
58
57
-80
-40
0
40
80
120
160
Tj[°C]
VBR(DSS)=f(Tj);ID=1mA
Final Data Sheet
9
Rev.2.0,2019-02-11
OptiMOSTMPower-Transistor,60V
BSZ037N06LS5
5PackageOutlines
Figure1OutlinePG-TSDSON-8FL,dimensionsinmm/inches
Final Data Sheet
10
Rev.2.0,2019-02-11
OptiMOSTMPower-Transistor,60V
BSZ037N06LS5
RevisionHistory
BSZ037N06LS5
Revision:2019-02-11,Rev.2.0
Previous Revision
Revision
Date
Subjects (major changes since last revision)
2.0
2019-02-11
Release of final version
Trademarks
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InfineonTechnologiesAG
81726München,Germany
©2018InfineonTechnologiesAG
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Final Data Sheet
11
Rev.2.0,2019-02-11