BTS3011TEATMA1

H I T F E T TM - B T S 3 0 1 1 T E Smart Low-Si de Power Switch 1 Overview Features • Single channel device • Digital Feedback • Current limitation trigger concept • 3.3 and 5 V compatible logic inputs • Electrostatic discharge protection (ESD) • Green Product (RoHS compliant) • AEC Qualified Applications • Suitable for resistive, inductive and capacitive loads • Replaces electromechanical relays, fuses and discrete circuits • Most suitable for inductive loads as well as loads with inrush currents Description The BTS3011TE is a 11 mΩ single channel Smart Low-Side Power Switch with in a PG-TO252-5 package providing embedded protective functions. The power transistor is built by an N-channel vertical power MOSFET. The device is monolithically integrated. The BTS3011TE is automotive qualified and is optimized for 12 V automotive and industrial applications. Type Package Marking BTS3011TE PG-TO252-5 S3011TE Table 1 Product Summary Operating voltage range VOUT 3 .. 28 V Maximum battery voltage VBAT(LD) 40 V Operating supply voltage range VDD 3.0 .. 5.5 V Maximum input voltage VIN 5.5 V Maximum On-State resistance at Tj = 150 °C, VDD = 5 V, VIN = 5 V RDS(ON)_150 22 mΩ Nominal load current IL(NOM) 10 A Minimum current limitation trigger level IL(LIM)_TRIGGER 70 A Datasheet www.infineon.com/hitfet 1 Rev. 1.0 2018-07-19 HITFETTM - BTS3011TE Smart Low-Side Power Switch Overview Table 1 Product Summary (cont’d) Minimum current limitation level IL(LIM) 35 A Maximum OFF state load current at TJ ≤ 85 °C IL(OFF)_85 3 µA Maximum stand-by supply current at TJ ≤ 85 °C IDD(OFF)_85 6 µA Diagnostic Functions • Short circuit to battery • Over temperature • Stable latching diagnostic signal Protection Functions • Over temperature shutdown with delayed auto restart • Active clamp over voltage protection of the OUTput • Current limitation with current limitation trigger • Enhanced short circuit protection Detailed Description The device is able to switch all kind of resistive, inductive and capacitive loads, limited by maximum clamping energy and maximum current capabilities. The BTS3011TE offers dedicated ESD protection on the IN, VDD and STATUS pin referring to the Ground pin, as well as an over voltage clamping of the Drain/OUT to Source/GND. The over voltage protection gets activated during inductive turn off conditions or other over voltage events (such as load dump). The power MOSFET is limiting the drain-source voltage, if it rises above the VOUT(CLAMP). The over temperature protection prevents the device from overheating due to overload and/or bad cooling conditions. The BTS3011TE has a delayed auto restart thermal shut-down function. The device will turn on again, If the input pin is still high after a delayed time tD(RESTART) considering the junction temperature has dropped below the thermal hysteresis. Datasheet 2 Rev. 1.0 2018-07-19 HITFETTM - BTS3011TE Smart Low-Side Power Switch Table of Contents 1 Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Table of Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 2 Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 3 3.1 3.2 3.3 Pin Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Pin Assignment BTS3011TE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Pin Definitions and Functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Voltage and Current Definition . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 4.1 4.2 4.3 4.3.1 4.3.2 General Product Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Absolute Maximum Ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Functional Range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Thermal Resistance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 PCB set up (from THB report) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Transient Thermal Impedance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 5 5.1 5.2 5.3 5.3.1 5.3.2 5.4 5.5 Power Stage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Output On-state Resistance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Resistive Load Output Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Inductive Load . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Output Clamping . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Maximum Load Inductance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Reverse Current Capability . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 13 14 14 14 15 16 16 6 6.1 6.2 6.3 6.4 Protection Functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Over Voltage Clamping on OUTput . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Thermal Protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Overcurrent Limitation / Short Circuit Behavior . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 17 17 18 19 7 7.1 7.2 Diagnostics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 Functional Description of the STATUS Pin . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 8 8.1 8.1.1 8.2 8.3 Supply and Input Stage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Supply Circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Undervoltage Shutdown . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Input Circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 21 21 22 23 9 9.1 9.2 9.3 9.4 Electrical Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Power Stage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Diagnostics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Supply and Input Stage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 24 26 27 28 10 10.1 10.2 10.3 Characterisation Results . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Power Stage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Dynamic characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Supply and Input Stage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 29 32 36 Datasheet 3 6 6 6 6 Rev. 1.0 2018-07-19 HITFETTM - BTS3011TE Smart Low-Side Power Switch 11 11.1 Application Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40 Design and Layout Recommendations/Considerations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40 12 Package Outlines BTS3011TE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41 13 Revision History . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42 Datasheet 4 Rev. 1.0 2018-07-19 HITFETTM - BTS3011TE Smart Low-Side Power Switch Block Diagram 2 Block Diagram VDD OUT Supply Unit Overtemperature Protection Gate Driving Unit IN STATUS Over Voltage Protection Status Feedback ESD Protection Short circuit detection / Current limitation GND BlockDiagram_5pin.emf Figure 1 Datasheet Block Diagram 5 Rev. 1.0 2018-07-19 HITFETTM - BTS3011TE Smart Low-Side Power Switch Pin Configuration 3 Pin Configuration 3.1 Pin Assignment BTS3011TE (top view ) OUT 6 ( Tab) 5 GND 4 STATUS 3 OUT 2 VDD 1 IN PinConfig_DPAK5.emf Figure 2 Pin Configuration DPAK5 3.2 Pin Definitions and Functions Table 2 Pin Symbol Function 1 IN Input pin 2 VDD 5 V supply pin 3,6 OUT Drain, Load connection for power DMOS 4 STATUS Open-drain status feedback (low active) 5 GND 3.3 Voltage and Current Definition Ground, Source of power DMOS Figure 3 shows all external terms used in this data sheet, with associated convention for positive values. Datasheet 6 Rev. 1.0 2018-07-19 HITFETTM - BTS3011TE Smart Low-Side Power Switch Pin Configuration V BAT V BAT V DD I DD RSTATUS ZL VDD I STATUS STATUS I L , ID OUT I IN IN GND VDD VSTATUS VOUT, VDS V IN GND Terms_5pin.emf Figure 3 Datasheet Naming Definition of electrical parameters 7 Rev. 1.0 2018-07-19 HITFETTM - BTS3011TE Smart Low-Side Power Switch General Product Characteristics 4 General Product Characteristics 4.1 Absolute Maximum Ratings Table 3 Absolute Maximum Ratings1) Tj = -40°C to +150°C; all voltages with respect to ground, positive current flowing into pin (unless otherwise specified) Parameter Symbol Values Min. Typ. Max. Unit Note or Test Condition Number – P_4.1.1 Voltages Supply voltage VDD -0.3 – 5.5 V Output voltage VOUT – – 40 V internally clamped P_4.1.2 V 1) P_4.1.3 Battery voltage for short circuit protection VBAT(SC) – Battery voltage for load dump protection (VBAT(LD) = VA + VS with VA=13.5 V) VBAT(LD) – VIN -0.3 – 5.5 V – P_4.1.8 VSTATUS -0.3 – 5.5 V – P_4.1.9 |IL| – – IL(LIM)_TRIGGER A – P_4.1.12 Unclamped single inductive EAS energy single pulse – – 390 mJ IL(0) = IL(NOM) VBAT = 13.5 V TJ(0) = 150°C P_4.1.13 Unclamped repetitive inductive energy pulse with 100k cycles EAR(100k) – – 290 mJ IL(0) = IL(NOM) VBAT = 13.5 V Tj(0) = 105°C P_4.1.15 Operating temperature Tj -40 – +150 °C – P_4.1.17 Storage temperature Tstg -55 – +150 °C – P_4.1.18 – 32 l = 0 or 5 m RSC = 30 mΩ + RCable RCable = l * 16 mΩ/m LSC = 5 µH + LCable LCable = l * 1 µH/m – 40 V 2) P_4.1.4 Ri = 2 Ω; RLoad = 2.2 Ω; td=400 ms; suppressed pulse Input Pin Input voltage Status Pin Status voltage Power Stage Load current Energies Temperatures ESD Susceptibility Datasheet 8 Rev. 1.0 2018-07-19 HITFETTM - BTS3011TE Smart Low-Side Power Switch General Product Characteristics Table 3 Absolute Maximum Ratings1) (cont’d) Tj = -40°C to +150°C; all voltages with respect to ground, positive current flowing into pin (unless otherwise specified) Parameter Symbol ESD susceptibility (all pins) VESD Values Min. Typ. Max. Unit Note or Test Condition -2 – kV HBM3) P_4.1.19 3) 2 Number ESD susceptibility OUT pin vs. GND VESD -4 – 4 kV HBM P_4.1.20 ESD susceptibility VESD -750 – 750 V CDM4) P_4.1.21 1) Not subject to production test, specified by design. 2) VBAT(LD) is setup without the DUT connected to the generator per ISO7637-1; Ri is the internal resistance of the load dump test pulse generator; td is the pulse duration time for load dump pulse (pulse 5) according ISO 7637-1, -2. 3) ESD susceptibility, HBM according to ANSI/ESDA/JEDEC JS-001 (1.5 kΩ, 100 pF) 4) ESD susceptibility, Charged Device Model “CDM” ESDA STM5.3.1 or ANSI/ESD S.5.3.1 Notes 1. Stresses above the ones listed here may cause permanent damage to the device. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. 2. Integrated protection functions are designed to prevent IC destruction under fault conditions described in the data sheet. Fault conditions are considered as “outside” normal operating range. Protection functions are not designed for continuous repetitive operation 4.2 Functional Range Table 4 Functional Range1) Parameter Symbol Values Min. Typ. Max. Supply Voltage Range for Nominal Operation VDD(NOM) 3.0 Supply current continuous ON operation IDD(ON) Standby supply current (ambient) IDD(OFF) Battery Voltage Range for Nominal Operation VBAT(NOR) 6 Extended Battery Voltage Range for Operation VBAT(EXT) 0 Unit Note or Test Condition Number P_4.2.1 5.0 5.5 V – – 1 mA – P_4.2.2 – 1.5 6 µA Tj ≤ 85°C P_4.2.4 13.5 18 V – P_4.2.5 – V parameter P_4.2.6 deviations possible 32 1) Not subject to production test, specified by design. Note: Datasheet Within the functional range the IC operates as described in the circuit description. The electrical characteristics are specified within the conditions given in the related electrical characteristics table. 9 Rev. 1.0 2018-07-19 HITFETTM - BTS3011TE Smart Low-Side Power Switch General Product Characteristics 4.3 Thermal Resistance Note: This thermal data was generated in accordance with JEDEC JESD51 standards. For more information, go to www.jedec.org. Table 5 Thermal Resistance Parameter Junction to Solder Point Symbol RthJSP Junction to Ambient (2s2p) RthJA(2s2p) Junction to Ambient (1s0p+600mm2 Cu) RthJA(1s0p) Values Min. Typ. Max. – 2 – – – 25 38 – – Unit Note or Test Condition Number K/W 1) 2) P_4.3.1 K/W 1) 3) P_4.3.2 K/W 1) 4) P_4.3.3 1) Not subject to production test, specified by design. 2) Specified RthJSP value is simulated at natural convection on a cold plate setup (all pins are fixed to ambient temperature). Tc = 85°C. Device is loaded with 1 W power. 3) Specified RthJA value is according to Jedec JESD51-2,-5,-7 at natural convection on FR4 2s2p board; The product (Chip and Package) was simulated on a 76.2 x 114.3 x 1.5 mm board with 2 inner copper layers (2 x 70 µm Cu, 2 x 35 µm Cu). Where applicable a thermal via array under the exposed pad contacted the first inner copper layer. Ta = 85°C. Device is loaded with 1 W power. 4) Specified RthJA value is according to Jedec JESD51-2,-5,-7 at natural convection on FR4 2s2p board; The product (Chip and Package) was simulated on a 76.2 x 114.3 x 1.5 mm board with additional heatspreading copper area of 600mm2 and 70 µm thickness. Ta = 85°C. Device is loaded with 1 W power Datasheet 10 Rev. 1.0 2018-07-19 HITFETTM - BTS3011TE Smart Low-Side Power Switch General Product Characteristics 4.3.1 PCB set up (from THB report) The following PCB set up was implemented to determine the transient thermal impedance. 1,5 mm 70µm modelled (traces) 35µm, 100% metalization* 70µm, 5% metalization* Figure 4 Cross section JEDEC 2s2p. 1,5 mm 70µm modelled (traces, cooling area) 70µm; 5% metalization* Figure 5 Cross section JEDEC 1s0p. JEDEC 1s0p / 600 mm² Figure 6 Datasheet JEDEC 1s0p / Footprint JEDEC 2s2p Detail: Solder area PCB layout. 11 Rev. 1.0 2018-07-19 HITFETTM - BTS3011TE Smart Low-Side Power Switch General Product Characteristics 4.3.2 Transient Thermal Impedance Figure 7 Typical transient thermal impedance ZthJA = f(tp), Ta = 85 °C Value is according to Jedec JESD51-2,-7 at natural convection on FR4 2s2p board; The product (Chip and Package) was simulated on a 76.2 x 114.3 x 1.5 mm3 board with 2 inner copper layers (2 x 70 um Cu, 2 x 35 um Cu). Where applicable a thermal via array under the exposed pad contacted the first inner copper layer. Device is dissipating 1 W power. Figure 8 Typical transient thermal impedance ZthJA = f(tp), Ta = 85°C Value is according to Jedec JESD51-3 at natural convection on FR4 1s0p board. Device is dissipating 1 W power. Datasheet 12 Rev. 1.0 2018-07-19 HITFETTM - BTS3011TE Smart Low-Side Power Switch Power Stage 5 Power Stage 5.1 Output On-state Resistance The on-state resistance depends on the supply voltage as well as on the junction temperature TJ. Figure 9 shows this dependencies in terms of temperature and voltage for the typical on-state resistance RDS(ON). The behavior in reverse polarity is described in chapter“Reverse Current Capability” on Page 16. Figure 9 Typical On-State Resistance, RDS(ON) = f(TJ); VDD = 5 V, 3 V; VIN = high A high signal at the input pin causes the power DMOS to switch ON with a dedicated slope. To achieve the specified RDS(ON) and switching speed, a 5 V supply is required. Datasheet 13 Rev. 1.0 2018-07-19 HITFETTM - BTS3011TE Smart Low-Side Power Switch Power Stage 5.2 Resistive Load Output Timing Figure 10 shows the typical timing when switching a resistive load. VIN V IN(H) V IN(L) t VOUT V BAT 90 % -(dV/dt) ON (dV/dt)OFF 50 % 10 % tDON tF tDOFF tON tR t tOFF Figure 10 Definition of Power Output Timing for Resistive Load 5.3 Inductive Load 5.3.1 Output Clamping Switching.emf When switching off inductive loads with low side switches, the drain-source voltage VOUT rises above battery potential, because the inductance intends to continue driving the current. To prevent unwanted high voltages the device has a voltage clamping mechanism to keep the voltage at VOUT(CLAMP). During this clamping operation mode the device heats up as it dissipates the energy from the inductance. Therefore the maximum allowed load inductance is limited. See Figure 11 and Figure 12 for more details. VBAT ZL IL OUT (DMOS Drain) VOUT GND ( DMOS Source) IGND Figure 11 Datasheet Output Clamp Circuitry 14 Rev. 1.0 2018-07-19 HITFETTM - BTS3011TE Smart Low-Side Power Switch Power Stage VIN t IOUT VOUT t VOUT( CLAMP) VBAT t Figure 12 Switching an Inductive Load Note: Repetitive switching of inductive load by VDD instead of using the input is a not recommended operation and may affect the device reliability and reduce the lifetime. 5.3.2 Maximum Load Inductance While demagnetization of inductive loads, energy has to be dissipated in the BTS3011TE. This energy can be calculated by the following equation: ⎡VBAT − VOUT ( CLAMP) ⎤ ⎛ ⎞ RL × I L ⎟ + IL ⎥ × L × ln ⎜1 − E = VOUT ( CLAMP) × ⎢ ⎜ V −V ⎟ RL ⎢⎣ ⎥⎦ RL BAT OUT ( CLAMP ) ⎠ ⎝ (5.1) Following equation simplifies under assumption of RL = 0 E= ⎞ ⎛ 1 VBAT 2 ⎟ LI L × ⎜1 − ⎟ ⎜ 2 V V − BAT OUT ( CLAMP) ⎠ ⎝ (5.2) Figure 13 shows the inductance / current combination the BTS3011TE can handle. For maximum single avalanche energy please also refer to EAS parameter in Page 8 Datasheet 15 Rev. 1.0 2018-07-19 HITFETTM - BTS3011TE Smart Low-Side Power Switch Power Stage Figure 13 Maximum load inductance for single pulse L = f(IL); TJ(0) = 150°C; VBAT = 13.5 V 5.4 Reverse Current Capability A reverse battery situation means the OUT pin is pulled below GND potential to -VBAT via the load ZL. In this situation the load is driven by a current through the intrinsic body diode of the BTS3011TE and all protection, such as current limitation, over temperature or over voltage clamping, are not active. OT is active in inverse current if DMOS is ON In certain application case (for example in a bridge or half-bridge configuration) the intrinsic reverse body diode is used for freewheeling of an inductive load. In this case the device is still supplied but an inverse current is flowing from GND to OUT(drain) and the OUT will be pulled below GND. In inverse or reverse operation via the reverse body diode, the device is dissipating a power loss which is defined by the driven current and the voltage drop on the body diode -VDS. The BTS3011TE is capable of switching ON during inverse current by setting the IN high. In this condition, the over temperature is active. 5.5 Characteristics Please see “Power Stage” on Page 24 for electrical characteristic table. Datasheet 16 Rev. 1.0 2018-07-19 HITFETTM - BTS3011TE Smart Low-Side Power Switch Protection Functions 6 Protection Functions The device provides embedded protection functions. Integrated protection functions are designed to prevent IC destruction under fault conditions described in the data sheet. Fault conditions are considered as “outside” normal operation. Protection functions are not to be used for continuous or repetitive operation. 6.1 Over Voltage Clamping on OUTput The BTS3011TE is equipped with a voltage clamp circuitry that keeps the drain-source voltage VDS at a certain level VOUT(CLAMP). The over voltage clamping is overruling the other protection functions. Power dissipation has to be limited to not exceed the maximum allowed junction temperature. This function is also used in terms of inductive clamping. Please see also “Output Clamping” on Page 14 for more details. 6.2 Thermal Protection The device is protected against over temperature due to overload and/or bad cooling conditions by an integrated temperature sensor. The thermal protection is available if the device is active. . The device incorporates an absolute (TJ(SD)) and a dynamic temperature limitation (ΔTJ(SW)). Triggering one of them will cause the output to switch off. The BTS3011TE has a delayed thermal-restart function. If the input (IN) is still high the device will turn on again after a delayed time tD(RESTART) considering the junction temperature has dropped below the thermal hysteresis. Absolute over temperature shutdown Auto restart no overload Dynamic thermal shutdown Auto restart IN VIN (H) 0 Tj(D MOS ) Tj(SD ) t ΔTj(SD )_HY ΔTj(SW ) Ta t VOUT VBA T t tD(RES TART) tD(RES TART) Thermal_faul t_rest art Figure 14 Thermal protective switch OFF scenario with thermal restart Note: For better understanding, the time scale is not linear. The real timing of this drawing is application dependant and cannot be described. Datasheet 17 Rev. 1.0 2018-07-19 HITFETTM - BTS3011TE Smart Low-Side Power Switch Protection Functions 6.3 Overcurrent Limitation / Short Circuit Behavior This device is providing a smart overcurrent limitation intended to provide protection against short circuit conditions while allowing also load inrush currents higher than the current limitation level. To achieve this, the device has a current limitation level IL(LIM) which is triggered by a higher trigger level IL(LIM)_TRIGGER. The condition short circuit is an overload condition on the device. If the load current IL reaches the current limitation trigger level IL(LIM)_TRIGGER the internal current limitation will be activated and the device limits the current to a lower value IL(LIM). The device then starts heating up. When the thermal shutdown temperature TJ(SD) is reached, the device turns off. The time from the beginning of current limitation until the over temperature switch off depends strongly on the cooling conditions. If input is still high, the device will turn on again after a delayed time tD(RESTART) considering the junction temperature has dropped below the thermal hysteresis. The current limitation trigger is a latched signal. It will be only reset by input (IN) pin low and resetting the latch fault signal (STATUS pin = high. See Chapter 7 Diagnostics) at the same time. This means if the input stays high all the time during short circuit, the current will be limited to IL(LIM) during the following pulses (while on thermal restart). It also means that the output current remains limited to the current limitation level IL(LIM) as long as the current limitation trigger is not reset. Figure 15 shows this behavior. Occurrence of short circuit Drain current triggering IL(LI M)_T RIGG ER -> current limit to IL(LI M) Absolute over temperature shutdown Auto restart; limited to current limitation level Reset current limit trigger by „ST ATUS=high“ and „IN=low“ and „DMOS off (IL=0A)“ Restart into short circuit Restart into normal load condition IN VIN (H) 0 t IL VBAT/Zsc IL(LIM )_T RI GGE R IL(LIM ) Tj(D MOS) Tj(SD ) t ΔTj(SD )_HY Ta t VST ATU S H tD(RES TART) Figure 15 Datasheet tD(RES TART) tRES ET t Short circuit protection via current limitation and thermal switch off, with latched fault signal on STATUS-pin 18 Rev. 1.0 2018-07-19 HITFETTM - BTS3011TE Smart Low-Side Power Switch Protection Functions Note: For better understanding, the time scale is not linear. The real timing of this drawing is application dependant and cannot be described. Behavior with overload current below current limitation trigger level The lower current limitation level IL(LIM) will be also triggered by a thermal shutdown. This could be the case in terms of overload with a current still below the current limitation trigger level (IL < IL(LIM)TRIGGER). Occurrence of overload (below current limitation trigger level) Absolute over temperature shutdown Auto restart; limited to current limitation level Reset current limit trigger by „ST ATUS=high“ and „IN=low“ and „DMOS off (IL=0A)“ Thermal restart into normal load condition IN VIN (H) 0 t IL IL(LIM )_T RI GGE R VBAT/Zsc IL(LIM ) Tj(D MOS) Tj(SD) ΔTj(SD)_HY Ta t VST ATU S H tD(RES TART) tD(RES TART) tRES ET t Figure 16 Example of overload behavior with thermal shutdown Note: For better understanding, the time scale is not linear. The real timing of this drawing is application dependant and cannot be described. 6.4 Characteristics Please see “Protection” on Page 26 for electrical characteristic table. Datasheet 19 Rev. 1.0 2018-07-19 HITFETTM - BTS3011TE Smart Low-Side Power Switch Diagnostics 7 Diagnostics The BTS3011TE provides a latching digital fault feedback signal on the STATUS pin triggered by an over temperature shutdown. 7.1 Functional Description of the STATUS Pin The BTS3011TE provides digital status information via the STATUS pin to give an alarm feedback to a connected microcontroller. Please see Figure 17 “Feedback and control of STATUS pin” on Page 20 Normal operation mode In normal operation (no fault is detected) the STATUS pin’s logic is set ”high”. It is pulled up via an external Resistor (RSTATUS). Internally it is connected to an open drain MOSFET through an internal resistor. Fault operation In case of a thermal shutdown (fault), an internal MOSFET connected to the STATUS pin, pulls its voltage down to GND, providing a “low” level signal to the microcontroller. Fault mode operation remains active independent from the input pin state or internal restarts until it is reset. Reset latch fault signal (external pull up) To reset the latch fault signal of the BTS3011TE, the STATUS pin has to be pulled up to 5 V (recommended VDD). Resetting the fault signal will not reset the current limitation trigger signal. To do so, the INPUT pin has to be set in logic “low” at the same time the STATUS pin is set “high”. In this case, the fault latch signal and the current limitation trigger will be reset (assuming the temperature has dropped below ΔTJ_HYS). Please refer to Figure 15 and Figure 16. V DD V BAT I DD RSTATUS ZL STATUS I/O VDD IL Micro controller OUT IN I/O VOUT GND IGND GND Figure 17 feedback.emf Feedback and control of STATUS pin For recommended values of external components please see “Application Information” on Page 40 7.2 Characteristics Please see “Diagnostics” on Page 27 for electrical characteristic table. Datasheet 20 Rev. 1.0 2018-07-19 HITFETTM - BTS3011TE Smart Low-Side Power Switch Supply and Input Stage 8 Supply and Input Stage 8.1 Supply Circuit The supply pin VDD is protected against ESD pulses as shown in Figure 18. The device supply is not internal regulated but directly taken from a external supply. Therefore a reverse polarity protected and buffered 5 V (or 3.3 V) voltage supply is required. To achieve the specified RDS(ON) and switching speed a 5 V supply is required. The device shall be supplied via the VDD pin before applying an input signal VIN to ensure the correct functionality of the device. 3.0V .. 5.5 V VDD ESD Logic & Driver protection GND Supply_Stage.emf Figure 18 Supply Circuit 8.1.1 Undervoltage Shutdown In order to ensure a stable and defined device behavior under all allowed conditions the supply voltage VDD is monitored. The output switches off, if the supply voltage VDD drops below the switch-off threshold VDD(TH). In this case also all latches will be reset. The device functions are only given for supply voltages above the supply voltage threshold VDD(SD)MAX. There is no failure feedback ensured for VDD < VDD(SD). Datasheet 21 Rev. 1.0 2018-07-19 HITFETTM - BTS3011TE Smart Low-Side Power Switch Supply and Input Stage 8.2 Input Circuit Figure 19 shows the input circuit of the BTS3011TE. Due to an internal pull-down it is ensured that the device switches off in case of open input pin. A Zener structure protects the input circuit against ESD pulses. As the BTS3011TE has a supply pin, the RDS(ON) of the power MOS is independent of the voltage on the IN pin (assumed VDD is sufficient). RIN Logic IN ON/OFF I IN ESD V uC V IN RIN(GND) GND Input.emf Figure 19 Datasheet Simplified INput circuitry 22 Rev. 1.0 2018-07-19 HITFETTM - BTS3011TE Smart Low-Side Power Switch Supply and Input Stage 8.3 Characteristics Please see “Supply and Input Stage” on Page 28 for electrical characteristic table. Datasheet 23 Rev. 1.0 2018-07-19 HITFETTM - BTS3011TE Smart Low-Side Power Switch Electrical Characteristics 9 Electrical Characteristics Note: Characteristics show the deviation of parameter at given input voltage and junction temperature. Typical values show the typical parameters expected from manufacturing and in typical application condition. All voltages and currents naming and polarity in accordance to Figure 3 “Naming Definition of electrical parameters” on Page 7 9.1 Power Stage Please see Chapter “Power Stage” on Page 13 for parameter description and further details. Table 6 Electrical Characteristics: Power Stage Tj = -40°C to +150°C, VDD = 3.0 V to 5.5 V, VBAT = 6 V to 18 V, all voltages with respect to ground, positive current flowing into pin (unless otherwise specified) Parameter Symbol Values Unit Note or Test Condition Min. Typ. Max. Number Power Stage - Static Characteristics On-State resistance at 25°C RDS(ON)_25 – 10.7 – mΩ IL = IL(NOM); VDD = 5 V; TJ = 25°C P_9.1.1 On-State resistance at 150°C RDS(ON)_150 – 19 22 mΩ IL = IL(NOM); VDD = 5 V; Tj = 150°C P_9.1.2 Nominal load current IL(NOM) – 10 – A OFF state load current, Output leakage current IL(OFF)_85 – OFF state load current, Output leakage current at 150°C IL(OFF)_150 – 6 14 µA VOUT = VBAT; VIN = 0 V; VDD = 5 V; TJ = 150°C P_9.1.9 -VDS – 0.8 1.5 V IL = - IL(NOM); VIN = 0 V P_9.1.11 1) P_9.1.7 TJ < 150°C; VDD = 5 V; – 3 µA 2) P_9.1.8 VOUT = VBAT; VIN = 0 V; VDD = 5 V; TJ ≤ 85°C Reverse Diode Reverse diode forward voltage Power Stage - Dynamic characteristics - switching time VBAT = 13.5 V;VDD = 5 V; resistive load: RL = 2.2 Ω see Figure 10 “Definition of Power Output Timing for Resistive Load” on Page 14 for definition details Turn-on time tON 35 75 115 µs - P_9.1.12 Turn-off time tOFF 70 135 210 µs - P_9.1.13 Turn-on delay time tDON 5 15 25 µs - P_9.1.14 Datasheet 24 Rev. 1.0 2018-07-19 HITFETTM - BTS3011TE Smart Low-Side Power Switch Electrical Characteristics Table 6 Electrical Characteristics: Power Stage (cont’d) Tj = -40°C to +150°C, VDD = 3.0 V to 5.5 V, VBAT = 6 V to 18 V, all voltages with respect to ground, positive current flowing into pin (unless otherwise specified) Parameter Symbol Unit Note or Test Condition Min. Typ. Max. Number Turn-off delay time tDOFF 40 75 120 µs - P_9.1.15 Turn-on output fall time tF 30 60 90 µs - P_9.1.16 Turn-off output rise time tR 30 60 90 µs - P_9.1.17 (DV/Dt)ON 0.22 0.4 0.65 V/µs - P_9.1.18 (DV/Dt)OFF 0.22 0.4 0.65 V/µs - P_9.1.19 Turn-on Slew rate 3) Turn-off Slew rate 4) 1) 2) 3) 4) Values Not subject to production test, calculated by RthJA and RDS(ON) Not subject to production test, specified by design Not subject to production test, calculated slew rate between 90% and 50%; dV/dt = (VOUT(90%) - VOUT(50%)) / |(t90% - t50%)| Not subject to production test, calculated slew rate between 50% and 90%; dV/dt = (VOUT(50%) - VOUT(90%)) / |(t50% - t90%)| Datasheet 25 Rev. 1.0 2018-07-19 HITFETTM - BTS3011TE Smart Low-Side Power Switch Electrical Characteristics 9.2 Protection Please see Chapter “Protection Functions” on Page 17 for parameter description and further details. Note: Integrated protection functions are designed to prevent IC destruction under fault conditions described in the data sheet. Fault conditions are considered as “outside” normal operating range. Protection functions are not designed for continuous repetitive operation Table 7 Electrical characteristics: Protection Tj = -40°C to +150°C, VDD = 3.0 V to 5.5 V; VBAT = 6 V to 18 V, all voltages with respect to ground, positive current flowing into pin (unless otherwise specified) Parameter Symbol Values Unit Note or Test Condition Min. Typ. Max. Number Thermal shut down junction temperature TJ(SD) 150 170 200 °C 1) P_9.2.1 Thermal hysteresis ΔTJ_HYS – 20 – K 1) P_9.2.4 K 1) P_9.2.5 ms 1) 2) P_9.2.8 Thermal shut down 1) Dynamic temperature limitation ΔTJ(SW) Auto-restart delay time tD(RESTART) – 70 10 30 – 40 VDD = 5.0 V Over Voltage Protection / Clamping VOUT(CLAMP) 40 – – V VIN = 0 V; ID = 50 mA; P_9.2.9 Current limitation trigger level IL(LIM)_TRIGGER 70 – 140 A VIN = 5 V; VDD = 5 V; VDS = VBAT P_9.2.10 Current limitation level IL(LIM) 35 – 70 A VIN = 5 V; VDD = 5 V; VDS = VBAT P_9.2.11 Drain clamp voltage Current limitation 1) Not subject to production test, specified by design. 2) Auto restart delay time after temperature protection shutdown. Thermal hysteresis must be also considered. Datasheet 26 Rev. 1.0 2018-07-19 HITFETTM - BTS3011TE Smart Low-Side Power Switch Electrical Characteristics 9.3 Diagnostics Please see Chapter “Diagnostics” on Page 20 for description and further details. Table 8 Electrical Characteristics: Diagnostics Tj = -40°C to +150°C, VDD = 3.0 V to 5.5 V, VBAT = 6 V to 18 V, all voltages with respect to ground, positive current flowing into pin (unless otherwise specified) Parameter Symbol Values Unit Note or Test Condition Number Min. Typ. Max. Feedback pin Status pin voltage drop VSTATUS(ON) – 0.5 0.8 V ISTATUS = 0.5 mA; 3 V ≤ VIN ≤ 5.5 V latched fault; P_9.3.1 Status pin leakage current ISTATUS(OFF)_85 – 1.5 6 µA 1) P_9.3.2 VSTATUS ≤ 5.5 V; TJ ≤ 85°C; 0 V ≤ VIN ≤ 5.5 V Status pin leakage current at 150°C ISTATUS(OFF)_150 – 6 12 µA VSTATUS ≤ 5.5 V; TJ ≤ 150°C; 0 V ≤ VIN ≤ 5.5 V P_9.3.3 Status pin reset threshold VSTATUS(RESET) 0.9 1.8 2.7 V – P_9.3.4 Status pin reset current ISTATUS(RESET) 3 – 7 mA – P_9.3.5 Fault feedback reset time tSTATUS(RESET) 100 – – µs VSTATUS > VSTATUS(RESET); no over temperature P_9.3.6 1) Not subject to production test, specified by design. Datasheet 27 Rev. 1.0 2018-07-19 HITFETTM - BTS3011TE Smart Low-Side Power Switch Electrical Characteristics 9.4 Supply and Input Stage Please see Chapter “Supply and Input Stage” on Page 21 for description and further details. Table 9 Electrical Characteristics: Supply and Input Tj = -40°C to +150°C, VDD = 3.0 V to 5.5 V, VBAT = 6 V to 18 V, all voltages with respect to ground, positive current flowing into pin (unless otherwise specified) Parameter Symbol Values Unit Note or Test Condition Min. Typ. Max. Number Nominal supply voltage VDD(NOM) 3.0 5.0 5.5 V – P_9.4.1 Supply Undervoltage Shutdown Switch-on/off threshold voltage VDD(TH) 1.3 2.2 3.0 V VIN = 5.0 V P_9.4.2 Supply current, continuos ON operation IDD(ON) – – 1 mA device on-state VDD = 5.0 V IL(0) = IL(NOM) P_9.4.3 Supply current, inverse condition on OUT to GND IDD(-VOUT) – – 1 mA 1) P_9.4.5 Standby supply current IDD(OFF)_85 – Standby supply current at 150°C IDD(OFF)_150 – 6 14 µA VIN = 0 V VDD = 5.0 V TJ < 150°C no fault signal P_9.4.7 Standby supply current, inverse condition on OUT to GND IDD(OFF)(-VOUT) – – 200 µA IL=-IL(NOM) VIN = 0 V P_9.4.8 Low level input voltage VIN(L) -0.3 – 0.8 V – P_9.4.9 High level input voltage VIN(H) 2.0 5.5 V – P_9.4.10 P_9.4.11 Supply VOUT < -0.3 V VIN = 5.0 V 1.5 6 µA 1) P_9.4.6 VIN = 0 V VDD = 5.0 V TJ < 85°C no fault signal Input – Input voltage hysteresis VIN(HYS) – 200 – mV 1) Input pull down current IIN – – 160 µA 2.7 V < VIN < 5.5 V -0.3 V < VDD < 5.5V P_9.4.12 Internal Input pull down resistor RIN(GND) 25 50 100 kΩ – P_9.4.13 1) Not subject to production test, specified by design. Datasheet 28 Rev. 1.0 2018-07-19 HITFETTM - BTS3011TE Smart Low-Side Power Switch Characterisation Results 10 Characterisation Results Typical performance characteristics 10.1 Power Stage Figure 20 Typical RDS(ON) vs. VDD (3..5.5 V) @ Tj=-40, 25, 85, 150°C; IL(NOM) Figure 21 Typical RDS(ON) vs. VDD (3..5.5 V) @ Tj=-40, 25, 85, 150°C; IL=2*IL(NOM) Datasheet 29 Rev. 1.0 2018-07-19 HITFETTM - BTS3011TE Smart Low-Side Power Switch Characterisation Results Figure 22 Typical RDS(ON) vs. Tj (-40..150°C) @ VDD=5 V, 3 V; IL(NOM) Figure 23 Typical IL(OFF) vs. Tj (-40..150°C) @ VBAT=6 V, 13.5 V, 18 V, VBAT(SC)V, 40 V; VIN=0V; Datasheet 30 Rev. 1.0 2018-07-19 HITFETTM - BTS3011TE Smart Low-Side Power Switch Characterisation Results Figure 24 EAS [J] vs. IL (0.5*IL(NOM), IL(NOM), 2*IL(NOM)) @ TJ(0) = 25°C and 150°C Figure 25 EAR [J] vs. No. cycles; @ IL(NOM), 2*IL(NOM); TJ(0) = 25, 105°C; Datasheet 31 Rev. 1.0 2018-07-19 HITFETTM - BTS3011TE Smart Low-Side Power Switch Characterisation Results 10.2 Dynamic characteristics Figure 26 Typical delay on time, delay off time vs. T (-40..150°C) @J VDD=5 V; VBAT=13.5 V Figure 27 Typical fall time, rise time vs. TJ (-40..150°C) @ VDD=5 V; VBAT=13.5 V Datasheet 32 Rev. 1.0 2018-07-19 HITFETTM - BTS3011TE Smart Low-Side Power Switch Characterisation Results Figure 28 Typical slew rate (ON&OFF) vs. TJ (-40..150°C) @ VDD=5 V; VBAT=13.5 V Figure 29 Typical delay on time, delay off time vs. RL @ TJ(-40..150°C); VDD=5 V; VBAT=13.5 V Datasheet 33 Rev. 1.0 2018-07-19 HITFETTM - BTS3011TE Smart Low-Side Power Switch Characterisation Results Figure 30 Typical fall time, rise time vs. IL (0.5A..IL(LIM)_MIN) @ TJ (-40, 25, 150°C); VJ=5 V; VBAT=13.5 V Figure 31 Typical slew rate (ON&OFF) vs. RL @ TJ(-40, 25, 150°C); VDD=5 V; VBAT=13.5 V Datasheet 34 Rev. 1.0 2018-07-19 HITFETTM - BTS3011TE Smart Low-Side Power Switch Characterisation Results Figure 32 Typical delay on time, delay off time vs. VBAT (0..40V) @ TJ (-40, 25, 150°C); VDD=5 V; IL=IL(NOM) Figure 33 Typical fall time, rise time vs. VBAT (0..40V) @ TJ (-40, 25, 150°C); VDD=5 V; IL=IL(NOM) Datasheet 35 Rev. 1.0 2018-07-19 HITFETTM - BTS3011TE Smart Low-Side Power Switch Characterisation Results Figure 34 Typical slew rate (ON&OFF) vs. VBAT (0..40V) @ TJ (-40, 25, 150°C); VDD=5 V; IL=IL(NOM) 10.3 Supply and Input Stage Figure 35 VDD(UV_on, VDD(UV_off) vs. TJ Datasheet 36 Rev. 1.0 2018-07-19 HITFETTM - BTS3011TE Smart Low-Side Power Switch Characterisation Results Figure 36 IDD(on) vs. VDD @ Tj = -40, 25, 150°C Figure 37 IDD(off) vs. Tj @ VDD = 3, 4, 5 V Datasheet 37 Rev. 1.0 2018-07-19 HITFETTM - BTS3011TE Smart Low-Side Power Switch Characterisation Results Figure 38 IIN vs. Vin @ Tj = -40, 25, 150°C Figure 39 RIN(GND) vs. Tj Datasheet 38 Rev. 1.0 2018-07-19 HITFETTM - BTS3011TE Smart Low-Side Power Switch Characterisation Results Figure 40 VIN(L) vs. Tj @ VDD = 3, 4, 5 V Figure 41 VIN(H) vs. Tj @ VDD = 3, 4, 5 V Datasheet 39 Rev. 1.0 2018-07-19 HITFETTM - BTS3011TE Smart Low-Side Power Switch Application Information 11 Application Information Note: The following information is given as a hint for the implementation of the device only and shall not be regarded as a description or warranty of a certain functionality, condition or quality of the device. Application Diagram An application example with the BTS3011TE is shown below. VBAT Voltage Regulator IN Load OUT C VD D optional: e.g. 100nF Micro controller RSTATUS VDD VDD OUT STATUS I/O Status/ Reset IN I/O PWM GND GND Figure 42 Simplified application diagram Note: This is a very simplified example of an application circuit. The function must be verified in the real application. Table 10 Recommended external components Reference Value Description RSTATUS 10 kΩ Pull-up resistor for STATUS pin CVDD 100 nF Supply pin capacitor for fast supply current transients 11.1 Design and Layout Recommendations/Considerations As consequence of the fast switching times for high currents, special care has to be taken with the PCB layout. Stray inductances have to be minimized. Datasheet 40 Rev. 1.0 2018-07-19 HITFETTM - BTS3011TE Smart Low-Side Power Switch Package Outlines BTS3011TE 12 Package Outlines BTS3011TE Figure 43 PG-TO252-5 Transistor Outline Package Green Product (RoHS compliant) To meet the world-wide customer requirements for environmentally friendly products and to be compliant with government regulations the device is available as a green product. Green products are RoHS-Compliant (i.e Pb-free finish on leads and suitable for Pb-free soldering according to IPC/JEDEC J-STD-020). For further information on alternative packages, please visit our website: http://www.infineon.com/packages. Datasheet 41 Dimensions in mm Rev. 1.0 2018-07-19 HITFETTM - BTS3011TE Smart Low-Side Power Switch Revision History 13 Revision History Revision Date Changes Rev. 1.0 Datasheet released Datasheet 2018-07-19 42 Rev. 1.0 2018-07-19 Trademarks All referenced product or service names and trademarks are the property of their respective owners. Edition 2018-07-19 Published by Infineon Technologies AG 81726 Munich, Germany © 2018 Infineon Technologies AG. All Rights Reserved. Do you have a question about any aspect of this document? Email: erratum@infineon.com Document reference IMPORTANT NOTICE The information given in this document shall in no event be regarded as a guarantee of conditions or characteristics ("Beschaffenheitsgarantie"). With respect to any examples, hints or any typical values stated herein and/or any information regarding the application of the product, Infineon Technologies hereby disclaims any and all warranties and liabilities of any kind, including without limitation warranties of non-infringement of intellectual property rights of any third party. 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