BTS3080EJXUMA1

HITFET - BTS3080EJ Smart Low-Si de Power Switch 1 Overview Basic Features • Single channel device • Very low output leakage current in OFF state • Electrostatic discharge protection (ESD) • Embedded protection functions (see below) • ELV compliant package • Green Product (RoHS compliant) • AEC Qualified Applications • Suitable for resistive, inductive and capacitive loads • Replaces electromechanical relays, fuses and discrete circuits Description The BTS3080EJ is a 80 mΩ single channel Smart Low-Side Power Switch with in a PG-TDSO8-31 package providing embedded protective functions. The power transistor is built by an N-channel vertical power MOSFET. The device is monolithically integrated. The BTS3080EJ is automotive qualified and is optimized for 12 V automotive applications. Type Package Marking BTS3080EJ PG-TDSO8-31 S3080EJ Table 1 Product Summary Operating voltage range VOUT 0 .. 31 V Maximum load voltage VBAT(LD) 40 V Maximum input voltage VIN 5.5 V Maximum On-State resistance at TJ = 150°C,VIN = 5 V RDS(ON) 160 mΩ Nominal load current IL(NOM) 3A Minimum current limitation IL(LIM) 10 A Maximum OFF state load current at TJ ≤ 85°C IL(OFF) 2 µA Datasheet www.infineon.com/hitfet 1 Rev. 1.0 2016-09-12 HITFET - BTS3080EJ Smart Low-Side Power Switch Overview Diagnostic Functions • open-drain status output Protection Functions • Over temperature shut-down with automatic-restart • Active clamp over voltage protection • Current limitation Detailed Description The device is able to switch all kind of resistive, inductive and capacitive loads, limited by maximum clamping energy and maximum current capabilities. The BTS3080EJ offers ESD protection on the IN pin which refers to the Source pin (Ground). The over temperature protection prevents the device from overheating due to overload and/or bad cooling conditions. The temperature information is given by a temperature sensor in the power MOSFET. The BTS3080EJ has an auto-restart thermal shut-down function. The device will turn on again, if input is still high, after the measured temperature has dropped below the thermal hysteresis. The over voltage protection can be activated during load dump or inductive turn off conditions. The power MOSFET is limiting the drain-source voltage, if it rises above the VOUT(CLAMP). Datasheet 2 Rev. 1.0 2016-09-12 HITFET - BTS3080EJ Smart Low-Side Power Switch Table of Contents 1 Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Table of Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 2 Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 3 3.1 3.2 3.3 Pin Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Pin Assignment BTS3080EJ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Pin Definitions and Functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Voltage and current definition . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 4.1 4.2 4.3 4.3.1 4.3.2 General Product Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Absolute Maximum Ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Functional Range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Thermal Resistance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 PCB set up . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Transient Thermal Impedance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 5 5.1 5.2 5.3 5.3.1 5.3.1.1 5.4 5.5 5.6 Power Stage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Output On-state Resistance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Resistive Load Output Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Inductive Load . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Output Clamping . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Maximum Load Inductance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Reverse Current capability . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Inverse Current capability . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 14 14 15 15 16 16 17 17 6 6.1 6.2 6.3 6.4 Protection Functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Over Voltage Clamping on OUTput . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Thermal Protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Short Circuit Protection / Current limitation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 18 18 18 19 7 7.1 7.2 Input Stage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 Input Circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 8 Diagnostics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 9 9.1 9.2 9.3 9.4 Electrical Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Power Stage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Input Stage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Diagnostics (STATUS Pin) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 22 24 25 25 10 10.1 10.2 10.3 10.4 Characterization Results . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Power Stage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Input Stage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Diagnosis . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 26 37 38 40 11 Application Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42 Datasheet 3 6 6 6 7 Rev. 1.0 2016-09-12 HITFET - BTS3080EJ Smart Low-Side Power Switch 11.1 Application Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42 12 Package Outlines . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43 13 Revision History . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44 Datasheet 4 Rev. 1.0 2016-09-12 HITFET - BTS3080EJ Smart Low-Side Power Switch Block Diagram 2 Block Diagram OUT Over Voltage Protection Gate Driving Unit IN STATUS Overtemperature Protection Status Feedback Short circuit detection / Current limitation ESD Protection GND Figure 1 Datasheet Block Diagram 5 Rev. 1.0 2016-09-12 HITFET - BTS3080EJ Smart Low-Side Power Switch Pin Configuration 3 Pin Configuration 3.1 Pin Assignment BTS3080EJ Figure 2 3.2 1 1 8 8 2 2 7 7 3 3 6 6 4 4 5 5 Pin Configuration Pin Definitions and Functions Pin Symbol Function 1 IN Input pin 2 NC not connected 3 STATUS Open-drain status feedback (low active) 4 NC not connected 5 NC not connected 6, 7, 8 GND Ground, Source of power DMOS1) cooling tab OUT Drain, Load connection for power DMOS 1) All GND pins must be connected together. Datasheet 6 Rev. 1.0 2016-09-12 HITFET - BTS3080EJ Smart Low-Side Power Switch Pin Configuration 3.3 Voltage and current definition Figure 3 shows all external terms used in this datasheet, with associated convention for positive values. VBAT V BAT VDD I DD ZL R STATUS I IN IN I L, I D I STATUS VDD VSTATUS OUT STATUS GND V IN GND Figure 3 Datasheet Naming definition of electrical parameters 7 VOUT, VDS T 4 i f Rev. 1.0 2016-09-12 HITFET - BTS3080EJ Smart Low-Side Power Switch General Product Characteristics 4 General Product Characteristics 4.1 Absolute Maximum Ratings Table 2 Absolute Maximum Ratings 1) Tj = -40°C to +150°C; all voltages with respect to ground, positive current flowing into pin (unless otherwise specified) Parameter Symbol Values Unit Note or Test Condition Number Min. Typ. Max. Voltages Output voltage VOUT – – 40 V internally clamped P_4.1.1 Battery voltage for short circuit protection VBAT(SC) – – 31 V l = 0 or 5 m RSC = 20 mΩ + RCable RCable = l * 16 mΩ/m LSC = 5 µH + LCable LCable = l * 1 µH/m VIN = 5 V P_4.1.2 Battery voltage for load dump protection VBAT(LD) – – 40 V 2) P_4.1.4 VIN -0.3 RI = 2 Ω RL = 4.5 Ω tD = 400 ms suppressed pulse Input Pin Input Voltage Input current in inverse condition on OUT to GND) – 5.5 V – P_4.1.7 mA 3) P_4.1.10 IIN – Status Voltage VSTATUS -0.3 – 5.5 V – P_4.1.11 Status current ISTATUS – – 5 mA -0.3 V < VSTATUS < 5.5 V P_4.1.12 -1 – – mA VSTATUS < -0.3 V P_4.1.13 | IL | – – IL(LIM) A – P_4.1.14 Unclamped single inductive energy single pulse EAS – – 35 mJ IL(0) = IL(NOM) VBAT = 13.5 V TJ(0) = 150°C P_4.1.20 Unclamped repetitive inductive energy pulse with 10k EAR(10k) – – 38 mJ IL(0) = IL(NOM) VBAT = 13.5 V TJ(0) = 105°C P_4.1.32 – 2 VOUT < -0.3 V Status Pin Status current in inverse ISTATUS_L current condition on STATUS Power Stage Load current Energies Datasheet 8 Rev. 1.0 2016-09-12 HITFET - BTS3080EJ Smart Low-Side Power Switch General Product Characteristics Table 2 Absolute Maximum Ratings 1) (cont’d) Tj = -40°C to +150°C; all voltages with respect to ground, positive current flowing into pin (unless otherwise specified) Parameter Symbol Values Unit Note or Test Condition Number Min. Typ. Max. Unclamped repetitive inductive energy pulse with 100k cycles EAR(100k) – – 30 mJ IL(0) = IL(NOM) VBAT = 13.5 V TJ(0) = 105 °C P_4.1.38 Unclamped repetitive inductive energy pulse with 1M EAR(1M) – – 24 mJ IL(0) = IL(NOM) VBAT = 13.5 V TJ(0) = 105 °C P_4.1.44 Operating temperature TJ -40 – +150 °C – P_4.1.52 Storage temperature TSTG -55 – +150 °C – P_4.1.53 VESD -3 – 3 kV HBM4) P_4.1.54 ESD susceptibility OUT-pin to VESD GND -10 – 10 kV HBM5) P_4.1.55 ESD susceptibility -1 – 1 kV CDM6) P_4.1.56 kV 7) P_4.1.57 Temperatures ESD Susceptibility ESD susceptibility (all pins) ESD susceptibility noncorner pins VESD VESD -1 – 1 CDM 1) Not subject to production test, specified by design. 2) VBAT(LD) is setup without the DUT connected to the generator per ISO 7637-1; RI is the internal resistance of the load dump test pulse generator; tD is the pulse duration time for load dump pulse (pulse 5) according ISO 7637-1, -2. 3) Maximum allowed value. Consider also inverse input current in inverse condition IIN(-VOUT) in Chapter 9 4) ESD susceptibility, HBM according to ANSI/ESDA/JEDEC JS001 (1.5 kΩ, 100 pF) 5) ESD susceptibility, HBM according to ANSI/ESDA/JEDEC JS001 (1.5 kΩ, 100 pF) 6) ESD susceptibility, Charged Device Model “CDM” ESDA STM5.3.1 or ANSI/ESD S.5.3.1 7) ESD susceptibility, Charged Device Model “CDM” ESDA STM5.3.1 or ANSI/ESD S.5.3.1 Notes 1. Stresses above the ones listed here may cause permanent damage to the device. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. 2. Integrated protection functions are designed to prevent IC destruction under fault conditions described in the data sheet. Fault conditions are considered as “outside” normal operating range. Protection functions are not designed for continuous repetitive operation. Datasheet 9 Rev. 1.0 2016-09-12 HITFET - BTS3080EJ Smart Low-Side Power Switch General Product Characteristics 4.2 Table 3 Functional Range Functional Range 1) Please refer to “Electrical Characteristics” on Page 22 for test conditions Parameter Symbol Values Unit Note or Test Condition Number Min. Typ. Max. 6.0 13.5 18.0 V – P_4.2.1 Extended Battery Voltage Range VBAT(EXT) for Operation 0 – 31 V parameter deviations possible P_4.2.2 Input Voltage Range for Nominal VIN(NOR) Operation 3.0 – 5.5 V – P_4.2.3 Junction Temperature -40 – 150 °C – P_4.2.5 Battery Voltage Range for Nominal Operation VBAT(NOR) TJ 1) Not subject to production test, specified by design Note: Datasheet Within the functional range the IC operates as described in the circuit description. The electrical characteristics are specified within the conditions given in the related electrical characteristics table. 10 Rev. 1.0 2016-09-12 HITFET - BTS3080EJ Smart Low-Side Power Switch General Product Characteristics 4.3 Thermal Resistance Note: This thermal data was generated in accordance with JEDEC JESD51 standards. For more information, go to www.jedec.org. Table 4 Thermal Resistance PG-TDSO8-31 Parameter Symbol Junction to Soldering Point Junction to Ambient (2s2p) RthJSP Values Min. Typ. Max. – 4.1 – RthJA(2s2p) – 37 – Unit Note or Test Condition Number K/W 1) 2) P_4.3.5 K/W 1) 3) P_4.3.11 P_4.3.17 P_4.3.23 Junction to Ambient (1s0p+600 mm2 Cu) RthJA(1s0p) – 48 – K/W 1) 4) Junction to Ambient (1s0p+300 mm2 Cu) RthJA(1s0p) – 58 – K/W 1) 5) 1) Not subject to production test, specified by design 2) Specified RthJSP value is simulated at natural convection on a cold plate setup (all pins are fixed to ambient temperature). TA = 85°C. Device is loaded with 1 W power. 3) Specified RthJA value is according to Jedec JESD51-2,-5,-7 at natural convection on FR4 2s2p board; The product (Chip + Package) was simulated on a 76.2 x 114.3 x 1.5 mm board with 2 inner copper layers (2 x 70 µm Cu, 2 x 35 µm Cu). Where applicable a thermal via array under the ex posed pad contacted the first inner copper layer. TA = 85°C, Device is loaded with 1 W power. 4) Specified RthJA value is according to Jedec JESD51-2,-5,-7 at natural convection on FR4 1s0p board; The product (Chip + Package) was simulated on a 76.2 x 114.3 x 1.5 mm board with additional heatspreading copper area of 600 mm2 and 70 µm thickness. TA = 85°C, Device is loaded with 1 W power. 5) Specified RthJA value is according to Jedec JESD51-2,-5,-7 at natural convection on FR4 1s0p board; The product (Chip + Package) was simulated on a 76.2 x 114.3 x 1.5 mm board with additional heatspreading copper area of 300 mm2 and 70 µm thickness. TA = 85°C, Device is loaded with 1 W power. 4.3.1 PCB set up The following PCB set up was implemented to determine the transient thermal impedance1)   1,5 mm 70µm modelled (traces) 35µm, 100% metalization* 70µm, 5% metalization* Figure 4 Cross section JEDEC2s2p 1) (*) means percentual Cu metalization on each layer Datasheet 11 Rev. 1.0 2016-09-12 HITFET - BTS3080EJ Smart Low-Side Power Switch General Product Characteristics 1,5 mm 70µm modelled (traces, cooling area) 70µm; 5% metalization* Figure 5 Cross section JEDEC1s0p Figure 6 PCB layout 4.3.2 Datasheet Transient Thermal Impedance 12 Rev. 1.0 2016-09-12 HITFET - BTS3080EJ Smart Low-Side Power Switch General Product Characteristics 60 JEDEC 2s2p Zth JA [K/W] 40 20 0 0,000001 0,0001 0,01 1 100 10000 Tp [s] Figure 7 Typical transient thermal impedance ZthJA = f(tp), TA = 85°C Value is according to Jedec JESD51-2,-7 at natural convection on FR4 2s2p board; The product (Chip + Package) was simulated on a 76.2 x 114.3 x 1.5 mm³ board with 2 inner copper layers (2 x 70 µm Cu, 2 x 35 µm Cu). Device is dissipating 1 W power. Zth JA [K/W] 160 140 JEDEC 1s0p / footprint 120 JEDEC 1s0p / 300mm² 100 JEDEC 1s0p / 600mm² 80 60 40 20 0 0,000001 0,0001 0,01 1 100 10000 Tp [s] Figure 8 Datasheet Typical transient thermal impedance ZthJA = f(tp), Ta = 85°C Value is according to Jedec JESD51-3 at natural convection on FR4 1s0p board. Device is dissipating 1 W power. 13 Rev. 1.0 2016-09-12 HITFET - BTS3080EJ Smart Low-Side Power Switch Power Stage 5 Power Stage 5.1 Output On-state Resistance The on-state resistance depends on the junction temperature TJ. The Figure below show this dependencies in terms of temperature and voltage for the typical on-state resistance RDS(ON). The behavior in reverse polarity is described in“Reverse Current capability” on Page 16 200 3V 160 RDS(ON) [m:] 5V 120 80 40 0 -40 -20 0 20 40 60 80 100 120 140 TJ [°C] Figure 9 Typical On-State Resistance, RDS(ON) = f(TJ), VIN = 3 V; VIN = 5 V 5.2 Resistive Load Output Timing Figure 10 shows the typical timing when switching a resistive load. V IN VIN(TH) t VOUT VBAT 90 % -(Δ V/Δ t)ON (ΔV/Δt)OFF 50 % 10 % t DON tF tDOFF tON Figure 10 Datasheet tR t OFF t Switching. Definition of Power Output Timing for Resistive Load 14 Rev. 1.0 2016-09-12 HITFET - BTS3080EJ Smart Low-Side Power Switch Power Stage 5.3 Inductive Load 5.3.1 Output Clamping When switching off inductive loads with low side switches, the Drain-Source voltage VOUT rises above battery potential, because the inductance intends to continue driving the current. To prevent unwanted high voltages the device has a voltage clamping mechanism to keep the voltage at VOUT(CLAMP). During this clamping operation mode the device heats up as it dissipates the energy from the inductance. Therefore the maximum allowed load inductance is limited. See Figure 11 and Figure 12 for more details. VBAT ZL IL OUT ( DMOS Drain VOUT GND ( DMOS Source) IGND Figure 11 Output Clamp Circuitry V IN t IOUT t V OUT VOUT(CLAMP) VBAT t Figure 12 Datasheet I d Switching an Inductive Load 15 ti O t tCl f Rev. 1.0 2016-09-12 HITFET - BTS3080EJ Smart Low-Side Power Switch Power Stage 5.3.1.1 Maximum Load Inductance While demagnetization of inductive loads, energy has to be dissipated in the BTS3080EJ. This energy can be calculated by the following equation: ⎡VBAT − VOUT ( CLAMP) ⎤ ⎛ ⎞ RL × I L ⎟ + IL ⎥ × L × ln ⎜1 − E = VOUT ( CLAMP) × ⎢ ⎜ V −V ⎟ RL ⎢⎣ ⎥⎦ RL BAT OUT ( CLAMP ) ⎠ ⎝ (5.1) Following equation simplifies under assumption of RL = 0 E= ⎞ ⎛ 1 VBAT 2 ⎟ LI L × ⎜1 − ⎟ ⎜ V −V 2 BAT OUT ( CLAMP) ⎠ ⎝ (5.2) For maximum single avalanche energy please also refer to EAS value in “Energies” on Page 8 1000 L [mH] 100 10 1 0,75 1,5 3 6 IL [A] Figure 13 Maximum load inductance for single pulse L = f(IL), TJ(0) = TJ, start = 150°C, VBAT = 13.5 V 5.4 Reverse Current capability A reverse battery situation means the OUT pin is pulled below GND potentials to -VBAT via the load ZL. Datasheet 16 Rev. 1.0 2016-09-12 HITFET - BTS3080EJ Smart Low-Side Power Switch Power Stage In this situation the load is driven by a current through the intrinsic body diode of the BTS3080EJ. During Reverse Battery all protection functions like current limitation, over temperature shut down and over voltage clamping are not available. The device is dissipating a power loss which is defined by the driven current and the voltage drop on the DMOS reverse body diode “-VOUT”. 5.5 Inverse Current capability An inverse current situation means the OUT pin is pulled below GND potential by a current flowing from GND to OUT (for example in half-bridge configuration and inductive load using freewheeling via the low side path). In this situation the load is driven by a current through the intrinsic body diode (device off) of the BTS3080EJ. During Inverse operation all protection functions like current limitation, over temperature shut down and over voltage clamping are not available. The device is dissipating a power loss which is defined by the driven current and the voltage drop on the DMOS reverse body diode “-VOUT”. Input current behavior during inverse condition on Output Please note that during inverse current on drain an increased input current can flow ( IIN(-VOUT)). To limit this current it is needed to place a resistor (RIN) in line with the input, also to prevent the microcontroller I/O pins from latching up in this case. The value of this resistor is a compromise of input voltage level in normal operation and maximum allowed device input current IIN or I/O current (for example of microcontroller). R IN (min) = VOHuC (max) (5.3) I IN (max) with IIN(max) = 2 mA (see also “Absolute Maximum Ratings” on Page 8) allow for the device; VOHµC(max) maximum high level voltage of the control signal (microcontroller I/O) and assuming -VOUT = 1.1 V (worst case) in inverse condition on the output If inverse current occurs while the STATUS is active (LOW), the STATUS will be reset (HIGH) after the inverse current disappears. 5.6 Characteristics Please see “Power Stage” on Page 14 for electrical characteristic table. Datasheet 17 Rev. 1.0 2016-09-12 HITFET - BTS3080EJ Smart Low-Side Power Switch Protection Functions 6 Protection Functions The device provides embedded protection functions. Integrated protection functions are designed to prevent IC destruction under fault conditions described in the datasheet. Fault conditions are considered as “outside” normal operation. Protection functions are not designed for continuous repetitive operation. 6.1 Over Voltage Clamping on OUTput The BTS3080EJ is equipped with a voltage clamp circuitry that keeps the drain-source (output to GND) voltage VDS at a certain level VOUT(CLAMP). The over voltage clamping is overruling the other protection functions. Power dissipation has to be limited to not exceed the maximum allowed junction temperature. This function is also used in terms of inductive clamping. Please see also Chapter 5.3.1 for more details. 6.2 Thermal Protection The device is protected against over temperature due to overload and / or bad cooling conditions. To ensure this a temperature sensor is located in the power MOSFET. The BTS3080EJ has a thermal protection function with automatic restart. After the device has switched off due to over temperature the device will stay off until the junction temperature has dropped down below the thermal hysteresis “Thermal Protection” on Page 18. Thermal shutdown Thermal restart IN 5V 0V t Tj TJ(SD ) ΔT J(SD)_HYS t VOUT VBAT t Thermal _ fault_ restart.emf Figure 14 Thermal protective switch OFF scenario with thermal restart The device also features a digital feedback on the dedicated status pin. This feedback is latched and can be read out easily by the microcontroller. Please see “Diagnostics” on Page 21 for details on this feedback. 6.3 Short Circuit Protection / Current limitation The condition short circuit is an overload condition to the device. If the load current reaches the limitation value of IL(LIM) the device limits the current and therefore will start heating up. When the thermal shutdown temperature is reached, the device turns off. The time from the beginning of current limitation until the over temperature switch off depends strongly on the cooling conditions. Datasheet 18 Rev. 1.0 2016-09-12 HITFET - BTS3080EJ Smart Low-Side Power Switch Protection Functions If input is still high the device will turn on again after the measured temperature has dropped below the thermal hysteresis. Figure 15 shows this simplified behavior. Occurrence of Over current or high ohmic Short circuit Turn off due to over temperature Restart into short circuit after cooling down Restart into normal load condition IN 5V 0 t ID Vbat /Zsc I L(lim ) t Tj T J(SD) ΔTJ(SD )_HYS t Short_circuit_restart.emf Figure 15 Short circuit protection via current limitation and over temperature switch off with autorestart 6.4 Characteristics Please see “Protection Functions” on Page 18 for electrical characteristic table. Datasheet 19 Rev. 1.0 2016-09-12 HITFET - BTS3080EJ Smart Low-Side Power Switch Input Stage 7 Input Stage 7.1 Input Circuit Figure 16 shows the input circuit of the BTS3080EJ. In case of open or floating input pin the device will automatically switch off and remain off. An ESD Zener structure protects the input circuit against ESD pulses. ESD protection circuit IN GND Figure 16 7.2 Input circuit.emf Simplified Input circuitry Characteristics Please see “Input Stage” on Page 25 for electrical characteristic table. Datasheet 20 Rev. 1.0 2016-09-12 HITFET - BTS3080EJ Smart Low-Side Power Switch Diagnostics 8 Diagnostics The BTS3080EJ provides a latching digital status signal via an open drain style feedback on the STATUS pin. In case of a detected over temperature condition, the device pulls the STATUS pin down to GND (pin) by an internal pull-down intend to signal a low level to the micro controller. This pull-down signal stays active also during thermal restart until the input pin is pulled-down below the input threshold. In normal operation the status needs to be externally pulled up to a 3 V/5 V supply to signal a high level. Figure 17 shows this simplified behavior. Thermal shutdown Thermal shutdown Auto restart IN 5V 0 t TJ TJ(SD) ΔTJ(SD)_HYS t VSTATUS 3V/5V (V DD) 0 Status Latch reset by IN=low Error Status Latch Figure 17 Datasheet t Short circuit protection via current limitation and over temperature switch off with autorestart and signaling via STATUS pin 21 Rev. 1.0 2016-09-12 HITFET - BTS3080EJ Smart Low-Side Power Switch Electrical Characteristics 9 Electrical Characteristics 9.1 Power Stage Please see Chapter “Power Stage” on Page 14 for parameter description and further details. Table 5 Electrical Characteristics: Power Stage Tj = -40°C to +150°C, VBAT =6 V to 18 V, all voltages with respect to ground, positive current flowing into pin (unless otherwise specified) Parameter Symbol Values Unit Note or Test Condition Min. Typ. Max. Number On-State resistance at hot temperature (150°C) RDS(ON)_150 – 134 160 mΩ TJ = 150°C; VIN = 5 V; IL = IL(NOM) P_9.1.5 On-State resistance at ambient temperature (25°C) RDS(ON)_25 – 69 – mΩ TJ = 25°C; VIN = 5 V; IL = IL(NOM) P_9.1.11 Nominal load current IL(NOM) – 3 – A 1) P_9.1.41 OFF state load current, Output leakage current IL(OFF)_85 – OFF state load current, Output leakage current IL(OFF)_150 – 0.5 2 µA VBAT = 18 V; VIN = 0 V; TJ = 150°C P_9.1.53 Reverse body diode forward voltage -VOUT – 0.8 1.1 V IL = -IL(NOM); VIN = 0 V P_9.1.67 Power Stage Datasheet TJ < 150°C; TA = 85°C VIN = 5 V – 0.6 µA 2) P_9.1.47 VBAT = 13.5 V; VIN = 0 V; TJ ≤ 85°C 22 Rev. 1.0 2016-09-12 HITFET - BTS3080EJ Smart Low-Side Power Switch Electrical Characteristics Table 5 Electrical Characteristics: Power Stage (cont’d) Tj = -40°C to +150°C, VBAT =6 V to 18 V, all voltages with respect to ground, positive current flowing into pin (unless otherwise specified) Parameter Symbol Values Unit Note or Test Condition Min. Typ. Max. Number Dynamic characteristics - switching timessingle pulseVBAT = 13.5 V, RL = 4.7Ω; for definition details see Figure 10 “Definition of Power Output Timing for Resistive Load” on Page 14 Turn-on time 3) tON 35 tOFF 70 Turn-on delay time tDON 5 15 25 µs VIN = 0 V to 5 V; VOUT = 90% VBAT P_9.1.70 Turn-off delay time tDOFF 40 75 120 µs VIN = 5 V to 0 V; VOUT = 10% VBAT P_9.1.71 Fall time, Falling output voltage (turn- tF on) 30 60 90 µs VIN = 0 V to 5 V; VOUT = 90% VBAT to VOUT = 10% VBAT P_9.1.72 Rise time, Rising output voltage tR 30 60 90 µs VIN = 5 V to 0 V; VOUT = 10% VBAT to VOUT = 90% VBAT P_9.1.73 Turn-on Slew rate -(ΔV/Δt)ON 0.22 0.45 0.65 V/µs 5) P_9.1.74 0.22 0.45 0.65 V/µs 6) Turn-off time Turn-off Slew rate 1) 2) 3) 4) 5) 6) (ΔV/Δt)OFF 75 115 µs P_9.1.68 VIN = 0 V to 5 V; VOUT = 10% VBAT 135 210 µs 4) P_9.1.69 VIN = 5 V to 0 V; VOUT = 90% VBAT VOUT = 90% VBAT to VOUT = 50% VBAT P_9.1.75 VOUT = 50% VBAT to VOUT = 90% VBAT Not subject to production test, calculated by RthJA (JEDEC 2s2p, PCB) and RDS(ON) Not subject to production test, specified by design; Not subject to production test, calculated with delay time ON and fall time Not subject to production test, calculated with delay time OFF and rise time Not subject to production test, calculated slew rate between 90% and 50% VOUT Not subject to production test, calculated slew rate between 50% and 90% VOUT Datasheet 23 Rev. 1.0 2016-09-12 HITFET - BTS3080EJ Smart Low-Side Power Switch Electrical Characteristics 9.2 Protection Please see Chapter “Protection Functions” on Page 18 for parameter description and further details. Note: Table 6 Integrated protection functions are designed to prevent IC destruction under fault conditions described in the data sheet. Fault conditions are considered as “outside” normal operating range. Protection functions are not designed for continuous repetitive operation Electrical Characteristics: Protection Tj = -40°C to +150°C, VBAT =6 V to 18 V, all voltages with respect to ground, positive current flowing into pin (unless otherwise specified) Parameter Symbol Values Unit Note or Test Condition Min. Typ. Max. Thermal shut down junction temperature TJ(SD) 150 Thermal hysteresis ΔTJ_HYS – Number Thermal Protection Minimum status latch reset time 175 – °C 1) P_9.2.1 3 V < VIN < 5.5 V 15 – K 1) P_9.2.3 µs 1) 2) P_9.2.8 tRESET 50 VOUT(CLAMP) 40 45 – V VIN = 0 V; IL = 6 mA P_9.2.13 10 15 20 A VIN = 5 V P_9.2.19 – – VIN < 0.8 V; Overvoltage Protection Drain clamp voltage Current limitation (see also Figure 15) Current limitation IL(LIM) 1) Not subject to production test, specified by design. 2) Minimum time needed to reset the STATUS latch feedback signal Datasheet 24 Rev. 1.0 2016-09-12 HITFET - BTS3080EJ Smart Low-Side Power Switch Electrical Characteristics 9.3 Input Stage Please see Chapter “Input Stage” on Page 20 for description and further details. Table 7 Electrical Characteristics: Input Tj = -40°C to +150°C, VBAT =6 V to 18 V, all voltages with respect to ground, positive current flowing into pin (unless otherwise specified) Parameter Symbol Values Min. Typ. Max. Unit Note or Test Condition Number Input Input Current, normal ON state IIN(ON) – 82 120 µA VIN = 5.0 V; P_9.3.1 Input Current, protection mode IIN(PROT) – 165 220 µA VIN = 5.0 V; P_9.3.7 Input current, inverse condition on IIN(-VOUT) OUT to GND – 15 – mA 1) 2) P_9.3.9 Input pull down current IIN-GND 10 VIN(TH) 0.8 Input Voltage on-threshold VOUT < -0.3 V; -0.3 V ≤ VIN